tja1103_driver.h
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1 /**
2  * @file tja1103_driver.h
3  * @brief TJA1103 100Base-T1 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 #ifndef _TJA1103_DRIVER_H
32 #define _TJA1103_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //PHY address
38 #ifndef TJA1103_PHY_ADDR
39  #define TJA1103_PHY_ADDR 0
40 #elif (TJA1103_PHY_ADDR < 0 || TJA1103_PHY_ADDR > 31)
41  #error TJA1103_PHY_ADDR parameter is not valid
42 #endif
43 
44 //TJA1103 PHY registers
45 #define TJA1103_PHY_ID1 0x02
46 #define TJA1103_PHY_ID2 0x03
47 #define TJA1103_MMDCTRL 0x0D
48 #define TJA1103_MMDAD 0x0E
49 
50 //TJA1103 MMD registers
51 #define TJA1103_B100T1_PMAPMD_CTL 0x01, 0x0834
52 #define TJA1103_DEVICE_CTRL 0x1E, 0x0040
53 #define TJA1103_DEVICE_CONFIG 0x1E, 0x0048
54 #define TJA1103_ALWAYS_ACCESSIBLE 0x1E, 0x801F
55 #define TJA1103_PORT_CTRL 0x1E, 0x8040
56 #define TJA1103_PORT_ABILITIES 0x1E, 0x8046
57 #define TJA1103_PORT_FUNC_IRQ_EN 0x1E, 0x807A
58 #define TJA1103_PHY_IRQ_ACK 0x1E, 0x80A0
59 #define TJA1103_PHY_IRQ_EN 0x1E, 0x80A1
60 #define TJA1103_PHY_IRQ_STATUS 0x1E, 0x80A2
61 #define TJA1103_PHY_CTRL 0x1E, 0x8100
62 #define TJA1103_PHY_STAT 0x1E, 0x8102
63 #define TJA1103_PHY_CONFIG 0x1E, 0x8108
64 #define TJA1103_SIGNAL_QUALITY 0x1E, 0x8320
65 #define TJA1103_CABLE_TEST 0x1E, 0x8330
66 #define TJA1103_SYM_ERR_COUNTER 0x1E, 0x8350
67 #define TJA1103_SYM_ERR_COUNTER_EXTENDED 0x1E, 0x8351
68 #define TJA1103_LINK_DROP_COUNTER 0x1E, 0x8352
69 #define TJA1103_LINK_LOSSES_AND_FAILURES 0x1E, 0x8353
70 #define TJA1103_PTP_IRQ_ACK 0x1E, 0x9008
71 #define TJA1103_RX_GOOD_FRAME_COUNTER 0x1E, 0xA950
72 #define TJA1103_RX_BAD_FRAME_COUNTER 0x1E, 0xA952
73 #define TJA1103_RX_ERR_FRAME_COUNTER 0x1E, 0xA954
74 #define TJA1103_INFRA_CTRL 0x1E, 0xAC00
75 #define TJA1103_MONITOR_STATUS 0x1E, 0xAC80
76 #define TJA1103_MONITOR_CONFIG 0x1E, 0xAC86
77 #define TJA1103_ABILITIES 0x1E, 0xAFC4
78 #define TJA1103_MII_BASIC_CONFIG 0x1E, 0xAFC6
79 #define TJA1103_RXID 0x1E, 0xAFCC
80 #define TJA1103_TXID 0x1E, 0xAFCD
81 #define TJA1103_RX_PREAMBLE_COUNTER 0x1E, 0xAFCE
82 #define TJA1103_TX_PREAMBLE_COUNTER 0x1E, 0xAFCF
83 #define TJA1103_RX_IPG_LENGTH 0x1E, 0xAFD0
84 #define TJA1103_TX_IPG_LENGTH 0x1E, 0xAFD1
85 
86 //PHY identification 1 register
87 #define TJA1103_PHY_ID1_OUI_MSB 0xFFFF
88 #define TJA1103_PHY_ID1_OUI_MSB_DEFAULT 0x001B
89 
90 //PHY identification 2 register
91 #define TJA1103_PHY_ID2_OUI_LSB 0xFC00
92 #define TJA1103_PHY_ID2_OUI_LSB_DEFAULT 0xB000
93 #define TJA1103_PHY_ID2_TYPE_NO 0x03F0
94 #define TJA1103_PHY_ID2_TYPE_NO_DEFAULT 0x0010
95 #define TJA1103_PHY_ID2_REVISION_NO 0x000F
96 
97 //MMDCTRL register
98 #define TJA1103_MMDCTRL_FNCTN 0xC000
99 #define TJA1103_MMDCTRL_FNCTN_ADDR 0x0000
100 #define TJA1103_MMDCTRL_FNCTN_DATA_NO_POST_INC 0x4000
101 #define TJA1103_MMDCTRL_FNCTN_DATA_POST_INC_RW 0x8000
102 #define TJA1103_MMDCTRL_FNCTN_DATA_POST_INC_W 0xC000
103 #define TJA1103_MMDCTRL_DEVAD 0x001F
104 
105 //B100T1_PMAPMD_CTL register
106 #define TJA1103_B100T1_PMAPMD_CTL_CONFIG_EN 0x8000
107 #define TJA1103_B100T1_PMAPMD_CTL_MASTER 0x4000
108 
109 //DEVICE_CTRL register
110 #define TJA1103_DEVICE_CTRL_RESET 0x8000
111 #define TJA1103_DEVICE_CTRL_CONFIG_GLOBAL_EN 0x4000
112 #define TJA1103_DEVICE_CTRL_CONFIG_ALL_EN 0x2000
113 
114 //ALWAYS_ACCESSIBLE register
115 #define TJA1103_ALWAYS_ACCESSIBLE_FUSA_PASS 0x0010
116 
117 //PORT_CTRL register
118 #define TJA1103_PORT_CTRL_EN 0x4000
119 
120 //PORT_ABILITIES register
121 #define TJA1103_PORT_ABILITIES_PTP 0x0010
122 
123 //PORT_FUNC_IRQ_EN register
124 #define TJA1103_PORT_FUNC_IRQ_EN_PTP_IRQS 0x0008
125 
126 //PHY_IRQ_ACK register
127 #define TJA1103_PHY_IRQ_ACK_LINK_EVENT 0x0002
128 
129 //PHY_IRQ_EN register
130 #define TJA1103_PHY_IRQ_EN_LINK_AVAIL 0x0004
131 #define TJA1103_PHY_IRQ_EN_LINK_EVENT 0x0002
132 
133 //PHY_IRQ_STATUS register
134 #define TJA1103_PHY_IRQ_STATUS_LINK_AVAIL 0x0004
135 #define TJA1103_PHY_IRQ_STATUS_LINK_EVENT 0x0002
136 
137 //PHY_CTRL register
138 #define TJA1103_PHY_CTRL_CONFIG_EN 0x4000
139 #define TJA1103_PHY_CTRL_START_OP 0x0001
140 
141 //PHY_CTRL register
142 #define TJA1103_PHY_STAT_LINK_STATUS 0x0004
143 
144 //PHY_CONFIG register
145 #define TJA1103_PHY_CONFIG_AUTO 0x0001
146 
147 //SIGNAL_QUALITY register
148 #define TJA1103_SIGNAL_QUALITY_SQI_VALID 0x4000
149 #define TJA1103_SIGNAL_QUALITY_SQI_MASK 0x0007
150 
151 //CABLE_TEST register
152 #define TJA1103_CABLE_TEST_EN 0x8000
153 #define TJA1103_CABLE_TEST_START 0x4000
154 #define TJA1103_CABLE_TEST_VALID 0x2000
155 #define TJA1103_CABLE_TEST_RESULT 0x0007
156 #define TJA1103_CABLE_TEST_RESULT_OK 0x0000
157 #define TJA1103_CABLE_TEST_RESULT_SHORTED 0x0001
158 #define TJA1103_CABLE_TEST_RESULT_OPEN 0x0002
159 #define TJA1103_CABLE_TEST_RESULT_UNKNOWN 0x0007
160 
161 //INFRA_CTRL register
162 #define TJA1103_INFRA_CTRL_EN 0x4000
163 
164 //ABILITIES register
165 #define TJA1103_ABILITIES_RGMII_ID 0x8000
166 #define TJA1103_ABILITIES_RGMII 0x4000
167 #define TJA1103_ABILITIES_RMII 0x0400
168 #define TJA1103_ABILITIES_REVMII 0x0200
169 #define TJA1103_ABILITIES_MII 0x0100
170 #define TJA1103_ABILITIES_SGMII 0x0001
171 
172 //MII_BASIC_CONFIG register
173 #define TJA1103_MII_BASIC_CONFIG_REV 0x0100
174 #define TJA1103_MII_BASIC_CONFIG_MODE 0x000F
175 #define TJA1103_MII_BASIC_CONFIG_MODE_MII 0x0004
176 #define TJA1103_MII_BASIC_CONFIG_MODE_RMII 0x0005
177 #define TJA1103_MII_BASIC_CONFIG_MODE_RGMII 0x0007
178 #define TJA1103_MII_BASIC_CONFIG_MODE_SGMII 0x0009
179 
180 //RXID register
181 #define TJA1103_RXID_EN 0x8000
182 
183 //TXID register
184 #define TJA1103_TXID_EN 0x8000
185 
186 //SYM_ERR_COUNTER register
187 #define TJA1103_SYM_ERR_COUNTER_EN 0x8000
188 
189 //SYM_ERR_COUNTER_EXTENDED register
190 #define TJA1103_SYM_ERR_COUNTER_EXTENDED_EN 0x8000
191 
192 //LINK_DROP_COUNTER register
193 #define TJA1103_LINK_DROP_COUNTER_EN 0x8000
194 
195 //LINK_LOSSES_AND_FAILURES register
196 #define TJA1103_LINK_LOSSES_AND_FAILURES_EN 0x8000
197 
198 //RX_GOOD_FRAME_COUNTER register
199 #define TJA1103_RX_GOOD_FRAME_COUNTER_EN 0x8000
200 
201 //RX_BAD_FRAME_COUNTER register
202 #define TJA1103_RX_BAD_FRAME_COUNTER_EN 0x8000
203 
204 //RX_ERR_FRAME_COUNTER register
205 #define TJA1103_RX_ERR_FRAME_COUNTER_EN 0x8000
206 
207 //RX_PREAMBLE_COUNTER register
208 #define TJA1103_RX_PREAMBLE_COUNTER_EN 0x8000
209 
210 //TX_PREAMBLE_COUNTER register
211 #define TJA1103_TX_PREAMBLE_COUNTER_EN 0x8000
212 
213 //MONITOR_STATUS register
214 #define TJA1103_MONITOR_STATUS_RESET 0x8000
215 
216 //MONITOR_CONFIG register
217 #define TJA1103_MONITOR_CONFIG_LOST_FRAMES_CNT_EN 0x0200
218 #define TJA1103_MONITOR_CONFIG_ALL_FRAMES_CNT_EN 0x0100
219 
220 //C++ guard
221 #ifdef __cplusplus
222 extern "C" {
223 #endif
224 
225 //TJA1103 Ethernet PHY driver
226 extern const PhyDriver tja1103PhyDriver;
227 
228 //TJA1103 related functions
229 error_t tja1103Init(NetInterface *interface);
230 void tja1103InitHook(NetInterface *interface);
231 
232 void tja1103Tick(NetInterface *interface);
233 
234 void tja1103EnableIrq(NetInterface *interface);
235 void tja1103DisableIrq(NetInterface *interface);
236 
237 void tja1103EventHandler(NetInterface *interface);
238 
239 void tja1103WritePhyReg(NetInterface *interface, uint8_t address,
240  uint16_t data);
241 
242 uint16_t tja1103ReadPhyReg(NetInterface *interface, uint8_t address);
243 
244 void tja1103DumpPhyReg(NetInterface *interface);
245 
246 void tja1103WriteMmdReg(NetInterface *interface, uint8_t devAddr,
247  uint16_t regAddr, uint16_t data);
248 
249 uint16_t tja1103ReadMmdReg(NetInterface *interface, uint8_t devAddr,
250  uint16_t regAddr);
251 
252 //C++ guard
253 #ifdef __cplusplus
254 }
255 #endif
256 
257 #endif
error_t
Error codes.
Definition: error.h:43
uint8_t data[]
Definition: ethernet.h:222
Ipv6Addr address[]
Definition: ipv6.h:316
uint16_t regAddr
#define NetInterface
Definition: net.h:36
Network interface controller abstraction layer.
Ethernet PHY driver.
Definition: nic.h:308
uint16_t tja1103ReadMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr)
Read MMD register.
void tja1103WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
void tja1103EventHandler(NetInterface *interface)
TJA1103 event handler.
void tja1103EnableIrq(NetInterface *interface)
Enable interrupts.
void tja1103Tick(NetInterface *interface)
TJA1103 timer handler.
void tja1103DisableIrq(NetInterface *interface)
Disable interrupts.
void tja1103WriteMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr, uint16_t data)
Write MMD register.
void tja1103InitHook(NetInterface *interface)
TJA1103 custom configuration.
uint16_t tja1103ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void tja1103DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
const PhyDriver tja1103PhyDriver
TJA1103 Ethernet PHY driver.
error_t tja1103Init(NetInterface *interface)
TJA1103 PHY transceiver initialization.