lpc54608_eth_driver.h
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1 /**
2  * @file lpc54608_eth_driver.h
3  * @brief LPC54608 Ethernet MAC controller
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _LPC54608_ETH_DRIVER_H
30 #define _LPC54608_ETH_DRIVER_H
31 
32 //Dependencies
33 #include "core/nic.h"
34 
35 //Number of TX buffers
36 #ifndef LPC54608_ETH_TX_BUFFER_COUNT
37  #define LPC54608_ETH_TX_BUFFER_COUNT 3
38 #elif (LPC54608_ETH_TX_BUFFER_COUNT < 1)
39  #error LPC54608_ETH_TX_BUFFER_COUNT parameter is not valid
40 #endif
41 
42 //TX buffer size
43 #ifndef LPC54608_ETH_TX_BUFFER_SIZE
44  #define LPC54608_ETH_TX_BUFFER_SIZE 1536
45 #elif (LPC54608_ETH_TX_BUFFER_SIZE != 1536)
46  #error LPC54608_ETH_TX_BUFFER_SIZE parameter is not valid
47 #endif
48 
49 //Number of RX buffers
50 #ifndef LPC54608_ETH_RX_BUFFER_COUNT
51  #define LPC54608_ETH_RX_BUFFER_COUNT 6
52 #elif (LPC54608_ETH_RX_BUFFER_COUNT < 1)
53  #error LPC54608_ETH_RX_BUFFER_COUNT parameter is not valid
54 #endif
55 
56 //RX buffer size
57 #ifndef LPC54608_ETH_RX_BUFFER_SIZE
58  #define LPC54608_ETH_RX_BUFFER_SIZE 1536
59 #elif (LPC54608_ETH_RX_BUFFER_SIZE != 1536)
60  #error LPC54608_ETH_RX_BUFFER_SIZE parameter is not valid
61 #endif
62 
63 //Interrupt priority grouping
64 #ifndef LPC54608_ETH_IRQ_PRIORITY_GROUPING
65  #define LPC54608_ETH_IRQ_PRIORITY_GROUPING 4
66 #elif (LPC54608_ETH_IRQ_PRIORITY_GROUPING < 0)
67  #error LPC54608_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
68 #endif
69 
70 //Ethernet interrupt group priority
71 #ifndef LPC54608_ETH_IRQ_GROUP_PRIORITY
72  #define LPC54608_ETH_IRQ_GROUP_PRIORITY 6
73 #elif (LPC54608_ETH_IRQ_GROUP_PRIORITY < 0)
74  #error LPC54608_ETH_IRQ_GROUP_PRIORITY parameter is not valid
75 #endif
76 
77 //Ethernet interrupt subpriority
78 #ifndef LPC54608_ETH_IRQ_SUB_PRIORITY
79  #define LPC54608_ETH_IRQ_SUB_PRIORITY 0
80 #elif (LPC54608_ETH_IRQ_SUB_PRIORITY < 0)
81  #error LPC54608_ETH_IRQ_SUB_PRIORITY parameter is not valid
82 #endif
83 
84 //MMCRIMR register
85 #define ENET_MMCRIMR_RXLPITRCIM 0x08000000
86 #define ENET_MMCRIMR_RXLPIUSCIM 0x04000000
87 #define ENET_MMCRIMR_RXUCGPIM 0x00020000
88 #define ENET_MMCRIMR_RXALGNERPIM 0x00000040
89 #define ENET_MMCRIMR_RXCRCERPIM 0x00000020
90 
91 //MMCTIMR register
92 #define ENET_MMCTIMR_TXLPITRCIM 0x08000000
93 #define ENET_MMCTIMR_TXLPIUSCIM 0x04000000
94 #define ENET_MMCTIMR_TXGPKTIM 0x00200000
95 #define ENET_MMCTIMR_TXMCOLGPIM 0x00008000
96 #define ENET_MMCTIMR_TXSCOLGPIM 0x00004000
97 
98 //Transmit normal descriptor (read format)
99 #define ENET_TDES0_BUF1AP 0xFFFFFFFF
100 #define ENET_TDES1_BUF2AP 0xFFFFFFFF
101 #define ENET_TDES2_IOC 0x80000000
102 #define ENET_TDES2_TTSE 0x40000000
103 #define ENET_TDES2_B2L 0x3FFF0000
104 #define ENET_TDES2_B1L 0x00003FFF
105 #define ENET_TDES3_OWN 0x80000000
106 #define ENET_TDES3_CTXT 0x40000000
107 #define ENET_TDES3_FD 0x20000000
108 #define ENET_TDES3_LD 0x10000000
109 #define ENET_TDES3_CPC 0x0C000000
110 #define ENET_TDES3_SLOTNUM 0x00780000
111 #define ENET_TDES3_CIC 0x00030000
112 #define ENET_TDES3_FL 0x00007FFF
113 
114 //Transmit normal descriptor (write-back format)
115 #define ENET_TDES0_TTSL 0xFFFFFFFF
116 #define ENET_TDES1_TTSH 0xFFFFFFFF
117 #define ENET_TDES3_OWN 0x80000000
118 #define ENET_TDES3_CTXT 0x40000000
119 #define ENET_TDES3_FD 0x20000000
120 #define ENET_TDES3_LD 0x10000000
121 #define ENET_TDES3_TTSS 0x00020000
122 #define ENET_TDES3_ES 0x00008000
123 #define ENET_TDES3_JT 0x00004000
124 #define ENET_TDES3_FF 0x00002000
125 #define ENET_TDES3_PCE 0x00001000
126 #define ENET_TDES3_LOC 0x00000800
127 #define ENET_TDES3_NC 0x00000400
128 #define ENET_TDES3_LC 0x00000200
129 #define ENET_TDES3_EC 0x00000100
130 #define ENET_TDES3_CC 0x000000F0
131 #define ENET_TDES3_ED 0x00000008
132 #define ENET_TDES3_UF 0x00000004
133 #define ENET_TDES3_DB 0x00000002
134 #define ENET_TDES3_IHE 0x00000001
135 
136 //Receive normal descriptor (read format)
137 #define ENET_RDES0_BUF1AP 0xFFFFFFFF
138 #define ENET_RDES2_BUF2AP 0xFFFFFFFF
139 #define ENET_RDES3_OWN 0x80000000
140 #define ENET_RDES3_IOC 0x40000000
141 #define ENET_RDES3_BUF2V 0x02000000
142 #define ENET_RDES3_BUF1V 0x01000000
143 
144 //Receive normal descriptor (write-back format)
145 #define ENET_RDES1_OPC 0xFFFF0000
146 #define ENET_RDES1_TD 0x00008000
147 #define ENET_RDES1_TSA 0x00004000
148 #define ENET_RDES1_PV 0x00002000
149 #define ENET_RDES1_PFT 0x00001000
150 #define ENET_RDES1_PMT 0x00000F00
151 #define ENET_RDES1_IPCE 0x00000080
152 #define ENET_RDES1_IPCB 0x00000040
153 #define ENET_RDES1_IPV6 0x00000020
154 #define ENET_RDES1_IPV4 0x00000010
155 #define ENET_RDES1_IPHE 0x00000008
156 #define ENET_RDES1_PT 0x00000007
157 #define ENET_RDES2_MADRM 0x07F80000
158 #define ENET_RDES2_DAF 0x00020000
159 #define ENET_RDES2_SAF 0x00010000
160 #define ENET_RDES3_OWN 0x80000000
161 #define ENET_RDES3_CTXT 0x40000000
162 #define ENET_RDES3_FD 0x20000000
163 #define ENET_RDES3_LD 0x10000000
164 #define ENET_RDES3_RS2V 0x08000000
165 #define ENET_RDES3_RS1V 0x04000000
166 #define ENET_RDES3_RS0V 0x02000000
167 #define ENET_RDES3_CE 0x01000000
168 #define ENET_RDES3_GP 0x00800000
169 #define ENET_RDES3_RWT 0x00400000
170 #define ENET_RDES3_OE 0x00200000
171 #define ENET_RDES3_RE 0x00100000
172 #define ENET_RDES3_DE 0x00080000
173 #define ENET_RDES3_LT 0x00070000
174 #define ENET_RDES3_ES 0x00008000
175 #define ENET_RDES3_PL 0x00007FFF
176 
177 //C++ guard
178 #ifdef __cplusplus
179  extern "C" {
180 #endif
181 
182 
183 /**
184  * @brief Transmit descriptor
185  **/
186 
187 typedef struct
188 {
189  uint32_t tdes0;
190  uint32_t tdes1;
191  uint32_t tdes2;
192  uint32_t tdes3;
194 
195 
196 /**
197  * @brief Receive descriptor
198  **/
199 
200 typedef struct
201 {
202  uint32_t rdes0;
203  uint32_t rdes1;
204  uint32_t rdes2;
205  uint32_t rdes3;
207 
208 
209 //LPC54608 Ethernet MAC driver
210 extern const NicDriver lpc54608EthDriver;
211 
212 //LPC54608 Ethernet MAC related functions
214 void lpc54608EthInitGpio(NetInterface *interface);
215 void lpc54608EthInitDmaDesc(NetInterface *interface);
216 
217 void lpc54608EthTick(NetInterface *interface);
218 
219 void lpc54608EthEnableIrq(NetInterface *interface);
220 void lpc54608EthDisableIrq(NetInterface *interface);
221 void lpc54608EthEventHandler(NetInterface *interface);
222 
224  const NetBuffer *buffer, size_t offset);
225 
227 
230 
231 void lpc54608EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
232 uint16_t lpc54608EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
233 
234 //C++ guard
235 #ifdef __cplusplus
236  }
237 #endif
238 
239 #endif
void lpc54608EthDisableIrq(NetInterface *interface)
Disable interrupts.
void lpc54608EthEventHandler(NetInterface *interface)
LPC54608 Ethernet MAC event handler.
error_t lpc54608EthReceivePacket(NetInterface *interface)
Receive a packet.
const NicDriver lpc54608EthDriver
LPC54608 Ethernet MAC driver.
void lpc54608EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
Transmit descriptor.
Receive descriptor.
uint16_t lpc54608EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
NIC driver.
Definition: nic.h:161
error_t lpc54608EthInit(NetInterface *interface)
LPC54608 Ethernet MAC initialization.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:86
error_t lpc54608EthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
void lpc54608EthEnableIrq(NetInterface *interface)
Enable interrupts.
void lpc54608EthTick(NetInterface *interface)
LPC54608 Ethernet MAC timer handler.
uint16_t regAddr
error_t
Error codes.
Definition: error.h:40
void lpc54608EthInitGpio(NetInterface *interface)
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
void lpc54608EthInitDmaDesc(NetInterface *interface)
Initialize DMA descriptor lists.
error_t lpc54608EthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
Network interface controller abstraction layer.
error_t lpc54608EthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.