lpc546xx_eth_driver.h
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1 /**
2  * @file lpc546xx_eth_driver.h
3  * @brief LPC54608/LPC54618/LPC54628 Ethernet MAC controller
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 #ifndef _LPC546XX_ETH_DRIVER_H
32 #define _LPC546XX_ETH_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Number of TX buffers
38 #ifndef LPC546XX_ETH_TX_BUFFER_COUNT
39  #define LPC546XX_ETH_TX_BUFFER_COUNT 3
40 #elif (LPC546XX_ETH_TX_BUFFER_COUNT < 1)
41  #error LPC546XX_ETH_TX_BUFFER_COUNT parameter is not valid
42 #endif
43 
44 //TX buffer size
45 #ifndef LPC546XX_ETH_TX_BUFFER_SIZE
46  #define LPC546XX_ETH_TX_BUFFER_SIZE 1536
47 #elif (LPC546XX_ETH_TX_BUFFER_SIZE != 1536)
48  #error LPC546XX_ETH_TX_BUFFER_SIZE parameter is not valid
49 #endif
50 
51 //Number of RX buffers
52 #ifndef LPC546XX_ETH_RX_BUFFER_COUNT
53  #define LPC546XX_ETH_RX_BUFFER_COUNT 6
54 #elif (LPC546XX_ETH_RX_BUFFER_COUNT < 1)
55  #error LPC546XX_ETH_RX_BUFFER_COUNT parameter is not valid
56 #endif
57 
58 //RX buffer size
59 #ifndef LPC546XX_ETH_RX_BUFFER_SIZE
60  #define LPC546XX_ETH_RX_BUFFER_SIZE 1536
61 #elif (LPC546XX_ETH_RX_BUFFER_SIZE != 1536)
62  #error LPC546XX_ETH_RX_BUFFER_SIZE parameter is not valid
63 #endif
64 
65 //Interrupt priority grouping
66 #ifndef LPC546XX_ETH_IRQ_PRIORITY_GROUPING
67  #define LPC546XX_ETH_IRQ_PRIORITY_GROUPING 4
68 #elif (LPC546XX_ETH_IRQ_PRIORITY_GROUPING < 0)
69  #error LPC546XX_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
70 #endif
71 
72 //Ethernet interrupt group priority
73 #ifndef LPC546XX_ETH_IRQ_GROUP_PRIORITY
74  #define LPC546XX_ETH_IRQ_GROUP_PRIORITY 6
75 #elif (LPC546XX_ETH_IRQ_GROUP_PRIORITY < 0)
76  #error LPC546XX_ETH_IRQ_GROUP_PRIORITY parameter is not valid
77 #endif
78 
79 //Ethernet interrupt subpriority
80 #ifndef LPC546XX_ETH_IRQ_SUB_PRIORITY
81  #define LPC546XX_ETH_IRQ_SUB_PRIORITY 0
82 #elif (LPC546XX_ETH_IRQ_SUB_PRIORITY < 0)
83  #error LPC546XX_ETH_IRQ_SUB_PRIORITY parameter is not valid
84 #endif
85 
86 //Transmit normal descriptor (read format)
87 #define ENET_TDES0_BUF1AP 0xFFFFFFFF
88 #define ENET_TDES1_BUF2AP 0xFFFFFFFF
89 #define ENET_TDES2_IOC 0x80000000
90 #define ENET_TDES2_TTSE 0x40000000
91 #define ENET_TDES2_B2L 0x3FFF0000
92 #define ENET_TDES2_B1L 0x00003FFF
93 #define ENET_TDES3_OWN 0x80000000
94 #define ENET_TDES3_CTXT 0x40000000
95 #define ENET_TDES3_FD 0x20000000
96 #define ENET_TDES3_LD 0x10000000
97 #define ENET_TDES3_CPC 0x0C000000
98 #define ENET_TDES3_SLOTNUM 0x00780000
99 #define ENET_TDES3_CIC 0x00030000
100 #define ENET_TDES3_FL 0x00007FFF
101 
102 //Transmit normal descriptor (write-back format)
103 #define ENET_TDES0_TTSL 0xFFFFFFFF
104 #define ENET_TDES1_TTSH 0xFFFFFFFF
105 #define ENET_TDES3_OWN 0x80000000
106 #define ENET_TDES3_CTXT 0x40000000
107 #define ENET_TDES3_FD 0x20000000
108 #define ENET_TDES3_LD 0x10000000
109 #define ENET_TDES3_TTSS 0x00020000
110 #define ENET_TDES3_ES 0x00008000
111 #define ENET_TDES3_JT 0x00004000
112 #define ENET_TDES3_FF 0x00002000
113 #define ENET_TDES3_PCE 0x00001000
114 #define ENET_TDES3_LOC 0x00000800
115 #define ENET_TDES3_NC 0x00000400
116 #define ENET_TDES3_LC 0x00000200
117 #define ENET_TDES3_EC 0x00000100
118 #define ENET_TDES3_CC 0x000000F0
119 #define ENET_TDES3_ED 0x00000008
120 #define ENET_TDES3_UF 0x00000004
121 #define ENET_TDES3_DB 0x00000002
122 #define ENET_TDES3_IHE 0x00000001
123 
124 //Receive normal descriptor (read format)
125 #define ENET_RDES0_BUF1AP 0xFFFFFFFF
126 #define ENET_RDES2_BUF2AP 0xFFFFFFFF
127 #define ENET_RDES3_OWN 0x80000000
128 #define ENET_RDES3_IOC 0x40000000
129 #define ENET_RDES3_BUF2V 0x02000000
130 #define ENET_RDES3_BUF1V 0x01000000
131 
132 //Receive normal descriptor (write-back format)
133 #define ENET_RDES1_OPC 0xFFFF0000
134 #define ENET_RDES1_TD 0x00008000
135 #define ENET_RDES1_TSA 0x00004000
136 #define ENET_RDES1_PV 0x00002000
137 #define ENET_RDES1_PFT 0x00001000
138 #define ENET_RDES1_PMT 0x00000F00
139 #define ENET_RDES1_IPCE 0x00000080
140 #define ENET_RDES1_IPCB 0x00000040
141 #define ENET_RDES1_IPV6 0x00000020
142 #define ENET_RDES1_IPV4 0x00000010
143 #define ENET_RDES1_IPHE 0x00000008
144 #define ENET_RDES1_PT 0x00000007
145 #define ENET_RDES2_MADRM 0x07F80000
146 #define ENET_RDES2_DAF 0x00020000
147 #define ENET_RDES2_SAF 0x00010000
148 #define ENET_RDES3_OWN 0x80000000
149 #define ENET_RDES3_CTXT 0x40000000
150 #define ENET_RDES3_FD 0x20000000
151 #define ENET_RDES3_LD 0x10000000
152 #define ENET_RDES3_RS2V 0x08000000
153 #define ENET_RDES3_RS1V 0x04000000
154 #define ENET_RDES3_RS0V 0x02000000
155 #define ENET_RDES3_CE 0x01000000
156 #define ENET_RDES3_GP 0x00800000
157 #define ENET_RDES3_RWT 0x00400000
158 #define ENET_RDES3_OE 0x00200000
159 #define ENET_RDES3_RE 0x00100000
160 #define ENET_RDES3_DE 0x00080000
161 #define ENET_RDES3_LT 0x00070000
162 #define ENET_RDES3_ES 0x00008000
163 #define ENET_RDES3_PL 0x00007FFF
164 
165 //C++ guard
166 #ifdef __cplusplus
167 extern "C" {
168 #endif
169 
170 
171 /**
172  * @brief Transmit descriptor
173  **/
174 
175 typedef struct
176 {
177  uint32_t tdes0;
178  uint32_t tdes1;
179  uint32_t tdes2;
180  uint32_t tdes3;
182 
183 
184 /**
185  * @brief Receive descriptor
186  **/
187 
188 typedef struct
189 {
190  uint32_t rdes0;
191  uint32_t rdes1;
192  uint32_t rdes2;
193  uint32_t rdes3;
195 
196 
197 //LPC546xx Ethernet MAC driver
198 extern const NicDriver lpc546xxEthDriver;
199 
200 //LPC546xx Ethernet MAC related functions
202 void lpc546xxEthInitGpio(NetInterface *interface);
203 void lpc546xxEthInitDmaDesc(NetInterface *interface);
204 
205 void lpc546xxEthTick(NetInterface *interface);
206 
207 void lpc546xxEthEnableIrq(NetInterface *interface);
208 void lpc546xxEthDisableIrq(NetInterface *interface);
209 void lpc546xxEthEventHandler(NetInterface *interface);
210 
212  const NetBuffer *buffer, size_t offset);
213 
215 
218 
219 void lpc546xxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
220  uint8_t regAddr, uint16_t data);
221 
222 uint16_t lpc546xxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
223  uint8_t regAddr);
224 
225 //C++ guard
226 #ifdef __cplusplus
227 }
228 #endif
229 
230 #endif
uint8_t opcode
Definition: dns_common.h:172
void lpc546xxEthEnableIrq(NetInterface *interface)
Enable interrupts.
error_t lpc546xxEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
Receive descriptor.
error_t lpc546xxEthReceivePacket(NetInterface *interface)
Receive a packet.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
uint16_t lpc546xxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
const NicDriver lpc546xxEthDriver
LPC546xx Ethernet MAC driver.
Transmit descriptor.
void lpc546xxEthInitGpio(NetInterface *interface)
error_t
Error codes.
Definition: error.h:42
void lpc546xxEthEventHandler(NetInterface *interface)
LPC546xx Ethernet MAC event handler.
#define NetInterface
Definition: net.h:36
void lpc546xxEthDisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t regAddr
Network interface controller abstraction layer.
void lpc546xxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
void lpc546xxEthInitDmaDesc(NetInterface *interface)
Initialize DMA descriptor lists.
error_t lpc546xxEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
error_t lpc546xxEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
uint8_t data[]
Definition: dtls_misc.h:176
NIC driver.
Definition: nic.h:179
error_t lpc546xxEthInit(NetInterface *interface)
LPC546xx Ethernet MAC initialization.
void lpc546xxEthTick(NetInterface *interface)
LPC546xx Ethernet MAC timer handler.