s7g2_eth_driver.h File Reference

Renesas Synergy S7G2 Ethernet MAC controller. More...

#include "core/nic.h"

Go to the source code of this file.

Data Structures

struct  S7g2TxDmaDesc
 Transmit DMA descriptor. More...
 
struct  S7g2RxDmaDesc
 Receive DMA descriptor. More...
 

Macros

#define S7G2_ETH_TX_BUFFER_COUNT   3
 
#define S7G2_ETH_TX_BUFFER_SIZE   1536
 
#define S7G2_ETH_RX_BUFFER_COUNT   6
 
#define S7G2_ETH_RX_BUFFER_SIZE   1536
 
#define S7G2_ETH_IRQ_PRIORITY_GROUPING   3
 
#define S7G2_ETH_IRQ_GROUP_PRIORITY   12
 
#define S7G2_ETH_IRQ_SUB_PRIORITY   0
 
#define EDMAC_EESR_TWB   0x40000000
 
#define EDMAC_EESR_TABT   0x04000000
 
#define EDMAC_EESR_RABT   0x02000000
 
#define EDMAC_EESR_RFCOF   0x01000000
 
#define EDMAC_EESR_ADE   0x00800000
 
#define EDMAC_EESR_ECI   0x00400000
 
#define EDMAC_EESR_TC   0x00200000
 
#define EDMAC_EESR_TDE   0x00100000
 
#define EDMAC_EESR_TFUF   0x00080000
 
#define EDMAC_EESR_FR   0x00040000
 
#define EDMAC_EESR_RDE   0x00020000
 
#define EDMAC_EESR_RFOF   0x00010000
 
#define EDMAC_EESR_CND   0x00000800
 
#define EDMAC_EESR_DLC   0x00000400
 
#define EDMAC_EESR_CD   0x00000200
 
#define EDMAC_EESR_TRO   0x00000100
 
#define EDMAC_EESR_RMAF   0x00000080
 
#define EDMAC_EESR_RRF   0x00000010
 
#define EDMAC_EESR_RTLF   0x00000008
 
#define EDMAC_EESR_RTSF   0x00000004
 
#define EDMAC_EESR_PRE   0x00000002
 
#define EDMAC_EESR_CERF   0x00000001
 
#define EDMAC_TD0_TACT   0x80000000
 
#define EDMAC_TD0_TDLE   0x40000000
 
#define EDMAC_TD0_TFP_SOF   0x20000000
 
#define EDMAC_TD0_TFP_EOF   0x10000000
 
#define EDMAC_TD0_TFE   0x08000000
 
#define EDMAC_TD0_TWBI   0x04000000
 
#define EDMAC_TD0_TFS_MASK   0x0000010F
 
#define EDMAC_TD0_TFS_TABT   0x00000100
 
#define EDMAC_TD0_TFS_CND   0x00000008
 
#define EDMAC_TD0_TFS_DLC   0x00000004
 
#define EDMAC_TD0_TFS_CD   0x00000002
 
#define EDMAC_TD0_TFS_TRO   0x00000001
 
#define EDMAC_TD1_TBL   0xFFFF0000
 
#define EDMAC_TD2_TBA   0xFFFFFFFF
 
#define EDMAC_RD0_RACT   0x80000000
 
#define EDMAC_RD0_RDLE   0x40000000
 
#define EDMAC_RD0_RFP_SOF   0x20000000
 
#define EDMAC_RD0_RFP_EOF   0x10000000
 
#define EDMAC_RD0_RFE   0x08000000
 
#define EDMAC_RD0_RFS_MASK   0x0000039F
 
#define EDMAC_RD0_RFS_RFOF   0x00000200
 
#define EDMAC_RD0_RFS_RABT   0x00000100
 
#define EDMAC_RD0_RFS_RMAF   0x00000080
 
#define EDMAC_RD0_RFS_RRF   0x00000010
 
#define EDMAC_RD0_RFS_RTLF   0x00000008
 
#define EDMAC_RD0_RFS_RTSF   0x00000004
 
#define EDMAC_RD0_RFS_PRE   0x00000002
 
#define EDMAC_RD0_RFS_CERF   0x00000001
 
#define EDMAC_RD1_RBL   0xFFFF0000
 
#define EDMAC_RD1_RFL   0x0000FFFF
 
#define EDMAC_RD2_RBA   0xFFFFFFFF
 
#define SMI_SYNC   0xFFFFFFFF
 
#define SMI_START   0x00000001
 
#define SMI_WRITE   0x00000001
 
#define SMI_READ   0x00000002
 
#define SMI_TA   0x00000002
 

Functions

error_t s7g2EthInit (NetInterface *interface)
 S7G2 Ethernet MAC initialization. More...
 
void s7g2EthInitGpio (NetInterface *interface)
 
void s7g2EthInitDmaDesc (NetInterface *interface)
 Initialize DMA descriptor lists. More...
 
void s7g2EthTick (NetInterface *interface)
 S7G2 Ethernet MAC timer handler. More...
 
void s7g2EthEnableIrq (NetInterface *interface)
 Enable interrupts. More...
 
void s7g2EthDisableIrq (NetInterface *interface)
 Disable interrupts. More...
 
void s7g2EthEventHandler (NetInterface *interface)
 S7G2 Ethernet MAC event handler. More...
 
error_t s7g2EthSendPacket (NetInterface *interface, const NetBuffer *buffer, size_t offset)
 Send a packet. More...
 
error_t s7g2EthReceivePacket (NetInterface *interface)
 Receive a packet. More...
 
error_t s7g2EthUpdateMacAddrFilter (NetInterface *interface)
 Configure MAC address filtering. More...
 
error_t s7g2EthUpdateMacConfig (NetInterface *interface)
 Adjust MAC configuration parameters for proper operation. More...
 
void s7g2EthWritePhyReg (uint8_t phyAddr, uint8_t regAddr, uint16_t data)
 Write PHY register. More...
 
uint16_t s7g2EthReadPhyReg (uint8_t phyAddr, uint8_t regAddr)
 Read PHY register. More...
 
void s7g2EthWriteSmi (uint32_t data, uint_t length)
 SMI write operation. More...
 
uint32_t s7g2EthReadSmi (uint_t length)
 SMI read operation. More...
 

Variables

const NicDriver s7g2EthDriver
 S7G2 Ethernet MAC driver. More...
 

Detailed Description

Renesas Synergy S7G2 Ethernet MAC controller.

License

Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author
Oryx Embedded SARL (www.oryx-embedded.com)
Version
1.9.0

Definition in file s7g2_eth_driver.h.

Macro Definition Documentation

◆ EDMAC_EESR_ADE

#define EDMAC_EESR_ADE   0x00800000

Definition at line 89 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_CD

#define EDMAC_EESR_CD   0x00000200

Definition at line 99 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_CERF

#define EDMAC_EESR_CERF   0x00000001

Definition at line 106 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_CND

#define EDMAC_EESR_CND   0x00000800

Definition at line 97 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_DLC

#define EDMAC_EESR_DLC   0x00000400

Definition at line 98 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_ECI

#define EDMAC_EESR_ECI   0x00400000

Definition at line 90 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_FR

#define EDMAC_EESR_FR   0x00040000

Definition at line 94 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_PRE

#define EDMAC_EESR_PRE   0x00000002

Definition at line 105 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_RABT

#define EDMAC_EESR_RABT   0x02000000

Definition at line 87 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_RDE

#define EDMAC_EESR_RDE   0x00020000

Definition at line 95 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_RFCOF

#define EDMAC_EESR_RFCOF   0x01000000

Definition at line 88 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_RFOF

#define EDMAC_EESR_RFOF   0x00010000

Definition at line 96 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_RMAF

#define EDMAC_EESR_RMAF   0x00000080

Definition at line 101 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_RRF

#define EDMAC_EESR_RRF   0x00000010

Definition at line 102 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_RTLF

#define EDMAC_EESR_RTLF   0x00000008

Definition at line 103 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_RTSF

#define EDMAC_EESR_RTSF   0x00000004

Definition at line 104 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_TABT

#define EDMAC_EESR_TABT   0x04000000

Definition at line 86 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_TC

#define EDMAC_EESR_TC   0x00200000

Definition at line 91 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_TDE

#define EDMAC_EESR_TDE   0x00100000

Definition at line 92 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_TFUF

#define EDMAC_EESR_TFUF   0x00080000

Definition at line 93 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_TRO

#define EDMAC_EESR_TRO   0x00000100

Definition at line 100 of file s7g2_eth_driver.h.

◆ EDMAC_EESR_TWB

#define EDMAC_EESR_TWB   0x40000000

Definition at line 85 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RACT

#define EDMAC_RD0_RACT   0x80000000

Definition at line 125 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RDLE

#define EDMAC_RD0_RDLE   0x40000000

Definition at line 126 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFE

#define EDMAC_RD0_RFE   0x08000000

Definition at line 129 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFP_EOF

#define EDMAC_RD0_RFP_EOF   0x10000000

Definition at line 128 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFP_SOF

#define EDMAC_RD0_RFP_SOF   0x20000000

Definition at line 127 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFS_CERF

#define EDMAC_RD0_RFS_CERF   0x00000001

Definition at line 138 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFS_MASK

#define EDMAC_RD0_RFS_MASK   0x0000039F

Definition at line 130 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFS_PRE

#define EDMAC_RD0_RFS_PRE   0x00000002

Definition at line 137 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFS_RABT

#define EDMAC_RD0_RFS_RABT   0x00000100

Definition at line 132 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFS_RFOF

#define EDMAC_RD0_RFS_RFOF   0x00000200

Definition at line 131 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFS_RMAF

#define EDMAC_RD0_RFS_RMAF   0x00000080

Definition at line 133 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFS_RRF

#define EDMAC_RD0_RFS_RRF   0x00000010

Definition at line 134 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFS_RTLF

#define EDMAC_RD0_RFS_RTLF   0x00000008

Definition at line 135 of file s7g2_eth_driver.h.

◆ EDMAC_RD0_RFS_RTSF

#define EDMAC_RD0_RFS_RTSF   0x00000004

Definition at line 136 of file s7g2_eth_driver.h.

◆ EDMAC_RD1_RBL

#define EDMAC_RD1_RBL   0xFFFF0000

Definition at line 139 of file s7g2_eth_driver.h.

◆ EDMAC_RD1_RFL

#define EDMAC_RD1_RFL   0x0000FFFF

Definition at line 140 of file s7g2_eth_driver.h.

◆ EDMAC_RD2_RBA

#define EDMAC_RD2_RBA   0xFFFFFFFF

Definition at line 141 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TACT

#define EDMAC_TD0_TACT   0x80000000

Definition at line 109 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TDLE

#define EDMAC_TD0_TDLE   0x40000000

Definition at line 110 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TFE

#define EDMAC_TD0_TFE   0x08000000

Definition at line 113 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TFP_EOF

#define EDMAC_TD0_TFP_EOF   0x10000000

Definition at line 112 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TFP_SOF

#define EDMAC_TD0_TFP_SOF   0x20000000

Definition at line 111 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TFS_CD

#define EDMAC_TD0_TFS_CD   0x00000002

Definition at line 119 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TFS_CND

#define EDMAC_TD0_TFS_CND   0x00000008

Definition at line 117 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TFS_DLC

#define EDMAC_TD0_TFS_DLC   0x00000004

Definition at line 118 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TFS_MASK

#define EDMAC_TD0_TFS_MASK   0x0000010F

Definition at line 115 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TFS_TABT

#define EDMAC_TD0_TFS_TABT   0x00000100

Definition at line 116 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TFS_TRO

#define EDMAC_TD0_TFS_TRO   0x00000001

Definition at line 120 of file s7g2_eth_driver.h.

◆ EDMAC_TD0_TWBI

#define EDMAC_TD0_TWBI   0x04000000

Definition at line 114 of file s7g2_eth_driver.h.

◆ EDMAC_TD1_TBL

#define EDMAC_TD1_TBL   0xFFFF0000

Definition at line 121 of file s7g2_eth_driver.h.

◆ EDMAC_TD2_TBA

#define EDMAC_TD2_TBA   0xFFFFFFFF

Definition at line 122 of file s7g2_eth_driver.h.

◆ S7G2_ETH_IRQ_GROUP_PRIORITY

#define S7G2_ETH_IRQ_GROUP_PRIORITY   12

Definition at line 72 of file s7g2_eth_driver.h.

◆ S7G2_ETH_IRQ_PRIORITY_GROUPING

#define S7G2_ETH_IRQ_PRIORITY_GROUPING   3

Definition at line 65 of file s7g2_eth_driver.h.

◆ S7G2_ETH_IRQ_SUB_PRIORITY

#define S7G2_ETH_IRQ_SUB_PRIORITY   0

Definition at line 79 of file s7g2_eth_driver.h.

◆ S7G2_ETH_RX_BUFFER_COUNT

#define S7G2_ETH_RX_BUFFER_COUNT   6

Definition at line 51 of file s7g2_eth_driver.h.

◆ S7G2_ETH_RX_BUFFER_SIZE

#define S7G2_ETH_RX_BUFFER_SIZE   1536

Definition at line 58 of file s7g2_eth_driver.h.

◆ S7G2_ETH_TX_BUFFER_COUNT

#define S7G2_ETH_TX_BUFFER_COUNT   3

Definition at line 37 of file s7g2_eth_driver.h.

◆ S7G2_ETH_TX_BUFFER_SIZE

#define S7G2_ETH_TX_BUFFER_SIZE   1536

Definition at line 44 of file s7g2_eth_driver.h.

◆ SMI_READ

#define SMI_READ   0x00000002

Definition at line 147 of file s7g2_eth_driver.h.

◆ SMI_START

#define SMI_START   0x00000001

Definition at line 145 of file s7g2_eth_driver.h.

◆ SMI_SYNC

#define SMI_SYNC   0xFFFFFFFF

Definition at line 144 of file s7g2_eth_driver.h.

◆ SMI_TA

#define SMI_TA   0x00000002

Definition at line 148 of file s7g2_eth_driver.h.

◆ SMI_WRITE

#define SMI_WRITE   0x00000001

Definition at line 146 of file s7g2_eth_driver.h.

Function Documentation

◆ s7g2EthDisableIrq()

void s7g2EthDisableIrq ( NetInterface interface)

Disable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 357 of file s7g2_eth_driver.c.

◆ s7g2EthEnableIrq()

void s7g2EthEnableIrq ( NetInterface interface)

Enable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 343 of file s7g2_eth_driver.c.

◆ s7g2EthEventHandler()

void s7g2EthEventHandler ( NetInterface interface)

S7G2 Ethernet MAC event handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 423 of file s7g2_eth_driver.c.

◆ s7g2EthInit()

error_t s7g2EthInit ( NetInterface interface)

S7G2 Ethernet MAC initialization.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 113 of file s7g2_eth_driver.c.

◆ s7g2EthInitDmaDesc()

void s7g2EthInitDmaDesc ( NetInterface interface)

Initialize DMA descriptor lists.

Parameters
[in]interfaceUnderlying network interface

Definition at line 275 of file s7g2_eth_driver.c.

◆ s7g2EthInitGpio()

void s7g2EthInitGpio ( NetInterface interface)

◆ s7g2EthReadPhyReg()

uint16_t s7g2EthReadPhyReg ( uint8_t  phyAddr,
uint8_t  regAddr 
)

Read PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
Returns
Register value

Definition at line 690 of file s7g2_eth_driver.c.

◆ s7g2EthReadSmi()

uint32_t s7g2EthReadSmi ( uint_t  length)

SMI read operation.

Parameters
[in]lengthNumber of bits to be read
Returns
Data resulting from the MDIO read operation

Definition at line 758 of file s7g2_eth_driver.c.

◆ s7g2EthReceivePacket()

error_t s7g2EthReceivePacket ( NetInterface interface)

Receive a packet.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 523 of file s7g2_eth_driver.c.

◆ s7g2EthSendPacket()

error_t s7g2EthSendPacket ( NetInterface interface,
const NetBuffer buffer,
size_t  offset 
)

Send a packet.

Parameters
[in]interfaceUnderlying network interface
[in]bufferMulti-part buffer containing the data to send
[in]offsetOffset to the first data byte
Returns
Error code

Definition at line 457 of file s7g2_eth_driver.c.

◆ s7g2EthTick()

void s7g2EthTick ( NetInterface interface)

S7G2 Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters
[in]interfaceUnderlying network interface

Definition at line 331 of file s7g2_eth_driver.c.

◆ s7g2EthUpdateMacAddrFilter()

error_t s7g2EthUpdateMacAddrFilter ( NetInterface interface)

Configure MAC address filtering.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 597 of file s7g2_eth_driver.c.

◆ s7g2EthUpdateMacConfig()

error_t s7g2EthUpdateMacConfig ( NetInterface interface)

Adjust MAC configuration parameters for proper operation.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 636 of file s7g2_eth_driver.c.

◆ s7g2EthWritePhyReg()

void s7g2EthWritePhyReg ( uint8_t  phyAddr,
uint8_t  regAddr,
uint16_t  data 
)

Write PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
[in]dataRegister value

Definition at line 662 of file s7g2_eth_driver.c.

◆ s7g2EthWriteSmi()

void s7g2EthWriteSmi ( uint32_t  data,
uint_t  length 
)

SMI write operation.

Parameters
[in]dataRaw data to be written
[in]lengthNumber of bits to be written

Definition at line 722 of file s7g2_eth_driver.c.

Variable Documentation

◆ s7g2EthDriver

const NicDriver s7g2EthDriver

S7G2 Ethernet MAC driver.

Definition at line 86 of file s7g2_eth_driver.c.