sama5d3_gigabit_eth_driver.h File Reference

SAMA5D3 Gigabit Ethernet MAC controller. More...

Go to the source code of this file.

Data Structures

struct  Sama5d3TxBufferDesc
 Transmit buffer descriptor. More...
 
struct  Sama5d3RxBufferDesc
 Receive buffer descriptor. More...
 

Macros

#define SAMA5D3_GIGABIT_ETH_TX_BUFFER_COUNT   2
 
#define SAMA5D3_GIGABIT_ETH_TX_BUFFER_SIZE   1536
 
#define SAMA5D3_GIGABIT_ETH_RX_BUFFER_COUNT   96
 
#define SAMA5D3_GIGABIT_ETH_RX_BUFFER_SIZE   128
 
#define SAMA5D3_GIGABIT_ETH_IRQ_PRIORITY   0
 
#define GMAC_RGMII_MASK
 
#define GMAC_TX_USED   0x80000000
 
#define GMAC_TX_WRAP   0x40000000
 
#define GMAC_TX_RLE_ERROR   0x20000000
 
#define GMAC_TX_UNDERRUN_ERROR   0x10000000
 
#define GMAC_TX_AHB_ERROR   0x08000000
 
#define GMAC_TX_LATE_COL_ERROR   0x04000000
 
#define GMAC_TX_CHECKSUM_ERROR   0x00700000
 
#define GMAC_TX_NO_CRC   0x00010000
 
#define GMAC_TX_LAST   0x00008000
 
#define GMAC_TX_LENGTH   0x00003FFF
 
#define GMAC_RX_ADDRESS   0xFFFFFFFC
 
#define GMAC_RX_WRAP   0x00000002
 
#define GMAC_RX_OWNERSHIP   0x00000001
 
#define GMAC_RX_BROADCAST   0x80000000
 
#define GMAC_RX_MULTICAST_HASH   0x40000000
 
#define GMAC_RX_UNICAST_HASH   0x20000000
 
#define GMAC_RX_SAR   0x08000000
 
#define GMAC_RX_SAR_MASK   0x06000000
 
#define GMAC_RX_TYPE_ID   0x01000000
 
#define GMAC_RX_SNAP   0x01000000
 
#define GMAC_RX_TYPE_ID_MASK   0x00C00000
 
#define GMAC_RX_CHECKSUM_VALID   0x00C00000
 
#define GMAC_RX_VLAN_TAG   0x00200000
 
#define GMAC_RX_PRIORITY_TAG   0x00100000
 
#define GMAC_RX_VLAN_PRIORITY   0x000E0000
 
#define GMAC_RX_CFI   0x00010000
 
#define GMAC_RX_EOF   0x00008000
 
#define GMAC_RX_SOF   0x00004000
 
#define GMAC_RX_LENGTH_MSB   0x00002000
 
#define GMAC_RX_BAD_FCS   0x00002000
 
#define GMAC_RX_LENGTH   0x00001FFF
 

Functions

error_t sama5d3GigabitEthInit (NetInterface *interface)
 SAMA5D3 Gigabit Ethernet MAC initialization. More...
 
void sama5d3GigabitEthInitGpio (NetInterface *interface)
 
void sama5d3GigabitEthInitBufferDesc (NetInterface *interface)
 Initialize buffer descriptors. More...
 
void sama5d3GigabitEthTick (NetInterface *interface)
 SAMA5D3 Gigabit Ethernet MAC timer handler. More...
 
void sama5d3GigabitEthEnableIrq (NetInterface *interface)
 Enable interrupts. More...
 
void sama5d3GigabitEthDisableIrq (NetInterface *interface)
 Disable interrupts. More...
 
void sama5d3GigabitEthIrqHandler (void)
 SAMA5D3 Gigabit Ethernet MAC interrupt service routine. More...
 
void sama5d3GigabitEthEventHandler (NetInterface *interface)
 SAMA5D3 Gigabit Ethernet MAC event handler. More...
 
error_t sama5d3GigabitEthSendPacket (NetInterface *interface, const NetBuffer *buffer, size_t offset)
 Send a packet. More...
 
error_t sama5d3GigabitEthReceivePacket (NetInterface *interface)
 Receive a packet. More...
 
error_t sama5d3GigabitEthUpdateMacAddrFilter (NetInterface *interface)
 Configure MAC address filtering. More...
 
error_t sama5d3GigabitEthUpdateMacConfig (NetInterface *interface)
 Adjust MAC configuration parameters for proper operation. More...
 
void sama5d3GigabitEthWritePhyReg (uint8_t phyAddr, uint8_t regAddr, uint16_t data)
 Write PHY register. More...
 
uint16_t sama5d3GigabitEthReadPhyReg (uint8_t phyAddr, uint8_t regAddr)
 Read PHY register. More...
 

Variables

const NicDriver sama5d3GigabitEthDriver
 SAMA5D3 Gigabit Ethernet MAC driver. More...
 

Detailed Description

SAMA5D3 Gigabit Ethernet MAC controller.

License

Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author
Oryx Embedded SARL (www.oryx-embedded.com)
Version
1.9.0

Definition in file sama5d3_gigabit_eth_driver.h.

Macro Definition Documentation

◆ GMAC_RGMII_MASK

#define GMAC_RGMII_MASK
Value:
(PIO_PB18A_G125CK | \
PIO_PB17A_GMDIO | PIO_PB16A_GMDC | PIO_PB13A_GRXER | \
PIO_PB12A_GRXDV | PIO_PB11A_GRXCK | PIO_PB9A_GTXEN | \
PIO_PB8A_GTXCK | PIO_PB7A_GRX3 | PIO_PB6A_GRX2 | \
PIO_PB5A_GRX1 | PIO_PB4A_GRX0 | PIO_PB3A_GTX3 | \
PIO_PB2A_GTX2 | PIO_PB1A_GTX1 | PIO_PB0A_GTX0)

Definition at line 68 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_ADDRESS

#define GMAC_RX_ADDRESS   0xFFFFFFFC

Definition at line 88 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_BAD_FCS

#define GMAC_RX_BAD_FCS   0x00002000

Definition at line 107 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_BROADCAST

#define GMAC_RX_BROADCAST   0x80000000

Definition at line 91 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_CFI

#define GMAC_RX_CFI   0x00010000

Definition at line 103 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_CHECKSUM_VALID

#define GMAC_RX_CHECKSUM_VALID   0x00C00000

Definition at line 99 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_EOF

#define GMAC_RX_EOF   0x00008000

Definition at line 104 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_LENGTH

#define GMAC_RX_LENGTH   0x00001FFF

Definition at line 108 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_LENGTH_MSB

#define GMAC_RX_LENGTH_MSB   0x00002000

Definition at line 106 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_MULTICAST_HASH

#define GMAC_RX_MULTICAST_HASH   0x40000000

Definition at line 92 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_OWNERSHIP

#define GMAC_RX_OWNERSHIP   0x00000001

Definition at line 90 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_PRIORITY_TAG

#define GMAC_RX_PRIORITY_TAG   0x00100000

Definition at line 101 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_SAR

#define GMAC_RX_SAR   0x08000000

Definition at line 94 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_SAR_MASK

#define GMAC_RX_SAR_MASK   0x06000000

Definition at line 95 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_SNAP

#define GMAC_RX_SNAP   0x01000000

Definition at line 97 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_SOF

#define GMAC_RX_SOF   0x00004000

Definition at line 105 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_TYPE_ID

#define GMAC_RX_TYPE_ID   0x01000000

Definition at line 96 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_TYPE_ID_MASK

#define GMAC_RX_TYPE_ID_MASK   0x00C00000

Definition at line 98 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_UNICAST_HASH

#define GMAC_RX_UNICAST_HASH   0x20000000

Definition at line 93 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_VLAN_PRIORITY

#define GMAC_RX_VLAN_PRIORITY   0x000E0000

Definition at line 102 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_VLAN_TAG

#define GMAC_RX_VLAN_TAG   0x00200000

Definition at line 100 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_RX_WRAP

#define GMAC_RX_WRAP   0x00000002

Definition at line 89 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_AHB_ERROR

#define GMAC_TX_AHB_ERROR   0x08000000

Definition at line 80 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_CHECKSUM_ERROR

#define GMAC_TX_CHECKSUM_ERROR   0x00700000

Definition at line 82 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_LAST

#define GMAC_TX_LAST   0x00008000

Definition at line 84 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_LATE_COL_ERROR

#define GMAC_TX_LATE_COL_ERROR   0x04000000

Definition at line 81 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_LENGTH

#define GMAC_TX_LENGTH   0x00003FFF

Definition at line 85 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_NO_CRC

#define GMAC_TX_NO_CRC   0x00010000

Definition at line 83 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_RLE_ERROR

#define GMAC_TX_RLE_ERROR   0x20000000

Definition at line 78 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_UNDERRUN_ERROR

#define GMAC_TX_UNDERRUN_ERROR   0x10000000

Definition at line 79 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_USED

#define GMAC_TX_USED   0x80000000

Definition at line 76 of file sama5d3_gigabit_eth_driver.h.

◆ GMAC_TX_WRAP

#define GMAC_TX_WRAP   0x40000000

Definition at line 77 of file sama5d3_gigabit_eth_driver.h.

◆ SAMA5D3_GIGABIT_ETH_IRQ_PRIORITY

#define SAMA5D3_GIGABIT_ETH_IRQ_PRIORITY   0

Definition at line 62 of file sama5d3_gigabit_eth_driver.h.

◆ SAMA5D3_GIGABIT_ETH_RX_BUFFER_COUNT

#define SAMA5D3_GIGABIT_ETH_RX_BUFFER_COUNT   96

Definition at line 48 of file sama5d3_gigabit_eth_driver.h.

◆ SAMA5D3_GIGABIT_ETH_RX_BUFFER_SIZE

#define SAMA5D3_GIGABIT_ETH_RX_BUFFER_SIZE   128

Definition at line 55 of file sama5d3_gigabit_eth_driver.h.

◆ SAMA5D3_GIGABIT_ETH_TX_BUFFER_COUNT

#define SAMA5D3_GIGABIT_ETH_TX_BUFFER_COUNT   2

Definition at line 34 of file sama5d3_gigabit_eth_driver.h.

◆ SAMA5D3_GIGABIT_ETH_TX_BUFFER_SIZE

#define SAMA5D3_GIGABIT_ETH_TX_BUFFER_SIZE   1536

Definition at line 41 of file sama5d3_gigabit_eth_driver.h.

Function Documentation

◆ sama5d3GigabitEthDisableIrq()

void sama5d3GigabitEthDisableIrq ( NetInterface interface)

Disable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 308 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthEnableIrq()

void sama5d3GigabitEthEnableIrq ( NetInterface interface)

Enable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 292 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthEventHandler()

void sama5d3GigabitEthEventHandler ( NetInterface interface)

SAMA5D3 Gigabit Ethernet MAC event handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 380 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthInit()

error_t sama5d3GigabitEthInit ( NetInterface interface)

SAMA5D3 Gigabit Ethernet MAC initialization.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 117 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthInitBufferDesc()

void sama5d3GigabitEthInitBufferDesc ( NetInterface interface)

Initialize buffer descriptors.

Parameters
[in]interfaceUnderlying network interface

Definition at line 227 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthInitGpio()

void sama5d3GigabitEthInitGpio ( NetInterface interface)

◆ sama5d3GigabitEthIrqHandler()

void sama5d3GigabitEthIrqHandler ( void  )

SAMA5D3 Gigabit Ethernet MAC interrupt service routine.

Definition at line 323 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthReadPhyReg()

uint16_t sama5d3GigabitEthReadPhyReg ( uint8_t  phyAddr,
uint8_t  regAddr 
)

Read PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
Returns
Register value

Definition at line 730 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthReceivePacket()

error_t sama5d3GigabitEthReceivePacket ( NetInterface interface)

Receive a packet.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 479 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthSendPacket()

error_t sama5d3GigabitEthSendPacket ( NetInterface interface,
const NetBuffer buffer,
size_t  offset 
)

Send a packet.

Parameters
[in]interfaceUnderlying network interface
[in]bufferMulti-part buffer containing the data to send
[in]offsetOffset to the first data byte
Returns
Error code

Definition at line 414 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthTick()

void sama5d3GigabitEthTick ( NetInterface interface)

SAMA5D3 Gigabit Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters
[in]interfaceUnderlying network interface

Definition at line 280 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthUpdateMacAddrFilter()

error_t sama5d3GigabitEthUpdateMacAddrFilter ( NetInterface interface)

Configure MAC address filtering.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 593 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthUpdateMacConfig()

error_t sama5d3GigabitEthUpdateMacConfig ( NetInterface interface)

Adjust MAC configuration parameters for proper operation.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 656 of file sama5d3_gigabit_eth_driver.c.

◆ sama5d3GigabitEthWritePhyReg()

void sama5d3GigabitEthWritePhyReg ( uint8_t  phyAddr,
uint8_t  regAddr,
uint16_t  data 
)

Write PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
[in]dataRegister value

Definition at line 703 of file sama5d3_gigabit_eth_driver.c.

Variable Documentation

◆ sama5d3GigabitEthDriver

const NicDriver sama5d3GigabitEthDriver

SAMA5D3 Gigabit Ethernet MAC driver.

Definition at line 90 of file sama5d3_gigabit_eth_driver.c.