CycloneSTP
Spanning Tree Protocol Library (STP and RSTP)
CycloneSTP is an implementation of STP (Spanning Tree Protocol) and RSTP (Rapid Spanning Tree Protocol) algorithms suitable for resource-constrained microcontrollers. STP and RSTP are network protocols that can be implemented on Ethernet bridges to ensure loop-free LAN topologies. Spanning Tree Protocol allows a network design with multiple physical paths and backup links for redundancy purpose. If a link fails, STP or RSTP automatically reconfigures the network to establish a new loop-free tree topology.
CycloneSTP is available either as open source (GPLv2 license) or under a royalty-free commercial license (non-GPL license). We also propose an evaluation license (90-day license in source form) with technical support for an easier onboarding and effective evaluation of our software.
Main Features
- STP (Spanning Tree Protocol) implementation
- RSTP (Rapid Spanning Tree Protocol) implementation for faster convergence
- Prevents creation of loops
- Automatic reconfiguration of the tree in case of topology changes
- RSTP is designated to be backward compatible with STP
- Comprehensive user API to configure Spanning Tree Protocol parameters
- Supports BRIDGE-MIB (RFC 4188) to remotely manage and monitor STP operation
- Support RSTP-MIB (RFC 4318) to remotely manage RSTP-specific parameters
- Flexible memory footprint. Built-time configuration to embed only the necessary features
- Portable architecture (no processor dependencies)
- The library is distributed as a full ANSI C and highly maintainable source code
Supported Ethernet Switches
CycloneSTP supports 100Base-TX and Gigabit Ethernet switches from IC+, Marvell and Microchip.
| Manufacturer | Part NumberP/N | Ports | Speed |
|---|---|---|---|
Marvell |
88E6020 | 4 | 100Base-TX |
| 88E6060 | 6 | 100Base-TX | |
| 88E6071 | 7 | 100Base-TX | |
| 88E6240 | 7 | 1000Base-T | |
Microchip |
KSZ8463 | 3 | 100Base-TX |
| KSZ8563 | 3 | 100Base-TX | |
| KSZ8565 | 5 | 100Base-TX | |
| KSZ8567 | 7 | 100Base-TX | |
| KSZ8863 | 3 | 100Base-TX | |
| KSZ8864 | 4 | 100Base-TX | |
| KSZ8873 | 3 | 100Base-TX | |
| KSZ8895 | 5 | 100Base-TX | |
| KSZ9477 | 7 | 1000Base-T | |
| KSZ9563 | 3 | 1000Base-T | |
| KSZ9567 | 7 | 1000Base-T | |
| KSZ9893 | 3 | 1000Base-T | |
| KSZ9896 | 6 | 1000Base-T | |
| KSZ9897 | 7 | 1000Base-T | |
| LAN9303 | 3 | 100Base-TX | |
| LAN9353 | 3 | 100Base-TX | |
| LAN9354 | 3 | 100Base-TX | |
| LAN9355 | 3 | 100Base-TX | |
| LAN9646 | 6 | 1000Base-T |
- ARM Cortex-M3
- ARM Cortex-M4
- ARM Cortex-M7
- ARM Cortex-M33
- ARM Cortex-M55
- ARM Cortex-M85
- ARM Cortex-R4
- ARM Cortex-A5
- ARM Cortex-A7
- ARM Cortex-A8
- ARM Cortex-A9
- ARM Cortex-A55
- Legacy ARM7TDMI / ARM926EJ-S
- RISC-V
- MIPS M4K
- MIPS microAptiv / M-Class
- Infineon TriCore AURIX
- PowerPC e200
- Coldfire V2
- RX600
- AVR32
- Xtensa LX6
- Amazon FreeRTOS
- SafeRTOS
- ChibiOS/RT
- CMSIS-RTOS
- CMSIS-RTOS2
- CMX-RTX
- Eclipse ThreadX
- Keil RTXv4 and RTXv5
- Micrium µC/OS-II and µC/OS-III
- PX5 RTOS
- Segger embOS
- TI-RTOS (SYS/BIOS)
- Zephyr RTOS
- Bare Metal programming (without RTOS)
| Toolchain / IDE | Compiler |
|---|---|
| Makefile | GCC |
| AC6 System Workbench for STM32 (SW4STM32) | GCC |
| Atollic TrueSTUDIO | GCC |
| Espressif ESP-IDF | GCC |
| HighTec Toolset for TriCore | GCC |
| IAR Embedded Workbench | EWARM, EWRX |
| Infineon DAVE | GCC |
| Keil MDK-ARM | ARM Compiler v5, ARM Compiler v6 (CLANG) |
| Microchip Studio (Atmel Studio) | GCC |
| Microchip MPLAB X | GCC, XC32 |
| Microsoft Visual Studio | MSVC |
| NXP MCUXpresso | GCC |
| NXP S32 Design Studio (S32DS) | GCC |
| Renesas e2Studio | GCC, CC-RX |
| Segger Embedded Studio | GCC |
| ST STM32CubeIDE | GCC |
| Tasking VX-Toolset | VX-Toolset for TriCore |
| TI Code Composer Studio (CSS) | GCC, ARM-CGT |
IEEE
- IEEE Std 802.1D-1998: IEEE Standard for Local Area Network MAC (Media Access Control) Bridges
- IEEE Std 802.1D-2004: IEEE Standard for Local and metropolitan area networks: Media Access Control (MAC) Bridges