adin1200_driver.c
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1 /**
2  * @file adin1200_driver.c
3  * @brief ADIN1200 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief ADIN1200 Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief ADIN1200 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  uint16_t value;
63 
64  //Debug message
65  TRACE_INFO("Initializing ADIN1200...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = ADIN1200_PHY_ADDR;
72  }
73 
74  //Initialize serial management interface
75  if(interface->smiDriver != NULL)
76  {
77  interface->smiDriver->init();
78  }
79 
80  //Initialize external interrupt line driver
81  if(interface->extIntDriver != NULL)
82  {
83  interface->extIntDriver->init();
84  }
85 
86  //Reset PHY transceiver
89 
90  //Wait for the reset to complete
91  while(adin1200ReadPhyReg(interface, ADIN1200_MII_CONTROL) &
93  {
94  }
95 
96  //Dump PHY registers for debugging purpose
97  adin1200DumpPhyReg(interface);
98 
99  //The PHY will generate interrupts when link status changes are detected
102 
103  //Set the function of the INT_N pin
106 
107  //Exit software power-down
111 
112  //Perform custom configuration
113  adin1200InitHook(interface);
114 
115  //Force the TCP/IP stack to poll the link state at startup
116  interface->phyEvent = TRUE;
117  //Notify the TCP/IP stack of the event
119 
120  //Successful initialization
121  return NO_ERROR;
122 }
123 
124 
125 /**
126  * @brief ADIN1200 custom configuration
127  * @param[in] interface Underlying network interface
128  **/
129 
130 __weak_func void adin1200InitHook(NetInterface *interface)
131 {
132 }
133 
134 
135 /**
136  * @brief ADIN1200 timer handler
137  * @param[in] interface Underlying network interface
138  **/
139 
140 void adin1200Tick(NetInterface *interface)
141 {
142  uint16_t value;
143  bool_t linkState;
144 
145  //No external interrupt line driver?
146  if(interface->extIntDriver == NULL)
147  {
148  //Read basic status register
150  //Retrieve current link state
152 
153  //Link up event?
154  if(linkState && !interface->linkState)
155  {
156  //Set event flag
157  interface->phyEvent = TRUE;
158  //Notify the TCP/IP stack of the event
160  }
161  //Link down event?
162  else if(!linkState && interface->linkState)
163  {
164  //Set event flag
165  interface->phyEvent = TRUE;
166  //Notify the TCP/IP stack of the event
168  }
169  }
170 }
171 
172 
173 /**
174  * @brief Enable interrupts
175  * @param[in] interface Underlying network interface
176  **/
177 
179 {
180  //Enable PHY transceiver interrupts
181  if(interface->extIntDriver != NULL)
182  {
183  interface->extIntDriver->enableIrq();
184  }
185 }
186 
187 
188 /**
189  * @brief Disable interrupts
190  * @param[in] interface Underlying network interface
191  **/
192 
194 {
195  //Disable PHY transceiver interrupts
196  if(interface->extIntDriver != NULL)
197  {
198  interface->extIntDriver->disableIrq();
199  }
200 }
201 
202 
203 /**
204  * @brief ADIN1200 event handler
205  * @param[in] interface Underlying network interface
206  **/
207 
209 {
210  uint16_t value;
211 
212  //Read IRQ status register to acknowledge the interrupt
214 
215  //Link status change?
217  {
218  //Read PHY status register
220 
221  //Link is up?
223  {
224  //The HCD_TECH field indicates the resolved technology after the link
225  //is established
227  {
228  //10BASE-T half-duplex
230  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
231  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
232  break;
233 
234  //10BASE-T full-duplex
236  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
237  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
238  break;
239 
240  //100BASE-TX half-duplex
242  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
243  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
244  break;
245 
246  //100BASE-TX full-duplex
248  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
249  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
250  break;
251 
252  //Unknown operation mode
253  default:
254  //Debug message
255  TRACE_WARNING("Invalid operation mode!\r\n");
256  break;
257  }
258 
259  //Update link state
260  interface->linkState = TRUE;
261 
262  //Adjust MAC configuration parameters for proper operation
263  interface->nicDriver->updateMacConfig(interface);
264  }
265  else
266  {
267  //Update link state
268  interface->linkState = FALSE;
269  }
270 
271  //Process link state change event
272  nicNotifyLinkChange(interface);
273  }
274 }
275 
276 
277 /**
278  * @brief Write PHY register
279  * @param[in] interface Underlying network interface
280  * @param[in] address PHY register address
281  * @param[in] data Register value
282  **/
283 
284 void adin1200WritePhyReg(NetInterface *interface, uint8_t address,
285  uint16_t data)
286 {
287  //Write the specified PHY register
288  if(interface->smiDriver != NULL)
289  {
290  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
291  interface->phyAddr, address, data);
292  }
293  else
294  {
295  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
296  interface->phyAddr, address, data);
297  }
298 }
299 
300 
301 /**
302  * @brief Read PHY register
303  * @param[in] interface Underlying network interface
304  * @param[in] address PHY register address
305  * @return Register value
306  **/
307 
308 uint16_t adin1200ReadPhyReg(NetInterface *interface, uint8_t address)
309 {
310  uint16_t data;
311 
312  //Read the specified PHY register
313  if(interface->smiDriver != NULL)
314  {
315  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
316  interface->phyAddr, address);
317  }
318  else
319  {
320  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
321  interface->phyAddr, address);
322  }
323 
324  //Return the value of the PHY register
325  return data;
326 }
327 
328 
329 /**
330  * @brief Dump PHY registers for debugging purpose
331  * @param[in] interface Underlying network interface
332  **/
333 
335 {
336  uint8_t i;
337 
338  //Loop through PHY registers
339  for(i = 0; i < 32; i++)
340  {
341  //Display current PHY register
342  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
343  adin1200ReadPhyReg(interface, i));
344  }
345 
346  //Terminate with a line feed
347  TRACE_DEBUG("\r\n");
348 }
349 
350 
351 /**
352  * @brief Write extended register
353  * @param[in] interface Underlying network interface
354  * @param[in] address Extended register address
355  * @param[in] data Register value
356  **/
357 
358 void adin1200WriteExtReg(NetInterface *interface, uint16_t address,
359  uint16_t data)
360 {
361  //The EXT_REG_PTR and EXT_REG_DATA registers provide a mechanism to access
362  //the indirect access address map via directly accessible registers
364 
365  //Write the content of the extended register
367 }
368 
369 
370 /**
371  * @brief Read extended register
372  * @param[in] interface Underlying network interface
373  * @param[in] address Extended register address
374  * @return Register value
375  **/
376 
377 uint16_t adin1200ReadExtReg(NetInterface *interface, uint16_t address)
378 {
379  //The EXT_REG_PTR and EXT_REG_DATA registers provide a mechanism to access
380  //the indirect access address map via directly accessible registers
382 
383  //Read the content of the extended register
384  return adin1200ReadPhyReg(interface, ADIN1200_EXT_REG_DATA);
385 }
__weak_func void adin1200InitHook(NetInterface *interface)
ADIN1200 custom configuration.
void adin1200EventHandler(NetInterface *interface)
ADIN1200 event handler.
const PhyDriver adin1200PhyDriver
ADIN1200 Ethernet PHY driver.
void adin1200WriteExtReg(NetInterface *interface, uint16_t address, uint16_t data)
Write extended register.
void adin1200EnableIrq(NetInterface *interface)
Enable interrupts.
uint16_t adin1200ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void adin1200DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
void adin1200Tick(NetInterface *interface)
ADIN1200 timer handler.
uint16_t adin1200ReadExtReg(NetInterface *interface, uint16_t address)
Read extended register.
void adin1200WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
error_t adin1200Init(NetInterface *interface)
ADIN1200 PHY transceiver initialization.
void adin1200DisableIrq(NetInterface *interface)
Disable interrupts.
ADIN1200 Ethernet PHY driver.
#define ADIN1200_IRQ_MASK_LNK_STAT_CHNG_IRQ_EN
#define ADIN1200_PHY_STATUS_1
#define ADIN1200_PHY_STATUS_1_LINK_STAT
#define ADIN1200_MII_CONTROL_SFT_PD
#define ADIN1200_PHY_STATUS_1_HCD_TECH_100BTX_HD
#define ADIN1200_PHY_ADDR
#define ADIN1200_IRQ_MASK_HW_IRQ_EN
#define ADIN1200_IRQ_MASK
#define ADIN1200_IRQ_STATUS
#define ADIN1200_EXT_REG_DATA
#define ADIN1200_PHY_STATUS_1_HCD_TECH_10BT_FD
#define ADIN1200_GE_IO_INT_N_OR_CNTRL
#define ADIN1200_GE_IO_INT_N_OR_CNTRL_GE_IO_INT_N_OR_CNTRL_DEFAULT
#define ADIN1200_PHY_STATUS_1_HCD_TECH_10BT_HD
#define ADIN1200_MII_CONTROL_SFT_RST
#define ADIN1200_PHY_STATUS_1_HCD_TECH
#define ADIN1200_MII_STATUS_LINK_STAT_LAT
#define ADIN1200_IRQ_STATUS_LNK_STAT_CHNG_IRQ_STAT
#define ADIN1200_MII_CONTROL
#define ADIN1200_MII_STATUS
#define ADIN1200_EXT_REG_PTR
#define ADIN1200_PHY_STATUS_1_HCD_TECH_100BTX_FD
int bool_t
Definition: compiler_port.h:53
Debugging facilities.
#define TRACE_DEBUG(...)
Definition: debug.h:107
#define TRACE_WARNING(...)
Definition: debug.h:85
#define TRACE_INFO(...)
Definition: debug.h:95
error_t
Error codes.
Definition: error.h:43
@ NO_ERROR
Success.
Definition: error.h:44
uint8_t data[]
Definition: ethernet.h:222
Ipv6Addr address[]
Definition: ipv6.h:316
TCP/IP stack core.
#define NetInterface
Definition: net.h:36
#define netEvent
Definition: net_legacy.h:196
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:548
#define SMI_OPCODE_WRITE
Definition: nic.h:66
#define SMI_OPCODE_READ
Definition: nic.h:67
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
#define TRUE
Definition: os_port.h:50
#define FALSE
Definition: os_port.h:46
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
Ethernet PHY driver.
Definition: nic.h:308
uint8_t value[]
Definition: tcp.h:369