rtl8201_driver.c
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1 /**
2  * @file rtl8201_driver.c
3  * @brief RTL8201 Gigabit Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief RTL8201 Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief RTL8201 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  uint16_t temp;
63 
64  //Debug message
65  TRACE_INFO("Initializing RTL8201...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = RTL8201_PHY_ADDR;
72  }
73 
74  //Initialize serial management interface
75  if(interface->smiDriver != NULL)
76  {
77  interface->smiDriver->init();
78  }
79 
80  //Initialize external interrupt line driver
81  if(interface->extIntDriver != NULL)
82  {
83  interface->extIntDriver->init();
84  }
85 
86  //Reset PHY transceiver
88 
89  //Wait for the reset to complete
91  {
92  }
93 
94  //Dump PHY registers for debugging purpose
95  rtl8201DumpPhyReg(interface);
96 
97  //Select page 7
98  rtl8201WritePhyReg(interface, RTL8201_PDR, 7);
99 
100  //The PHY will generate interrupts when link status changes are detected
101  temp = rtl8201ReadPhyReg(interface, RTL8201_IWELFR);
103  rtl8201WritePhyReg(interface, RTL8201_IWELFR, temp);
104 
105  //Select page 0
106  rtl8201WritePhyReg(interface, RTL8201_PDR, 0);
107 
108  //Perform custom configuration
109  rtl8201InitHook(interface);
110 
111  //Force the TCP/IP stack to poll the link state at startup
112  interface->phyEvent = TRUE;
113  //Notify the TCP/IP stack of the event
115 
116  //Successful initialization
117  return NO_ERROR;
118 }
119 
120 
121 /**
122  * @brief RTL8201 custom configuration
123  * @param[in] interface Underlying network interface
124  **/
125 
126 __weak_func void rtl8201InitHook(NetInterface *interface)
127 {
128 }
129 
130 
131 /**
132  * @brief RTL8201 timer handler
133  * @param[in] interface Underlying network interface
134  **/
135 
136 void rtl8201Tick(NetInterface *interface)
137 {
138  uint16_t value;
139  bool_t linkState;
140 
141  //No external interrupt line driver?
142  if(interface->extIntDriver == NULL)
143  {
144  //Read basic status register
145  value = rtl8201ReadPhyReg(interface, RTL8201_BMSR);
146  //Retrieve current link state
147  linkState = (value & RTL8201_BMSR_LINK_STATUS) ? TRUE : FALSE;
148 
149  //Link up event?
150  if(linkState && !interface->linkState)
151  {
152  //Set event flag
153  interface->phyEvent = TRUE;
154  //Notify the TCP/IP stack of the event
156  }
157  //Link down event?
158  else if(!linkState && interface->linkState)
159  {
160  //Set event flag
161  interface->phyEvent = TRUE;
162  //Notify the TCP/IP stack of the event
164  }
165  }
166 }
167 
168 
169 /**
170  * @brief Enable interrupts
171  * @param[in] interface Underlying network interface
172  **/
173 
175 {
176  //Enable PHY transceiver interrupts
177  if(interface->extIntDriver != NULL)
178  {
179  interface->extIntDriver->enableIrq();
180  }
181 }
182 
183 
184 /**
185  * @brief Disable interrupts
186  * @param[in] interface Underlying network interface
187  **/
188 
190 {
191  //Disable PHY transceiver interrupts
192  if(interface->extIntDriver != NULL)
193  {
194  interface->extIntDriver->disableIrq();
195  }
196 }
197 
198 
199 /**
200  * @brief RTL8201 event handler
201  * @param[in] interface Underlying network interface
202  **/
203 
205 {
206  uint16_t value;
207 
208  //Read status register to acknowledge the interrupt
209  value = rtl8201ReadPhyReg(interface, RTL8201_IISDR);
210 
211  //Link status change?
213  {
214  //Any link failure condition is latched in the BMSR register. Reading
215  //the register twice will always return the actual link status
216  value = rtl8201ReadPhyReg(interface, RTL8201_BMSR);
217  value = rtl8201ReadPhyReg(interface, RTL8201_BMSR);
218 
219  //Link is up?
220  if((value & RTL8201_BMSR_LINK_STATUS) != 0)
221  {
222  //Read BMCR register
223  value = rtl8201ReadPhyReg(interface, RTL8201_BMCR);
224 
225  //Check current speed
226  if((value & RTL8201_BMCR_SPEED_SEL_LSB) != 0)
227  {
228  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
229  }
230  else
231  {
232  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
233  }
234 
235  //Check current duplex mode
236  if((value & RTL8201_BMCR_DUPLEX_MODE) != 0)
237  {
238  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
239  }
240  else
241  {
242  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
243  }
244 
245  //Update link state
246  interface->linkState = TRUE;
247 
248  //Adjust MAC configuration parameters for proper operation
249  interface->nicDriver->updateMacConfig(interface);
250  }
251  else
252  {
253  //Update link state
254  interface->linkState = FALSE;
255  }
256 
257  //Process link state change event
258  nicNotifyLinkChange(interface);
259  }
260 }
261 
262 
263 /**
264  * @brief Write PHY register
265  * @param[in] interface Underlying network interface
266  * @param[in] address PHY register address
267  * @param[in] data Register value
268  **/
269 
270 void rtl8201WritePhyReg(NetInterface *interface, uint8_t address,
271  uint16_t data)
272 {
273  //Write the specified PHY register
274  if(interface->smiDriver != NULL)
275  {
276  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
277  interface->phyAddr, address, data);
278  }
279  else
280  {
281  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
282  interface->phyAddr, address, data);
283  }
284 }
285 
286 
287 /**
288  * @brief Read PHY register
289  * @param[in] interface Underlying network interface
290  * @param[in] address PHY register address
291  * @return Register value
292  **/
293 
294 uint16_t rtl8201ReadPhyReg(NetInterface *interface, uint8_t address)
295 {
296  uint16_t data;
297 
298  //Read the specified PHY register
299  if(interface->smiDriver != NULL)
300  {
301  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
302  interface->phyAddr, address);
303  }
304  else
305  {
306  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
307  interface->phyAddr, address);
308  }
309 
310  //Return the value of the PHY register
311  return data;
312 }
313 
314 
315 /**
316  * @brief Dump PHY registers for debugging purpose
317  * @param[in] interface Underlying network interface
318  **/
319 
321 {
322  uint8_t i;
323 
324  //Loop through PHY registers
325  for(i = 0; i < 32; i++)
326  {
327  //Display current PHY register
328  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
329  rtl8201ReadPhyReg(interface, i));
330  }
331 
332  //Terminate with a line feed
333  TRACE_DEBUG("\r\n");
334 }
335 
336 
337 /**
338  * @brief Write MMD register
339  * @param[in] interface Underlying network interface
340  * @param[in] devAddr Device address
341  * @param[in] regAddr Register address
342  * @param[in] data MMD register value
343  **/
344 
345 void rtl8201WriteMmdReg(NetInterface *interface, uint8_t devAddr,
346  uint16_t regAddr, uint16_t data)
347 {
348  //Select register operation
349  rtl8201WritePhyReg(interface, RTL8201_MACR,
351 
352  //Write MMD register address
354 
355  //Select data operation
356  rtl8201WritePhyReg(interface, RTL8201_MACR,
358 
359  //Write the content of the MMD register
361 }
362 
363 
364 /**
365  * @brief Read MMD register
366  * @param[in] interface Underlying network interface
367  * @param[in] devAddr Device address
368  * @param[in] regAddr Register address
369  * @return MMD register value
370  **/
371 
372 uint16_t rtl8201ReadMmdReg(NetInterface *interface, uint8_t devAddr,
373  uint16_t regAddr)
374 {
375  //Select register operation
376  rtl8201WritePhyReg(interface, RTL8201_MACR,
378 
379  //Write MMD register address
381 
382  //Select data operation
383  rtl8201WritePhyReg(interface, RTL8201_MACR,
385 
386  //Read the content of the MMD register
387  return rtl8201ReadPhyReg(interface, RTL8201_MAADR);
388 }
int bool_t
Definition: compiler_port.h:53
Debugging facilities.
#define TRACE_DEBUG(...)
Definition: debug.h:107
#define TRACE_INFO(...)
Definition: debug.h:95
error_t
Error codes.
Definition: error.h:43
@ NO_ERROR
Success.
Definition: error.h:44
uint8_t data[]
Definition: ethernet.h:222
Ipv6Addr address[]
Definition: ipv6.h:316
uint16_t regAddr
TCP/IP stack core.
#define NetInterface
Definition: net.h:36
#define netEvent
Definition: net_legacy.h:196
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:548
#define SMI_OPCODE_WRITE
Definition: nic.h:66
#define SMI_OPCODE_READ
Definition: nic.h:67
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
#define TRUE
Definition: os_port.h:50
#define FALSE
Definition: os_port.h:46
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
uint16_t rtl8201ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void rtl8201EventHandler(NetInterface *interface)
RTL8201 event handler.
void rtl8201WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
void rtl8201EnableIrq(NetInterface *interface)
Enable interrupts.
void rtl8201Tick(NetInterface *interface)
RTL8201 timer handler.
uint16_t rtl8201ReadMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr)
Read MMD register.
error_t rtl8201Init(NetInterface *interface)
RTL8201 PHY transceiver initialization.
__weak_func void rtl8201InitHook(NetInterface *interface)
RTL8201 custom configuration.
void rtl8201DisableIrq(NetInterface *interface)
Disable interrupts.
void rtl8201WriteMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr, uint16_t data)
Write MMD register.
void rtl8201DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
const PhyDriver rtl8201PhyDriver
RTL8201 Ethernet PHY driver.
RTL8201 Gigabit Ethernet PHY driver.
#define RTL8201_MACR_DEVAD
#define RTL8201_MACR_FUNC_ADDR
#define RTL8201_BMSR
#define RTL8201_BMSR_LINK_STATUS
#define RTL8201_IWELFR
#define RTL8201_MACR_FUNC_DATA_NO_POST_INC
#define RTL8201_PHY_ADDR
#define RTL8201_IWELFR_INT_LINK_CHG
#define RTL8201_MAADR
#define RTL8201_BMCR
#define RTL8201_MACR
#define RTL8201_BMCR_SPEED_SEL_LSB
#define RTL8201_BMCR_RESET
#define RTL8201_IISDR_LINK_STATUS_CHG
#define RTL8201_IISDR
#define RTL8201_BMCR_DUPLEX_MODE
#define RTL8201_PDR
Ethernet PHY driver.
Definition: nic.h:308
uint8_t value[]
Definition: tcp.h:369