sama5d3_eth2_driver.h File Reference

SAMA5D3 Gigabit Ethernet MAC driver (GMAC instance) More...

Go to the source code of this file.

Data Structures
struct	Sama5d3Eth2TxBufferDesc
	Transmit buffer descriptor. More...
struct	Sama5d3Eth2RxBufferDesc
	Receive buffer descriptor. More...

Macros
#define	SAMA5D3_ETH2_TX_BUFFER_COUNT   2
#define	SAMA5D3_ETH2_TX_BUFFER_SIZE   1536
#define	SAMA5D3_ETH2_RX_BUFFER_COUNT   96
#define	SAMA5D3_ETH2_RX_BUFFER_SIZE   128
#define	SAMA5D3_ETH2_IRQ_PRIORITY   0
#define	SAMA5D3_ETH2_RAM_SECTION   ".ram_no_cache"
#define	GMAC_RGMII_MASK
#define	GMAC_TX_USED   0x80000000
#define	GMAC_TX_WRAP   0x40000000
#define	GMAC_TX_RLE_ERROR   0x20000000
#define	GMAC_TX_UNDERRUN_ERROR   0x10000000
#define	GMAC_TX_AHB_ERROR   0x08000000
#define	GMAC_TX_LATE_COL_ERROR   0x04000000
#define	GMAC_TX_CHECKSUM_ERROR   0x00700000
#define	GMAC_TX_NO_CRC   0x00010000
#define	GMAC_TX_LAST   0x00008000
#define	GMAC_TX_LENGTH   0x00003FFF
#define	GMAC_RX_ADDRESS   0xFFFFFFFC
#define	GMAC_RX_WRAP   0x00000002
#define	GMAC_RX_OWNERSHIP   0x00000001
#define	GMAC_RX_BROADCAST   0x80000000
#define	GMAC_RX_MULTICAST_HASH   0x40000000
#define	GMAC_RX_UNICAST_HASH   0x20000000
#define	GMAC_RX_SAR   0x08000000
#define	GMAC_RX_SAR_MASK   0x06000000
#define	GMAC_RX_TYPE_ID   0x01000000
#define	GMAC_RX_SNAP   0x01000000
#define	GMAC_RX_TYPE_ID_MASK   0x00C00000
#define	GMAC_RX_CHECKSUM_VALID   0x00C00000
#define	GMAC_RX_VLAN_TAG   0x00200000
#define	GMAC_RX_PRIORITY_TAG   0x00100000
#define	GMAC_RX_VLAN_PRIORITY   0x000E0000
#define	GMAC_RX_CFI   0x00010000
#define	GMAC_RX_EOF   0x00008000
#define	GMAC_RX_SOF   0x00004000
#define	GMAC_RX_LENGTH_MSB   0x00002000
#define	GMAC_RX_BAD_FCS   0x00002000
#define	GMAC_RX_LENGTH   0x00001FFF

Functions
error_t	sama5d3Eth2Init (NetInterface *interface)
	SAMA5D3 Ethernet MAC initialization. More...
void	sama5d3Eth2InitGpio (NetInterface *interface)
	GPIO configuration. More...
void	sama5d3Eth2InitBufferDesc (NetInterface *interface)
	Initialize buffer descriptors. More...
void	sama5d3Eth2Tick (NetInterface *interface)
	SAMA5D3 Ethernet MAC timer handler. More...
void	sama5d3Eth2EnableIrq (NetInterface *interface)
	Enable interrupts. More...
void	sama5d3Eth2DisableIrq (NetInterface *interface)
	Disable interrupts. More...
void	sama5d3Eth2IrqHandler (void)
	SAMA5D3 Ethernet MAC interrupt service routine. More...
void	sama5d3Eth2EventHandler (NetInterface *interface)
	SAMA5D3 Ethernet MAC event handler. More...
error_t	sama5d3Eth2SendPacket (NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
	Send a packet. More...
error_t	sama5d3Eth2ReceivePacket (NetInterface *interface)
	Receive a packet. More...
error_t	sama5d3Eth2UpdateMacAddrFilter (NetInterface *interface)
	Configure MAC address filtering. More...
error_t	sama5d3Eth2UpdateMacConfig (NetInterface *interface)
	Adjust MAC configuration parameters for proper operation. More...
void	sama5d3Eth2WritePhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
	Write PHY register. More...
uint16_t	sama5d3Eth2ReadPhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
	Read PHY register. More...

Variables
const NicDriver	sama5d3Eth2Driver
	SAMA5D3 Ethernet MAC driver (GMAC instance) More...

Detailed Description

SAMA5D3 Gigabit Ethernet MAC driver (GMAC instance)

License

SPDX-License-Identifier: GPL-2.0-or-later

Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author

Oryx Embedded SARL (www.oryx-embedded.com)

Version

2.4.0

Definition in file sama5d3_eth2_driver.h.

Macro Definition Documentation

GMAC_RGMII_MASK

#define GMAC_RGMII_MASK

Value:

   (PIO_PB18A_G125CK | \
   PIO_PB17A_GMDIO | PIO_PB16A_GMDC | PIO_PB13A_GRXER | \
   PIO_PB12A_GRXDV | PIO_PB11A_GRXCK | PIO_PB9A_GTXEN | \
   PIO_PB8A_GTXCK | PIO_PB7A_GRX3 | PIO_PB6A_GRX2 | \
   PIO_PB5A_GRX1 | PIO_PB4A_GRX0 | PIO_PB3A_GTX3 | \
   PIO_PB2A_GTX2 | PIO_PB1A_GTX1 | PIO_PB0A_GTX0)

Definition at line 75 of file sama5d3_eth2_driver.h.

GMAC_RX_ADDRESS

#define GMAC_RX_ADDRESS   0xFFFFFFFC

Definition at line 95 of file sama5d3_eth2_driver.h.

GMAC_RX_BAD_FCS

#define GMAC_RX_BAD_FCS   0x00002000

Definition at line 114 of file sama5d3_eth2_driver.h.

GMAC_RX_BROADCAST

#define GMAC_RX_BROADCAST   0x80000000

Definition at line 98 of file sama5d3_eth2_driver.h.

GMAC_RX_CFI

#define GMAC_RX_CFI   0x00010000

Definition at line 110 of file sama5d3_eth2_driver.h.

GMAC_RX_CHECKSUM_VALID

#define GMAC_RX_CHECKSUM_VALID   0x00C00000

Definition at line 106 of file sama5d3_eth2_driver.h.

GMAC_RX_EOF

#define GMAC_RX_EOF   0x00008000

Definition at line 111 of file sama5d3_eth2_driver.h.

GMAC_RX_LENGTH

#define GMAC_RX_LENGTH   0x00001FFF

Definition at line 115 of file sama5d3_eth2_driver.h.

GMAC_RX_LENGTH_MSB

#define GMAC_RX_LENGTH_MSB   0x00002000

Definition at line 113 of file sama5d3_eth2_driver.h.

GMAC_RX_MULTICAST_HASH

#define GMAC_RX_MULTICAST_HASH   0x40000000

Definition at line 99 of file sama5d3_eth2_driver.h.

GMAC_RX_OWNERSHIP

#define GMAC_RX_OWNERSHIP   0x00000001

Definition at line 97 of file sama5d3_eth2_driver.h.

GMAC_RX_PRIORITY_TAG

#define GMAC_RX_PRIORITY_TAG   0x00100000

Definition at line 108 of file sama5d3_eth2_driver.h.

GMAC_RX_SAR

#define GMAC_RX_SAR   0x08000000

Definition at line 101 of file sama5d3_eth2_driver.h.

GMAC_RX_SAR_MASK

#define GMAC_RX_SAR_MASK   0x06000000

Definition at line 102 of file sama5d3_eth2_driver.h.

GMAC_RX_SNAP

#define GMAC_RX_SNAP   0x01000000

Definition at line 104 of file sama5d3_eth2_driver.h.

GMAC_RX_SOF

#define GMAC_RX_SOF   0x00004000

Definition at line 112 of file sama5d3_eth2_driver.h.

GMAC_RX_TYPE_ID

#define GMAC_RX_TYPE_ID   0x01000000

Definition at line 103 of file sama5d3_eth2_driver.h.

GMAC_RX_TYPE_ID_MASK

#define GMAC_RX_TYPE_ID_MASK   0x00C00000

Definition at line 105 of file sama5d3_eth2_driver.h.

GMAC_RX_UNICAST_HASH

#define GMAC_RX_UNICAST_HASH   0x20000000

Definition at line 100 of file sama5d3_eth2_driver.h.

GMAC_RX_VLAN_PRIORITY

#define GMAC_RX_VLAN_PRIORITY   0x000E0000

Definition at line 109 of file sama5d3_eth2_driver.h.

GMAC_RX_VLAN_TAG

#define GMAC_RX_VLAN_TAG   0x00200000

Definition at line 107 of file sama5d3_eth2_driver.h.

GMAC_RX_WRAP

#define GMAC_RX_WRAP   0x00000002

Definition at line 96 of file sama5d3_eth2_driver.h.

GMAC_TX_AHB_ERROR

#define GMAC_TX_AHB_ERROR   0x08000000

Definition at line 87 of file sama5d3_eth2_driver.h.

GMAC_TX_CHECKSUM_ERROR

#define GMAC_TX_CHECKSUM_ERROR   0x00700000

Definition at line 89 of file sama5d3_eth2_driver.h.

GMAC_TX_LAST

#define GMAC_TX_LAST   0x00008000

Definition at line 91 of file sama5d3_eth2_driver.h.

GMAC_TX_LATE_COL_ERROR

#define GMAC_TX_LATE_COL_ERROR   0x04000000

Definition at line 88 of file sama5d3_eth2_driver.h.

GMAC_TX_LENGTH

#define GMAC_TX_LENGTH   0x00003FFF

Definition at line 92 of file sama5d3_eth2_driver.h.

GMAC_TX_NO_CRC

#define GMAC_TX_NO_CRC   0x00010000

Definition at line 90 of file sama5d3_eth2_driver.h.

GMAC_TX_RLE_ERROR

#define GMAC_TX_RLE_ERROR   0x20000000

Definition at line 85 of file sama5d3_eth2_driver.h.

GMAC_TX_UNDERRUN_ERROR

#define GMAC_TX_UNDERRUN_ERROR   0x10000000

Definition at line 86 of file sama5d3_eth2_driver.h.

GMAC_TX_USED

#define GMAC_TX_USED   0x80000000

Definition at line 83 of file sama5d3_eth2_driver.h.

GMAC_TX_WRAP

#define GMAC_TX_WRAP   0x40000000

Definition at line 84 of file sama5d3_eth2_driver.h.

SAMA5D3_ETH2_IRQ_PRIORITY

#define SAMA5D3_ETH2_IRQ_PRIORITY   0

Definition at line 64 of file sama5d3_eth2_driver.h.

SAMA5D3_ETH2_RAM_SECTION

#define SAMA5D3_ETH2_RAM_SECTION   ".ram_no_cache"

Definition at line 71 of file sama5d3_eth2_driver.h.

SAMA5D3_ETH2_RX_BUFFER_COUNT

#define SAMA5D3_ETH2_RX_BUFFER_COUNT   96

Definition at line 50 of file sama5d3_eth2_driver.h.

SAMA5D3_ETH2_RX_BUFFER_SIZE

#define SAMA5D3_ETH2_RX_BUFFER_SIZE   128

Definition at line 57 of file sama5d3_eth2_driver.h.

SAMA5D3_ETH2_TX_BUFFER_COUNT

#define SAMA5D3_ETH2_TX_BUFFER_COUNT   2

Definition at line 36 of file sama5d3_eth2_driver.h.

SAMA5D3_ETH2_TX_BUFFER_SIZE

#define SAMA5D3_ETH2_TX_BUFFER_SIZE   1536

Definition at line 43 of file sama5d3_eth2_driver.h.

Function Documentation

sama5d3Eth2DisableIrq()

void sama5d3Eth2DisableIrq

(

NetInterface *

interface

)

Disable interrupts.

Parameters

[in]

interface

Underlying network interface

Definition at line 365 of file sama5d3_eth2_driver.c.

sama5d3Eth2EnableIrq()

void sama5d3Eth2EnableIrq

(

NetInterface *

interface

)

Enable interrupts.

Parameters

[in]

interface

Underlying network interface

Definition at line 336 of file sama5d3_eth2_driver.c.

sama5d3Eth2EventHandler()

void sama5d3Eth2EventHandler

(

NetInterface *

interface

)

SAMA5D3 Ethernet MAC event handler.

Parameters

[in]

interface

Underlying network interface

Definition at line 451 of file sama5d3_eth2_driver.c.

sama5d3Eth2Init()

error_t sama5d3Eth2Init

(

NetInterface *

interface

)

SAMA5D3 Ethernet MAC initialization.

Parameters

[in]

interface

Underlying network interface

Returns

Error code

Definition at line 119 of file sama5d3_eth2_driver.c.

sama5d3Eth2InitBufferDesc()

void sama5d3Eth2InitBufferDesc

(

NetInterface *

interface

)

Initialize buffer descriptors.

Parameters

[in]

interface

Underlying network interface

Definition at line 258 of file sama5d3_eth2_driver.c.

sama5d3Eth2InitGpio()

void sama5d3Eth2InitGpio

(

NetInterface *

interface

)

GPIO configuration.

Parameters

[in]

interface

Underlying network interface

Definition at line 230 of file sama5d3_eth2_driver.c.

sama5d3Eth2IrqHandler()

void sama5d3Eth2IrqHandler

(

void

)

SAMA5D3 Ethernet MAC interrupt service routine.

Definition at line 393 of file sama5d3_eth2_driver.c.

sama5d3Eth2ReadPhyReg()

uint16_t sama5d3Eth2ReadPhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr
	)

Read PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)

Returns

Register value

Definition at line 935 of file sama5d3_eth2_driver.c.

sama5d3Eth2ReceivePacket()

error_t sama5d3Eth2ReceivePacket

(

NetInterface *

interface

)

Receive a packet.

Parameters

[in]

interface

Underlying network interface

Returns

Error code

Definition at line 554 of file sama5d3_eth2_driver.c.

sama5d3Eth2SendPacket()

error_t sama5d3Eth2SendPacket	(	NetInterface *	interface,
		const NetBuffer *	buffer,
		size_t	offset,
		NetTxAncillary *	ancillary
	)

Send a packet.

Parameters

[in]	interface	Underlying network interface
[in]	buffer	Multi-part buffer containing the data to send
[in]	offset	Offset to the first data byte
[in]	ancillary	Additional options passed to the stack along with the packet

Returns

Error code

Definition at line 487 of file sama5d3_eth2_driver.c.

sama5d3Eth2Tick()

void sama5d3Eth2Tick

(

NetInterface *

interface

)

SAMA5D3 Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters

[in]

interface

Underlying network interface

Definition at line 311 of file sama5d3_eth2_driver.c.

sama5d3Eth2UpdateMacAddrFilter()

error_t sama5d3Eth2UpdateMacAddrFilter

(

NetInterface *

interface

)

Configure MAC address filtering.

Parameters

[in]

interface

Underlying network interface

Returns

Error code

Definition at line 686 of file sama5d3_eth2_driver.c.

sama5d3Eth2UpdateMacConfig()

error_t sama5d3Eth2UpdateMacConfig

(

NetInterface *

interface

)

Adjust MAC configuration parameters for proper operation.

Parameters

[in]

interface

Underlying network interface

Returns

Error code

Definition at line 844 of file sama5d3_eth2_driver.c.

sama5d3Eth2WritePhyReg()

void sama5d3Eth2WritePhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr,
		uint16_t	data
	)

Write PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)
[in]	data	Register value

Definition at line 896 of file sama5d3_eth2_driver.c.

Variable Documentation

sama5d3Eth2Driver

const NicDriver sama5d3Eth2Driver

extern

SAMA5D3 Ethernet MAC driver (GMAC instance)

Definition at line 92 of file sama5d3_eth2_driver.c.