ip101_driver.h
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1 /**
2  * @file ip101_driver.h
3  * @brief IC+ IP101 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 #ifndef _IP101_DRIVER_H
32 #define _IP101_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //PHY address
38 #ifndef IP101_PHY_ADDR
39  #define IP101_PHY_ADDR 1
40 #elif (IP101_PHY_ADDR < 0 || IP101_PHY_ADDR > 31)
41  #error IP101_PHY_ADDR parameter is not valid
42 #endif
43 
44 //IP101 PHY registers
45 #define IP101_BMCR 0x00
46 #define IP101_BMSR 0x01
47 #define IP101_PHYID1 0x02
48 #define IP101_PHYID2 0x03
49 #define IP101_ANAR 0x04
50 #define IP101_ANLPAR 0x05
51 #define IP101_ANER 0x06
52 #define IP101_ANNPR 0x07
53 #define IP101_ANLPNPR 0x08
54 #define IP101_MMDACR 0x0D
55 #define IP101_MMDAADR 0x0E
56 #define IP101_PHYSCR 0x10
57 #define IP101_ICSR 0x11
58 #define IP101_PHYSMR 0x12
59 #define IP101_IOSCR 0x1D
60 #define IP101_PHYMCSSR 0x1E
61 
62 //Control register
63 #define IP101_BMCR_RESET 0x8000
64 #define IP101_BMCR_LOOPBACK 0x4000
65 #define IP101_BMCR_SPEED_SEL 0x2000
66 #define IP101_BMCR_AN_EN 0x1000
67 #define IP101_BMCR_POWER_DOWN 0x0800
68 #define IP101_BMCR_ISOLATE 0x0400
69 #define IP101_BMCR_RESTART_AN 0x0200
70 #define IP101_BMCR_DUPLEX_MODE 0x0100
71 #define IP101_BMCR_COL_TEST 0x0080
72 
73 //Basic Status register
74 #define IP101_BMSR_100BT4 0x8000
75 #define IP101_BMSR_100BTX_FD 0x4000
76 #define IP101_BMSR_100BTX_HD 0x2000
77 #define IP101_BMSR_10BT_FD 0x1000
78 #define IP101_BMSR_10BT_HD 0x0800
79 #define IP101_BMSR_MF_PREAMBLE_SUPPR 0x0040
80 #define IP101_BMSR_AN_COMPLETE 0x0020
81 #define IP101_BMSR_REMOTE_FAULT 0x0010
82 #define IP101_BMSR_AN_CAPABLE 0x0008
83 #define IP101_BMSR_LINK_STATUS 0x0004
84 #define IP101_BMSR_JABBER_DETECT 0x0002
85 #define IP101_BMSR_EXTENDED_CAPABLE 0x0001
86 
87 //PHY Identifier 1 register
88 #define IP101_PHYID1_PHY_ID_MSB 0xFFFF
89 #define IP101_PHYID1_PHY_ID_MSB_DEFAULT 0x0243
90 
91 //PHY Identifier 2 register
92 #define IP101_PHYID2__DEFAULT 0xC54
93 
94 //Auto-Negotiation Advertisement register
95 #define IP101_ANAR_NEXT_PAGE 0x8000
96 #define IP101_ANAR_REMOTE_FAULT 0x2000
97 #define IP101_ANAR_ASYM_PAUSE 0x0800
98 #define IP101_ANAR_PAUSE 0x0400
99 #define IP101_ANAR_100BT4 0x0200
100 #define IP101_ANAR_100BTX_FD 0x0100
101 #define IP101_ANAR_100BTX_HD 0x0080
102 #define IP101_ANAR_10BT_FD 0x0040
103 #define IP101_ANAR_10BT_HD 0x0020
104 #define IP101_ANAR_SELECTOR 0x001F
105 #define IP101_ANAR_SELECTOR_DEFAULT 0x0001
106 
107 //Auto-Negotiation Link Partner Ability register
108 #define IP101_ANLPAR_NEXT_PAGE 0x8000
109 #define IP101_ANLPAR_ACK 0x4000
110 #define IP101_ANLPAR_REMOTE_FAULT 0x2000
111 #define IP101_ANLPAR_ASYM_PAUSE 0x0800
112 #define IP101_ANLPAR_PAUSE 0x0400
113 #define IP101_ANLPAR_100BT4 0x0200
114 #define IP101_ANLPAR_100BTX_FD 0x0100
115 #define IP101_ANLPAR_100BTX_HD 0x0080
116 #define IP101_ANLPAR_10BT_FD 0x0040
117 #define IP101_ANLPAR_10BT_HD 0x0020
118 #define IP101_ANLPAR_SELECTOR 0x001F
119 #define IP101_ANLPAR_SELECTOR_DEFAULT 0x0001
120 
121 //Auto-Negotiation Expansion register
122 #define IP101_ANER_MLF 0x0010
123 #define IP101_ANER_LP_NP_ABLE 0x0008
124 #define IP101_ANER_NP_ABLE 0x0004
125 #define IP101_ANER_PAGE_RX 0x0002
126 #define IP101_ANER_LP_AN_ABLE 0x0001
127 
128 //Auto-Negotiation Next Page Transmit register
129 #define IP101_ANNPR_NEXT_PAGE 0x8000
130 #define IP101_ANNPR_MSG_PAGE 0x2000
131 #define IP101_ANNPR_ACK2 0x1000
132 #define IP101_ANNPR_TOGGLE 0x0800
133 #define IP101_ANNPR_MESSAGE 0x07FF
134 
135 //Auto-Negotiation Link Partner Next Page register
136 #define IP101_ANLPNPR_NEXT_PAGE 0x8000
137 #define IP101_ANLPNPR_ACK 0x4000
138 #define IP101_ANLPNPR_MSG_PAGE 0x2000
139 #define IP101_ANLPNPR_ACK2 0x1000
140 #define IP101_ANLPNPR_TOGGLE 0x0800
141 #define IP101_ANLPNPR_MESSAGE 0x07FF
142 
143 //MMD Access Control register
144 #define IP101_MMDACR_FUNC 0xC000
145 #define IP101_MMDACR_FUNC_ADDR 0x0000
146 #define IP101_MMDACR_FUNC_DATA_NO_POST_INC 0x4000
147 #define IP101_MMDACR_FUNC_DATA_POST_INC_RW 0x8000
148 #define IP101_MMDACR_FUNC_DATA_POST_INC_W 0xC000
149 #define IP101_MMDACR_DEVAD 0x001F
150 
151 //PHY Specific Control register
152 #define IP101_PHYSCR_RMII_V10 0x2000
153 #define IP101_PHYSCR_RMII_V12 0x1000
154 #define IP101_PHYSCR_AUTO_MDIX_DIS 0x0800
155 #define IP101_PHYSCR_JABBER_EN 0x0200
156 #define IP101_PHYSCR_FEF_DIS 0x0100
157 #define IP101_PHYSCR_NWAY_PSAVE_DIS 0x0080
158 #define IP101_PHYSCR_BYPASS_DSP_RESET 0x0020
159 #define IP101_PHYSCR_REPEATER_MODE 0x0004
160 #define IP101_PHYSCR_LDPS_EN 0x0002
161 #define IP101_PHYSCR_ANALOG_OFF 0x0001
162 
163 //Interrupt Control/Status register
164 #define IP101_ICSR_INTR_EN 0x8000
165 #define IP101_ICSR_ALL_MASK 0x0800
166 #define IP101_ICSR_SPEED_MASK 0x0400
167 #define IP101_ICSR_DUPLEX_MASK 0x0200
168 #define IP101_ICSR_LINK_MASK 0x0100
169 #define IP101_ICSR_INTR_STATUS 0x0008
170 #define IP101_ICSR_SPEED_CHANGE 0x0004
171 #define IP101_ICSR_DUPLEX_CHANGE 0x0002
172 #define IP101_ICSR_LINK_CHANGE 0x0001
173 
174 //PHY Status Monitoring register
175 #define IP101_PHYSMR_SPEED 0x4000
176 #define IP101_PHYSMR_DUPLEX 0x2000
177 #define IP101_PHYSMR_AN_COMPLETE 0x0800
178 #define IP101_PHYSMR_LINK_UP 0x0400
179 #define IP101_PHYSMR_MDIX 0x0200
180 #define IP101_PHYSMR_POLARITY 0x0100
181 #define IP101_PHYSMR_JABBER 0x0080
182 #define IP101_PHYSMR_AN_ARBIT_STATE 0x000F
183 
184 //Digital I/O Specific Control register
185 #define IP101_IOSCR_RMII_WITH_ER 0x0080
186 #define IP101_IOSCR_SEL_INTR32 0x0004
187 
188 //PHY MDI/MDIX Control and Specific Status register
189 #define IP101_PHYMCSSR_LINK_UP 0x0100
190 #define IP101_PHYMCSSR_FORCE_MDIX 0x0008
191 #define IP101_PHYMCSSR_OP_MODE 0x0007
192 #define IP101_PHYMCSSR_OP_MODE_LINK_OFF 0x0000
193 #define IP101_PHYMCSSR_OP_MODE_10M_HD 0x0001
194 #define IP101_PHYMCSSR_OP_MODE_100M_HD 0x0002
195 #define IP101_PHYMCSSR_OP_MODE_10M_FD 0x0005
196 #define IP101_PHYMCSSR_OP_MODE_100M_FD 0x0006
197 
198 //C++ guard
199 #ifdef __cplusplus
200 extern "C" {
201 #endif
202 
203 //IP101 Ethernet PHY driver
204 extern const PhyDriver ip101PhyDriver;
205 
206 //IP101 related functions
207 error_t ip101Init(NetInterface *interface);
208 
209 void ip101Tick(NetInterface *interface);
210 
211 void ip101EnableIrq(NetInterface *interface);
212 void ip101DisableIrq(NetInterface *interface);
213 
214 void ip101EventHandler(NetInterface *interface);
215 
216 void ip101WritePhyReg(NetInterface *interface, uint8_t address,
217  uint16_t data);
218 
219 uint16_t ip101ReadPhyReg(NetInterface *interface, uint8_t address);
220 
221 void ip101DumpPhyReg(NetInterface *interface);
222 
223 //C++ guard
224 #ifdef __cplusplus
225 }
226 #endif
227 
228 #endif
const PhyDriver ip101PhyDriver
IP101 Ethernet PHY driver.
Definition: ip101_driver.c:44
void ip101DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
Definition: ip101_driver.c:247
PHY driver.
Definition: nic.h:214
error_t ip101Init(NetInterface *interface)
IP101 PHY transceiver initialization.
Definition: ip101_driver.c:62
void ip101EnableIrq(NetInterface *interface)
Enable interrupts.
Definition: ip101_driver.c:134
void ip101Tick(NetInterface *interface)
IP101 timer handler.
Definition: ip101_driver.c:100
void ip101WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
Definition: ip101_driver.c:218
error_t
Error codes.
Definition: error.h:42
#define NetInterface
Definition: net.h:36
void ip101DisableIrq(NetInterface *interface)
Disable interrupts.
Definition: ip101_driver.c:144
Network interface controller abstraction layer.
uint16_t ip101ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
Definition: ip101_driver.c:234
Ipv6Addr address
uint8_t data[]
Definition: dtls_misc.h:176
void ip101EventHandler(NetInterface *interface)
IP101 event handler.
Definition: ip101_driver.c:154