ksz8041_driver.h
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1 /**
2  * @file ksz8041_driver.h
3  * @brief KSZ8041 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _KSZ8041_DRIVER_H
30 #define _KSZ8041_DRIVER_H
31 
32 //Dependencies
33 #include "core/nic.h"
34 
35 //PHY address
36 #ifndef KSZ8041_PHY_ADDR
37  #define KSZ8041_PHY_ADDR 1
38 #elif (KSZ8041_PHY_ADDR < 0 || KSZ8041_PHY_ADDR > 31)
39  #error KSZ8041_PHY_ADDR parameter is not valid
40 #endif
41 
42 //KSZ8041 registers
43 #define KSZ8041_PHY_REG_BMCR 0x00
44 #define KSZ8041_PHY_REG_BMSR 0x01
45 #define KSZ8041_PHY_REG_PHYIDR1 0x02
46 #define KSZ8041_PHY_REG_PHYIDR2 0x03
47 #define KSZ8041_PHY_REG_ANAR 0x04
48 #define KSZ8041_PHY_REG_ANLPAR 0x05
49 #define KSZ8041_PHY_REG_ANER 0x06
50 #define KSZ8041_PHY_REG_ANNPTR 0x07
51 #define KSZ8041_PHY_REG_LPNPAR 0x08
52 #define KSZ8041_PHY_REG_MIICON 0x14
53 #define KSZ8041_PHY_REG_RXERCTR 0x15
54 #define KSZ8041_PHY_REG_ICSR 0x1B
55 #define KSZ8041_PHY_REG_PHYCON1 0x1E
56 #define KSZ8041_PHY_REG_PHYCON2 0x1F
57 
58 //BMCR register
59 #define BMCR_RESET (1 << 15)
60 #define BMCR_LOOPBACK (1 << 14)
61 #define BMCR_SPEED_SEL (1 << 13)
62 #define BMCR_AN_EN (1 << 12)
63 #define BMCR_POWER_DOWN (1 << 11)
64 #define BMCR_ISOLATE (1 << 10)
65 #define BMCR_RESTART_AN (1 << 9)
66 #define BMCR_DUPLEX_MODE (1 << 8)
67 #define BMCR_COL_TEST (1 << 7)
68 #define BMCR_TX_DIS (1 << 0)
69 
70 //BMSR register
71 #define BMSR_100BT4 (1 << 15)
72 #define BMSR_100BTX_FD (1 << 14)
73 #define BMSR_100BTX (1 << 13)
74 #define BMSR_10BT_FD (1 << 12)
75 #define BMSR_10BT (1 << 11)
76 #define BMSR_NO_PREAMBLE (1 << 6)
77 #define BMSR_AN_COMPLETE (1 << 5)
78 #define BMSR_REMOTE_FAULT (1 << 4)
79 #define BMSR_AN_ABLE (1 << 3)
80 #define BMSR_LINK_STATUS (1 << 2)
81 #define BMSR_JABBER_DETECT (1 << 1)
82 #define BMSR_EXTENDED_CAP (1 << 0)
83 
84 //ANAR register
85 #define ANAR_NEXT_PAGE (1 << 15)
86 #define ANAR_REMOTE_FAULT (1 << 13)
87 #define ANAR_PAUSE1 (1 << 11)
88 #define ANAR_PAUSE0 (1 << 10)
89 #define ANAR_100BT4 (1 << 9)
90 #define ANAR_100BTX_FD (1 << 8)
91 #define ANAR_100BTX (1 << 7)
92 #define ANAR_10BT_FD (1 << 6)
93 #define ANAR_10BT (1 << 5)
94 #define ANAR_SELECTOR4 (1 << 4)
95 #define ANAR_SELECTOR3 (1 << 3)
96 #define ANAR_SELECTOR2 (1 << 2)
97 #define ANAR_SELECTOR1 (1 << 1)
98 #define ANAR_SELECTOR0 (1 << 0)
99 
100 //ANLPAR register
101 #define ANLPAR_NEXT_PAGE (1 << 15)
102 #define ANLPAR_LP_ACK (1 << 14)
103 #define ANLPAR_REMOTE_FAULT (1 << 13)
104 #define ANLPAR_PAUSE1 (1 << 11)
105 #define ANLPAR_PAUSE0 (1 << 10)
106 #define ANLPAR_100BT4 (1 << 9)
107 #define ANLPAR_100BTX_FD (1 << 8)
108 #define ANLPAR_100BTX (1 << 7)
109 #define ANLPAR_10BT_FD (1 << 6)
110 #define ANLPAR_10BT (1 << 5)
111 #define ANLPAR_SELECTOR4 (1 << 4)
112 #define ANLPAR_SELECTOR3 (1 << 3)
113 #define ANLPAR_SELECTOR2 (1 << 2)
114 #define ANLPAR_SELECTOR1 (1 << 1)
115 #define ANLPAR_SELECTOR0 (1 << 0)
116 
117 //ANER register
118 #define ANER_PAR_DET_FAULT (1 << 4)
119 #define ANER_LP_NEXT_PAGE_ABLE (1 << 3)
120 #define ANER_NEXT_PAGE_ABLE (1 << 2)
121 #define ANER_PAGE_RECEIVED (1 << 1)
122 #define ANER_LP_AN_ABLE (1 << 0)
123 
124 //ANNPTR register
125 #define ANNPTR_NEXT_PAGE (1 << 15)
126 #define ANNPTR_MSG_PAGE (1 << 13)
127 #define ANNPTR_ACK2 (1 << 12)
128 #define ANNPTR_TOGGLE (1 << 11)
129 #define ANNPTR_MESSAGE10 (1 << 10)
130 #define ANNPTR_MESSAGE9 (1 << 9)
131 #define ANNPTR_MESSAGE8 (1 << 8)
132 #define ANNPTR_MESSAGE7 (1 << 7)
133 #define ANNPTR_MESSAGE6 (1 << 6)
134 #define ANNPTR_MESSAGE5 (1 << 5)
135 #define ANNPTR_MESSAGE4 (1 << 4)
136 #define ANNPTR_MESSAGE3 (1 << 3)
137 #define ANNPTR_MESSAGE2 (1 << 2)
138 #define ANNPTR_MESSAGE1 (1 << 1)
139 #define ANNPTR_MESSAGE0 (1 << 0)
140 
141 //LPNPAR register
142 #define LPNPAR_NEXT_PAGE (1 << 15)
143 #define LPNPAR_ACK (1 << 14)
144 #define LPNPAR_MSG_PAGE (1 << 13)
145 #define LPNPAR_ACK2 (1 << 12)
146 #define LPNPAR_TOGGLE (1 << 11)
147 #define LPNPAR_MESSAGE10 (1 << 10)
148 #define LPNPAR_MESSAGE9 (1 << 9)
149 #define LPNPAR_MESSAGE8 (1 << 8)
150 #define LPNPAR_MESSAGE7 (1 << 7)
151 #define LPNPAR_MESSAGE6 (1 << 6)
152 #define LPNPAR_MESSAGE5 (1 << 5)
153 #define LPNPAR_MESSAGE4 (1 << 4)
154 #define LPNPAR_MESSAGE3 (1 << 3)
155 #define LPNPAR_MESSAGE2 (1 << 2)
156 #define LPNPAR_MESSAGE1 (1 << 1)
157 #define LPNPAR_MESSAGE0 (1 << 0)
158 
159 //MIICON register
160 #define MIICON_100BTX_PREAMBLE_RESTORE (1 << 7)
161 #define MIICON_10BT_PREAMBLE_RESTORE (1 << 6)
162 
163 //ICSR register
164 #define ICSR_JABBER_IE (1 << 15)
165 #define ICSR_RECEIVE_ERROR_IE (1 << 14)
166 #define ICSR_PAGE_RECEIVED_IE (1 << 13)
167 #define ICSR_PAR_DET_FAULT_IE (1 << 12)
168 #define ICSR_LP_ACK_IE (1 << 11)
169 #define ICSR_LINK_DOWN_IE (1 << 10)
170 #define ICSR_REMOTE_FAULT_IE (1 << 9)
171 #define ICSR_LINK_UP_IE (1 << 8)
172 #define ICSR_JABBER_IF (1 << 7)
173 #define ICSR_RECEIVE_ERROR_IF (1 << 6)
174 #define ICSR_PAGE_RECEIVED_IF (1 << 5)
175 #define ICSR_PAR_DET_FAULT_IF (1 << 4)
176 #define ICSR_LP_ACK_IF (1 << 3)
177 #define ICSR_LINK_DOWN_IF (1 << 2)
178 #define ICSR_REMOTE_FAULT_IF (1 << 1)
179 #define ICSR_LINK_UP_IF (1 << 0)
180 
181 //PHYCON1 register
182 #define PHYCON1_LED_MODE1 (1 << 15)
183 #define PHYCON1_LED_MODE0 (1 << 14)
184 #define PHYCON1_POLARITY (1 << 13)
185 #define PHYCON1_MDIX_STATE (1 << 11)
186 #define PHYCON1_REMOTE_LOOPBACK (1 << 7)
187 
188 //PHYCON2 register
189 #define PHYCON2_HP_MDIX (1 << 15)
190 #define PHYCON2_MDIX_SEL (1 << 14)
191 #define PHYCON2_PAIR_SWAP_DIS (1 << 13)
192 #define PHYCON2_ENERGY_DETECT (1 << 12)
193 #define PHYCON2_FORCE_LINK (1 << 11)
194 #define PHYCON2_POWER_SAVING (1 << 10)
195 #define PHYCON2_INT_LEVEL (1 << 9)
196 #define PHYCON2_JABBER_EN (1 << 8)
197 #define PHYCON2_AN_COMPLETE (1 << 7)
198 #define PHYCON2_PHY_ISOLATE (1 << 5)
199 #define PHYCON2_OP_MODE2 (1 << 4)
200 #define PHYCON2_OP_MODE1 (1 << 3)
201 #define PHYCON2_OP_MODE0 (1 << 2)
202 #define PHYCON2_SQE_TEST_EN (1 << 1)
203 #define PHYCON2_SCRAMBLER_DIS (1 << 0)
204 
205 //Operation mode indication
206 #define PHYCON2_OP_MODE_MASK (7 << 2)
207 #define PHYCON2_OP_MODE_AN (0 << 2)
208 #define PHYCON2_OP_MODE_10BT (1 << 2)
209 #define PHYCON2_OP_MODE_100BTX (2 << 2)
210 #define PHYCON2_OP_MODE_10BT_FD (5 << 2)
211 #define PHYCON2_OP_MODE_100BTX_FD (6 << 2)
212 
213 //C++ guard
214 #ifdef __cplusplus
215  extern "C" {
216 #endif
217 
218 //KSZ8041 Ethernet PHY driver
219 extern const PhyDriver ksz8041PhyDriver;
220 
221 //KSZ8041 related functions
222 error_t ksz8041Init(NetInterface *interface);
223 
224 void ksz8041Tick(NetInterface *interface);
225 
226 void ksz8041EnableIrq(NetInterface *interface);
227 void ksz8041DisableIrq(NetInterface *interface);
228 
229 void ksz8041EventHandler(NetInterface *interface);
230 
231 void ksz8041WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data);
232 uint16_t ksz8041ReadPhyReg(NetInterface *interface, uint8_t address);
233 
234 void ksz8041DumpPhyReg(NetInterface *interface);
235 
236 //C++ guard
237 #ifdef __cplusplus
238  }
239 #endif
240 
241 #endif
void ksz8041WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
void ksz8041DisableIrq(NetInterface *interface)
Disable interrupts.
void ksz8041EventHandler(NetInterface *interface)
KSZ8041 event handler.
uint16_t ksz8041ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void ksz8041DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
PHY driver.
Definition: nic.h:196
void ksz8041EnableIrq(NetInterface *interface)
Enable interrupts.
Ipv6Addr address
error_t
Error codes.
Definition: error.h:40
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
error_t ksz8041Init(NetInterface *interface)
KSZ8041 PHY transceiver initialization.
void ksz8041Tick(NetInterface *interface)
KSZ8041 timer handler.
Network interface controller abstraction layer.
const PhyDriver ksz8041PhyDriver
KSZ8041 Ethernet PHY driver.