ksz9031_driver.h
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1 /**
2  * @file ksz9031_driver.h
3  * @brief KSZ9031 Gigabit Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _KSZ9031_DRIVER_H
30 #define _KSZ9031_DRIVER_H
31 
32 //Dependencies
33 #include "core/nic.h"
34 
35 //PHY address
36 #ifndef KSZ9031_PHY_ADDR
37  #define KSZ9031_PHY_ADDR 7
38 #elif (KSZ9031_PHY_ADDR < 0 || KSZ9031_PHY_ADDR > 31)
39  #error KSZ9031_PHY_ADDR parameter is not valid
40 #endif
41 
42 //KSZ9031 registers
43 #define KSZ9031_PHY_REG_BMCR 0x00
44 #define KSZ9031_PHY_REG_BMSR 0x01
45 #define KSZ9031_PHY_REG_PHYIDR1 0x02
46 #define KSZ9031_PHY_REG_PHYIDR2 0x03
47 #define KSZ9031_PHY_REG_ANAR 0x04
48 #define KSZ9031_PHY_REG_ANLPAR 0x05
49 #define KSZ9031_PHY_REG_ANER 0x06
50 #define KSZ9031_PHY_REG_ANNPTR 0x07
51 #define KSZ9031_PHY_REG_LPNPAR 0x08
52 #define KSZ9031_PHY_REG_1000BT_CTRL 0x09
53 #define KSZ9031_PHY_REG_1000BT_STATUS 0x0A
54 #define KSZ9031_PHY_REG_MMD_CTRL 0x0D
55 #define KSZ9031_PHY_REG_MMD_DATA 0x0E
56 #define KSZ9031_PHY_REG_EXT_STATUS 0x0F
57 #define KSZ9031_PHY_REG_RLB 0x11
58 #define KSZ9031_PHY_REG_LINKMDCD 0x12
59 #define KSZ9031_PHY_REG_DPMAPCSS 0x13
60 #define KSZ9031_PHY_REG_RXERCTR 0x15
61 #define KSZ9031_PHY_REG_ICSR 0x1B
62 #define KSZ9031_PHY_REG_AUTOMDI 0x1C
63 #define KSZ9031_PHY_REG_PHYCON 0x1F
64 
65 //BMCR register
66 #define BMCR_RESET (1 << 15)
67 #define BMCR_LOOPBACK (1 << 14)
68 #define BMCR_SPEED_SEL (1 << 13)
69 #define BMCR_AN_EN (1 << 12)
70 #define BMCR_POWER_DOWN (1 << 11)
71 #define BMCR_ISOLATE (1 << 10)
72 #define BMCR_RESTART_AN (1 << 9)
73 #define BMCR_DUPLEX_MODE (1 << 8)
74 
75 //BMSR register
76 #define BMSR_100BT4 (1 << 15)
77 #define BMSR_100BTX_FD (1 << 14)
78 #define BMSR_100BTX_HD (1 << 13)
79 #define BMSR_10BT_FD (1 << 12)
80 #define BMSR_10BT_HD (1 << 11)
81 #define BMSR_EXTENDED_STATUS (1 << 8)
82 #define BMSR_NO_PREAMBLE (1 << 6)
83 #define BMSR_AN_COMPLETE (1 << 5)
84 #define BMSR_REMOTE_FAULT (1 << 4)
85 #define BMSR_AN_ABLE (1 << 3)
86 #define BMSR_LINK_STATUS (1 << 2)
87 #define BMSR_JABBER_DETECT (1 << 1)
88 #define BMSR_EXTENDED_CAP (1 << 0)
89 
90 //ANAR register
91 #define ANAR_NEXT_PAGE (1 << 15)
92 #define ANAR_REMOTE_FAULT (1 << 13)
93 #define ANAR_PAUSE1 (1 << 11)
94 #define ANAR_PAUSE0 (1 << 10)
95 #define ANAR_100BT4 (1 << 9)
96 #define ANAR_100BTX_FD (1 << 8)
97 #define ANAR_100BTX_HD (1 << 7)
98 #define ANAR_10BT_FD (1 << 6)
99 #define ANAR_10BT_HD (1 << 5)
100 #define ANAR_SELECTOR4 (1 << 4)
101 #define ANAR_SELECTOR3 (1 << 3)
102 #define ANAR_SELECTOR2 (1 << 2)
103 #define ANAR_SELECTOR1 (1 << 1)
104 #define ANAR_SELECTOR0 (1 << 0)
105 
106 //ANLPAR register
107 #define ANLPAR_NEXT_PAGE (1 << 15)
108 #define ANLPAR_LP_ACK (1 << 14)
109 #define ANLPAR_REMOTE_FAULT (1 << 13)
110 #define ANLPAR_PAUSE1 (1 << 11)
111 #define ANLPAR_PAUSE0 (1 << 10)
112 #define ANLPAR_100BT4 (1 << 9)
113 #define ANLPAR_100BTX_FD (1 << 8)
114 #define ANLPAR_100BTX_HD (1 << 7)
115 #define ANLPAR_10BT_FD (1 << 6)
116 #define ANLPAR_10BT_HD (1 << 5)
117 #define ANLPAR_SELECTOR4 (1 << 4)
118 #define ANLPAR_SELECTOR3 (1 << 3)
119 #define ANLPAR_SELECTOR2 (1 << 2)
120 #define ANLPAR_SELECTOR1 (1 << 1)
121 #define ANLPAR_SELECTOR0 (1 << 0)
122 
123 //ANER register
124 #define ANER_PAR_DET_FAULT (1 << 4)
125 #define ANER_LP_NEXT_PAGE_ABLE (1 << 3)
126 #define ANER_NEXT_PAGE_ABLE (1 << 2)
127 #define ANER_PAGE_RECEIVED (1 << 1)
128 #define ANER_LP_AN_ABLE (1 << 0)
129 
130 //ANNPTR register
131 #define ANNPTR_NEXT_PAGE (1 << 15)
132 #define ANNPTR_MSG_PAGE (1 << 13)
133 #define ANNPTR_ACK2 (1 << 12)
134 #define ANNPTR_TOGGLE (1 << 11)
135 #define ANNPTR_MESSAGE10 (1 << 10)
136 #define ANNPTR_MESSAGE9 (1 << 9)
137 #define ANNPTR_MESSAGE8 (1 << 8)
138 #define ANNPTR_MESSAGE7 (1 << 7)
139 #define ANNPTR_MESSAGE6 (1 << 6)
140 #define ANNPTR_MESSAGE5 (1 << 5)
141 #define ANNPTR_MESSAGE4 (1 << 4)
142 #define ANNPTR_MESSAGE3 (1 << 3)
143 #define ANNPTR_MESSAGE2 (1 << 2)
144 #define ANNPTR_MESSAGE1 (1 << 1)
145 #define ANNPTR_MESSAGE0 (1 << 0)
146 
147 //LPNPAR register
148 #define LPNPAR_NEXT_PAGE (1 << 15)
149 #define LPNPAR_ACK (1 << 14)
150 #define LPNPAR_MSG_PAGE (1 << 13)
151 #define LPNPAR_ACK2 (1 << 12)
152 #define LPNPAR_TOGGLE (1 << 11)
153 #define LPNPAR_MESSAGE10 (1 << 10)
154 #define LPNPAR_MESSAGE9 (1 << 9)
155 #define LPNPAR_MESSAGE8 (1 << 8)
156 #define LPNPAR_MESSAGE7 (1 << 7)
157 #define LPNPAR_MESSAGE6 (1 << 6)
158 #define LPNPAR_MESSAGE5 (1 << 5)
159 #define LPNPAR_MESSAGE4 (1 << 4)
160 #define LPNPAR_MESSAGE3 (1 << 3)
161 #define LPNPAR_MESSAGE2 (1 << 2)
162 #define LPNPAR_MESSAGE1 (1 << 1)
163 #define LPNPAR_MESSAGE0 (1 << 0)
164 
165 //1000BT_CTRL register
166 #define _1000BT_CTRL_TEST_MODE2 (1 << 15)
167 #define _1000BT_CTRL_TEST_MODE1 (1 << 14)
168 #define _1000BT_CTRL_TEST_MODE0 (1 << 13)
169 #define _1000BT_CTRL_MS_MAN_CONF_EN (1 << 12)
170 #define _1000BT_CTRL_MS_MAN_CONF_VAL (1 << 11)
171 #define _1000BT_CTRL_PORT_TYPE (1 << 10)
172 #define _1000BT_CTRL_1000BT_FD (1 << 9)
173 #define _1000BT_CTRL_1000BT_HD (1 << 8)
174 
175 //1000BT_STATUS register
176 #define _1000BT_STATUS_MS_CONF_FAULT (1 << 15)
177 #define _1000BT_STATUS_MS_CONF_RES (1 << 14)
178 #define _1000BT_STATUS_LOC_REC_STATUS (1 << 13)
179 #define _1000BT_STATUS_REM_REC_STATUS (1 << 12)
180 #define _1000BT_STATUS_LP_1000BT_FD (1 << 11)
181 #define _1000BT_STATUS_LP_1000BT_HD (1 << 10)
182 #define _1000BT_STATUS_IDLE_ERR_CTR7 (1 << 7)
183 #define _1000BT_STATUS_IDLE_ERR_CTR6 (1 << 6)
184 #define _1000BT_STATUS_IDLE_ERR_CTR5 (1 << 5)
185 #define _1000BT_STATUS_IDLE_ERR_CTR4 (1 << 4)
186 #define _1000BT_STATUS_IDLE_ERR_CTR3 (1 << 3)
187 #define _1000BT_STATUS_IDLE_ERR_CTR2 (1 << 2)
188 #define _1000BT_STATUS_IDLE_ERR_CTR1 (1 << 1)
189 #define _1000BT_STATUS_IDLE_ERR_CTR0 (1 << 0)
190 
191 //MMD_CTRL register
192 #define MMD_CTRL_DEVICE_OP_MODE1 (1 << 15)
193 #define MMD_CTRL_DEVICE_OP_MODE0 (1 << 14)
194 #define MMD_CTRL_DEVICE_ADDR4 (1 << 4)
195 #define MMD_CTRL_DEVICE_ADDR3 (1 << 3)
196 #define MMD_CTRL_DEVICE_ADDR2 (1 << 2)
197 #define MMD_CTRL_DEVICE_ADDR1 (1 << 1)
198 #define MMD_CTRL_DEVICE_ADDR0 (1 << 0)
199 
200 //EXT_STATUS register
201 #define EXT_STATUS_1000BX_FD (1 << 15)
202 #define EXT_STATUS_1000BX_HD (1 << 14)
203 #define EXT_STATUS_1000BT_FD (1 << 13)
204 #define EXT_STATUS_1000BT_HD (1 << 12)
205 
206 //RLB register
207 #define RLB_REMOTE_LOOPBACK (1 << 8)
208 
209 //LINKMDCD register
210 #define LINKMDCD_DIAG_EN (1 << 15)
211 #define LINKMDCD_DIAG_TEST_PAIR1 (1 << 13)
212 #define LINKMDCD_DIAG_TEST_PAIR0 (1 << 12)
213 #define LINKMDCD_FAULT_STATUS1 (1 << 9)
214 #define LINKMDCD_FAULT_STATUS0 (1 << 8)
215 #define LINKMDCD_FAULT_DATA7 (1 << 7)
216 #define LINKMDCD_FAULT_DATA6 (1 << 6)
217 #define LINKMDCD_FAULT_DATA5 (1 << 5)
218 #define LINKMDCD_FAULT_DATA4 (1 << 4)
219 #define LINKMDCD_FAULT_DATA3 (1 << 3)
220 #define LINKMDCD_FAULT_DATA2 (1 << 2)
221 #define LINKMDCD_FAULT_DATA1 (1 << 1)
222 #define LINKMDCD_FAULT_DATA0 (1 << 0)
223 
224 //DPMAPCSS register
225 #define DPMAPCSS_1000BT_LINK_STATUS (1 << 2)
226 #define DPMAPCSS_100BTX_LINK_STATUS (1 << 1)
227 
228 //ICSR register
229 #define ICSR_JABBER_IE (1 << 15)
230 #define ICSR_RECEIVE_ERROR_IE (1 << 14)
231 #define ICSR_PAGE_RECEIVED_IE (1 << 13)
232 #define ICSR_PAR_DET_FAULT_IE (1 << 12)
233 #define ICSR_LP_ACK_IE (1 << 11)
234 #define ICSR_LINK_DOWN_IE (1 << 10)
235 #define ICSR_REMOTE_FAULT_IE (1 << 9)
236 #define ICSR_LINK_UP_IE (1 << 8)
237 #define ICSR_JABBER_IF (1 << 7)
238 #define ICSR_RECEIVE_ERROR_IF (1 << 6)
239 #define ICSR_PAGE_RECEIVED_IF (1 << 5)
240 #define ICSR_PAR_DET_FAULT_IF (1 << 4)
241 #define ICSR_LP_ACK_IF (1 << 3)
242 #define ICSR_LINK_DOWN_IF (1 << 2)
243 #define ICSR_REMOTE_FAULT_IF (1 << 1)
244 #define ICSR_LINK_UP_IF (1 << 0)
245 
246 //AUTOMDI register
247 #define AUTOMDI_MDI_SEL (1 << 7)
248 #define AUTOMDI_SWAP_OFF (1 << 6)
249 
250 //PHYCON register
251 #define PHYCON_INT_LEVEL (1 << 14)
252 #define PHYCON_JABBER_EN (1 << 9)
253 #define PHYCON_SPEED_1000BT (1 << 6)
254 #define PHYCON_SPEED_100BTX (1 << 5)
255 #define PHYCON_SPEED_10BT (1 << 4)
256 #define PHYCON_DUPLEX_STATUS (1 << 3)
257 #define PHYCON_1000BT_MS_STATUS (1 << 2)
258 #define PHYCON_LINK_STATUS_CHECK_FAIL (1 << 0)
259 
260 //C++ guard
261 #ifdef __cplusplus
262  extern "C" {
263 #endif
264 
265 //KSZ9031 Ethernet PHY driver
266 extern const PhyDriver ksz9031PhyDriver;
267 
268 //KSZ9031 related functions
269 error_t ksz9031Init(NetInterface *interface);
270 
271 void ksz9031Tick(NetInterface *interface);
272 
273 void ksz9031EnableIrq(NetInterface *interface);
274 void ksz9031DisableIrq(NetInterface *interface);
275 
276 void ksz9031EventHandler(NetInterface *interface);
277 
278 void ksz9031WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data);
279 uint16_t ksz9031ReadPhyReg(NetInterface *interface, uint8_t address);
280 
281 void ksz9031DumpPhyReg(NetInterface *interface);
282 
283 //C++ guard
284 #ifdef __cplusplus
285  }
286 #endif
287 
288 #endif
uint16_t ksz9031ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void ksz9031WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
void ksz9031EventHandler(NetInterface *interface)
KSZ9031 event handler.
void ksz9031Tick(NetInterface *interface)
KSZ9031 timer handler.
error_t ksz9031Init(NetInterface *interface)
KSZ9031 PHY transceiver initialization.
PHY driver.
Definition: nic.h:196
void ksz9031DisableIrq(NetInterface *interface)
Disable interrupts.
const PhyDriver ksz9031PhyDriver
KSZ9031 Ethernet PHY driver.
Ipv6Addr address
void ksz9031EnableIrq(NetInterface *interface)
Enable interrupts.
error_t
Error codes.
Definition: error.h:40
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
void ksz9031DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
Network interface controller abstraction layer.