mimxrt1170_eth2_driver.h
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1 /**
2  * @file mimxrt1170_eth2_driver.h
3  * @brief NXP i.MX RT1170 Gigabit Ethernet MAC driver (ENET_1G instance)
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2025 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.5.4
29  **/
30 
31 #ifndef _MIMXRT1170_ETH2_DRIVER_H
32 #define _MIMXRT1170_ETH2_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Number of TX buffers
38 #ifndef MIMXRT1170_ETH2_TX_BUFFER_COUNT
39  #define MIMXRT1170_ETH2_TX_BUFFER_COUNT 8
40 #elif (MIMXRT1170_ETH2_TX_BUFFER_COUNT < 1)
41  #error MIMXRT1170_ETH2_TX_BUFFER_COUNT parameter is not valid
42 #endif
43 
44 //TX buffer size
45 #ifndef MIMXRT1170_ETH2_TX_BUFFER_SIZE
46  #define MIMXRT1170_ETH2_TX_BUFFER_SIZE 1536
47 #elif (MIMXRT1170_ETH2_TX_BUFFER_SIZE != 1536)
48  #error MIMXRT1170_ETH2_TX_BUFFER_SIZE parameter is not valid
49 #endif
50 
51 //Number of RX buffers
52 #ifndef MIMXRT1170_ETH2_RX_BUFFER_COUNT
53  #define MIMXRT1170_ETH2_RX_BUFFER_COUNT 8
54 #elif (MIMXRT1170_ETH2_RX_BUFFER_COUNT < 1)
55  #error MIMXRT1170_ETH2_RX_BUFFER_COUNT parameter is not valid
56 #endif
57 
58 //RX buffer size
59 #ifndef MIMXRT1170_ETH2_RX_BUFFER_SIZE
60  #define MIMXRT1170_ETH2_RX_BUFFER_SIZE 1536
61 #elif (MIMXRT1170_ETH2_RX_BUFFER_SIZE != 1536)
62  #error MIMXRT1170_ETH2_RX_BUFFER_SIZE parameter is not valid
63 #endif
64 
65 //Interrupt priority grouping
66 #ifndef MIMXRT1170_ETH2_IRQ_PRIORITY_GROUPING
67  #define MIMXRT1170_ETH2_IRQ_PRIORITY_GROUPING 3
68 #elif (MIMXRT1170_ETH2_IRQ_PRIORITY_GROUPING < 0)
69  #error MIMXRT1170_ETH2_IRQ_PRIORITY_GROUPING parameter is not valid
70 #endif
71 
72 //Ethernet interrupt group priority
73 #ifndef MIMXRT1170_ETH2_IRQ_GROUP_PRIORITY
74  #define MIMXRT1170_ETH2_IRQ_GROUP_PRIORITY 12
75 #elif (MIMXRT1170_ETH2_IRQ_GROUP_PRIORITY < 0)
76  #error MIMXRT1170_ETH2_IRQ_GROUP_PRIORITY parameter is not valid
77 #endif
78 
79 //Ethernet interrupt subpriority
80 #ifndef MIMXRT1170_ETH2_IRQ_SUB_PRIORITY
81  #define MIMXRT1170_ETH2_IRQ_SUB_PRIORITY 0
82 #elif (MIMXRT1170_ETH2_IRQ_SUB_PRIORITY < 0)
83  #error MIMXRT1170_ETH2_IRQ_SUB_PRIORITY parameter is not valid
84 #endif
85 
86 //Name of the section where to place DMA buffers
87 #ifndef MIMXRT1170_ETH2_RAM_SECTION
88  #define MIMXRT1170_ETH2_RAM_SECTION ".ram_no_cache"
89 #endif
90 
91 //Enhanced transmit buffer descriptor
92 #define ENET_TBD0_R 0x80000000
93 #define ENET_TBD0_TO1 0x40000000
94 #define ENET_TBD0_W 0x20000000
95 #define ENET_TBD0_TO2 0x10000000
96 #define ENET_TBD0_L 0x08000000
97 #define ENET_TBD0_TC 0x04000000
98 #define ENET_TBD0_DATA_LENGTH 0x0000FFFF
99 #define ENET_TBD1_DATA_POINTER 0xFFFFFFFF
100 #define ENET_TBD2_INT 0x40000000
101 #define ENET_TBD2_TS 0x20000000
102 #define ENET_TBD2_PINS 0x10000000
103 #define ENET_TBD2_IINS 0x08000000
104 #define ENET_TBD2_TXE 0x00008000
105 #define ENET_TBD2_UE 0x00002000
106 #define ENET_TBD2_EE 0x00001000
107 #define ENET_TBD2_FE 0x00000800
108 #define ENET_TBD2_LCE 0x00000400
109 #define ENET_TBD2_OE 0x00000200
110 #define ENET_TBD2_TSE 0x00000100
111 #define ENET_TBD4_BDU 0x80000000
112 #define ENET_TBD5_TIMESTAMP 0xFFFFFFFF
113 
114 //Enhanced receive buffer descriptor
115 #define ENET_RBD0_E 0x80000000
116 #define ENET_RBD0_RO1 0x40000000
117 #define ENET_RBD0_W 0x20000000
118 #define ENET_RBD0_RO2 0x10000000
119 #define ENET_RBD0_L 0x08000000
120 #define ENET_RBD0_M 0x01000000
121 #define ENET_RBD0_BC 0x00800000
122 #define ENET_RBD0_MC 0x00400000
123 #define ENET_RBD0_LG 0x00200000
124 #define ENET_RBD0_NO 0x00100000
125 #define ENET_RBD0_CR 0x00040000
126 #define ENET_RBD0_OV 0x00020000
127 #define ENET_RBD0_TR 0x00010000
128 #define ENET_RBD0_DATA_LENGTH 0x0000FFFF
129 #define ENET_RBD1_DATA_POINTER 0xFFFFFFFF
130 #define ENET_RBD2_ME 0x80000000
131 #define ENET_RBD2_PE 0x04000000
132 #define ENET_RBD2_CE 0x02000000
133 #define ENET_RBD2_UC 0x01000000
134 #define ENET_RBD2_INT 0x00800000
135 #define ENET_RBD2_VPCP 0x0000E000
136 #define ENET_RBD2_ICE 0x00000020
137 #define ENET_RBD2_PCR 0x00000010
138 #define ENET_RBD2_VLAN 0x00000004
139 #define ENET_RBD2_IPV6 0x00000002
140 #define ENET_RBD2_FRAG 0x00000001
141 #define ENET_RBD3_HEADER_LENGTH 0xF8000000
142 #define ENET_RBD3_PROTOCOL_TYPE 0x00FF0000
143 #define ENET_RBD3_PAYLOAD_CHECKSUM 0x0000FFFF
144 #define ENET_RBD4_BDU 0x80000000
145 #define ENET_RBD5_TIMESTAMP 0xFFFFFFFF
146 
147 //C++ guard
148 #ifdef __cplusplus
149 extern "C" {
150 #endif
151 
152 //i.MX RT1170 Ethernet MAC driver (ENET_1G instance)
153 extern const NicDriver mimxrt1170Eth2Driver;
154 
155 //i.MX RT1170 Ethernet MAC related functions
157 void mimxrt1170Eth2InitGpio(NetInterface *interface);
159 
160 void mimxrt1170Eth2Tick(NetInterface *interface);
161 
162 void mimxrt1170Eth2EnableIrq(NetInterface *interface);
163 void mimxrt1170Eth2DisableIrq(NetInterface *interface);
165 
167  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
168 
170 
173 
174 void mimxrt1170Eth2WritePhyReg(uint8_t opcode, uint8_t phyAddr,
175  uint8_t regAddr, uint16_t data);
176 
177 uint16_t mimxrt1170Eth2ReadPhyReg(uint8_t opcode, uint8_t phyAddr,
178  uint8_t regAddr);
179 
180 uint32_t mimxrt1170Eth2CalcCrc(const void *data, size_t length);
181 
182 //C++ guard
183 #ifdef __cplusplus
184 }
185 #endif
186 
187 #endif
error_t mimxrt1170Eth2UpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
error_t mimxrt1170Eth2UpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
uint8_t opcode
Definition: dns_common.h:191
const NicDriver mimxrt1170Eth2Driver
i.MX RT1170 Ethernet MAC driver (ENET_1G instance)
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
uint8_t data[]
Definition: ethernet.h:224
void mimxrt1170Eth2WritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
error_t mimxrt1170Eth2Init(NetInterface *interface)
i.MX RT1170 Ethernet MAC initialization
void mimxrt1170Eth2Tick(NetInterface *interface)
i.MX RT1170 Ethernet MAC timer handler
error_t
Error codes.
Definition: error.h:43
uint16_t mimxrt1170Eth2ReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
#define NetInterface
Definition: net.h:36
void mimxrt1170Eth2InitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
error_t mimxrt1170Eth2SendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
#define NetTxAncillary
Definition: net_misc.h:36
error_t mimxrt1170Eth2ReceivePacket(NetInterface *interface)
Receive a packet.
uint32_t mimxrt1170Eth2CalcCrc(const void *data, size_t length)
CRC calculation.
uint8_t length
Definition: tcp.h:375
void mimxrt1170Eth2InitGpio(NetInterface *interface)
GPIO configuration.
void mimxrt1170Eth2EnableIrq(NetInterface *interface)
Enable interrupts.
uint16_t regAddr
void mimxrt1170Eth2DisableIrq(NetInterface *interface)
Disable interrupts.
void mimxrt1170Eth2EventHandler(NetInterface *interface)
i.MX RT1170 Ethernet MAC event handler
Network interface controller abstraction layer.
NIC driver.
Definition: nic.h:286