tja1100_driver.h
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1 /**
2  * @file tja1100_driver.h
3  * @brief TJA1100 100Base-T1 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 #ifndef _TJA1100_DRIVER_H
32 #define _TJA1100_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //PHY address
38 #ifndef TJA1100_PHY_ADDR
39  #define TJA1100_PHY_ADDR 0
40 #elif (TJA1100_PHY_ADDR < 0 || TJA1100_PHY_ADDR > 31)
41  #error TJA1100_PHY_ADDR parameter is not valid
42 #endif
43 
44 //TJA1100 PHY registers
45 #define TJA1100_BASIC_CTRL 0x00
46 #define TJA1100_BASIC_STAT 0x01
47 #define TJA1100_PHY_ID1 0x02
48 #define TJA1100_PHY_ID2 0x03
49 #define TJA1100_EXTENDED_STAT 0x0F
50 #define TJA1100_PHY_ID3 0x10
51 #define TJA1100_EXTENDED_CTRL 0x11
52 #define TJA1100_CONFIG1 0x12
53 #define TJA1100_CONFIG2 0x13
54 #define TJA1100_SYM_ERR_COUNTER 0x14
55 #define TJA1100_INT_SRC 0x15
56 #define TJA1100_INT_EN 0x16
57 #define TJA1100_COMM_STAT 0x17
58 #define TJA1100_GENERAL_STAT 0x18
59 #define TJA1100_EXTERNAL_STAT 0x19
60 #define TJA1100_LINK_FAIL_COUNTER 0x1A
61 
62 //Basic control register
63 #define TJA1100_BASIC_CTRL_RESET 0x8000
64 #define TJA1100_BASIC_CTRL_LOOPBACK 0x4000
65 #define TJA1100_BASIC_CTRL_SPEED_SEL_LSB 0x2000
66 #define TJA1100_BASIC_CTRL_AUTONEG_EN 0x1000
67 #define TJA1100_BASIC_CTRL_POWER_DOWN 0x0800
68 #define TJA1100_BASIC_CTRL_ISOLATE 0x0400
69 #define TJA1100_BASIC_CTRL_RE_AUTONEG 0x0200
70 #define TJA1100_BASIC_CTRL_DUPLEX_MODE 0x0100
71 #define TJA1100_BASIC_CTRL_COL_TEST 0x0080
72 #define TJA1100_BASIC_CTRL_SPEED_SEL_MSB 0x0040
73 #define TJA1100_BASIC_CTRL_UNIDIRECT_EN 0x0020
74 
75 //Basic status register
76 #define TJA1100_BASIC_STAT_100BT4 0x8000
77 #define TJA1100_BASIC_STAT_100BTX_FD 0x4000
78 #define TJA1100_BASIC_STAT_100BTX_HD 0x2000
79 #define TJA1100_BASIC_STAT_10BT_FD 0x1000
80 #define TJA1100_BASIC_STAT_10BT_HD 0x0800
81 #define TJA1100_BASIC_STAT_100BT2_FD 0x0400
82 #define TJA1100_BASIC_STAT_100BT2_HD 0x0200
83 #define TJA1100_BASIC_STAT_EXTENDED_STATUS 0x0100
84 #define TJA1100_BASIC_STAT_UNIDIRECT_ABILITY 0x0080
85 #define TJA1100_BASIC_STAT_MF_PREAMBLE_SUPPR 0x0040
86 #define TJA1100_BASIC_STAT_AUTONEG_COMPLETE 0x0020
87 #define TJA1100_BASIC_STAT_REMOTE_FAULT 0x0010
88 #define TJA1100_BASIC_STAT_AUTONEG_ABILITY 0x0008
89 #define TJA1100_BASIC_STAT_LINK_STATUS 0x0004
90 #define TJA1100_BASIC_STAT_JABBER_DETECT 0x0002
91 #define TJA1100_BASIC_STAT_EXTENDED_CAPABILITY 0x0001
92 
93 //PHY identification 1 register
94 #define TJA1100_PHY_ID1_OUI_MSB 0xFFFF
95 #define TJA1100_PHY_ID1_OUI_MSB_DEFAULT 0x0180
96 
97 //PHY identification 2 register
98 #define TJA1100_PHY_ID2_OUI_LSB 0xFC00
99 #define TJA1100_PHY_ID2_OUI_LSB_DEFAULT 0xDC00
100 #define TJA1100_PHY_ID2_TYPE_NO 0x03F0
101 #define TJA1100_PHY_ID2_TYPE_NO_DEFAULT 0x0040
102 #define TJA1100_PHY_ID2_REVISION_NO 0x000F
103 
104 //Extended status register
105 #define TJA1100_EXTENDED_STAT_1000BX_FD 0x8000
106 #define TJA1100_EXTENDED_STAT_1000BX_HD 0x4000
107 #define TJA1100_EXTENDED_STAT_1000BT_FD 0x2000
108 #define TJA1100_EXTENDED_STAT_1000BT_HD 0x1000
109 #define TJA1100_EXTENDED_STAT_100BT1 0x0080
110 #define TJA1100_EXTENDED_STAT_1000BT1 0x0040
111 
112 //PHY identification 3 register
113 #define TJA1100_PHY_ID3_VERSION_NO 0x00FF
114 
115 //Extended control register
116 #define TJA1100_EXTENDED_CTRL_LINK_CONTROL 0x8000
117 #define TJA1100_EXTENDED_CTRL_POWER_MODE 0x7800
118 #define TJA1100_EXTENDED_CTRL_POWER_MODE_NO_CHANGE 0x0000
119 #define TJA1100_EXTENDED_CTRL_POWER_MODE_NORMAL 0x1800
120 #define TJA1100_EXTENDED_CTRL_POWER_MODE_SLEEP_REQ 0x5800
121 #define TJA1100_EXTENDED_CTRL_POWER_MODE_STANDBY 0x6000
122 #define TJA1100_EXTENDED_CTRL_SLAVE_JITTER_TEST 0x0400
123 #define TJA1100_EXTENDED_CTRL_TRAINING_RESTART 0x0200
124 #define TJA1100_EXTENDED_CTRL_TEST_MODE 0x01C0
125 #define TJA1100_EXTENDED_CTRL_TEST_MODE_0 0x0000
126 #define TJA1100_EXTENDED_CTRL_TEST_MODE_1 0x0040
127 #define TJA1100_EXTENDED_CTRL_TEST_MODE_2 0x0080
128 #define TJA1100_EXTENDED_CTRL_TEST_MODE_3 0x00C0
129 #define TJA1100_EXTENDED_CTRL_TEST_MODE_4 0x0100
130 #define TJA1100_EXTENDED_CTRL_TEST_MODE_5 0x0140
131 #define TJA1100_EXTENDED_CTRL_TEST_MODE_6 0x0180
132 #define TJA1100_EXTENDED_CTRL_CABLE_TEST 0x0020
133 #define TJA1100_EXTENDED_CTRL_LOOPBACK_MODE 0x0018
134 #define TJA1100_EXTENDED_CTRL_LOOPBACK_MODE_INTERNAL 0x0000
135 #define TJA1100_EXTENDED_CTRL_LOOPBACK_MODE_EXTERNAL 0x0008
136 #define TJA1100_EXTENDED_CTRL_LOOPBACK_MODE_REMOTE 0x0018
137 #define TJA1100_EXTENDED_CTRL_CONFIG_EN 0x0004
138 #define TJA1100_EXTENDED_CTRL_CONFIG_INH 0x0002
139 #define TJA1100_EXTENDED_CTRL_WAKE_REQUEST 0x0001
140 
141 //Configuration 1 register
142 #define TJA1100_CONFIG1_MASTER_SLAVE 0x8000
143 #define TJA1100_CONFIG1_AUTO_OP 0x4000
144 #define TJA1100_CONFIG1_LINK_LENGTH 0x2000
145 #define TJA1100_CONFIG1_TX_AMPLITUDE 0x0C00
146 #define TJA1100_CONFIG1_TX_AMPLITUDE_500MV 0x0000
147 #define TJA1100_CONFIG1_TX_AMPLITUDE_750MV 0x0400
148 #define TJA1100_CONFIG1_TX_AMPLITUDE_1000MV 0x0800
149 #define TJA1100_CONFIG1_TX_AMPLITUDE_1250MV 0x0C00
150 #define TJA1100_CONFIG1_MII_MODE 0x0300
151 #define TJA1100_CONFIG1_MII_MODE_MII 0x0000
152 #define TJA1100_CONFIG1_MII_MODE_RMII_50MHZ 0x0100
153 #define TJA1100_CONFIG1_MII_MODE_RMII_25MHZ 0x0200
154 #define TJA1100_CONFIG1_MII_MODE_REV_MII 0x0300
155 #define TJA1100_CONFIG1_MII_DRIVER 0x0080
156 #define TJA1100_CONFIG1_LED_MODE 0x0030
157 #define TJA1100_CONFIG1_LED_MODE_LINK_UP 0x0000
158 #define TJA1100_CONFIG1_LED_MODE_FRAME_RX 0x0010
159 #define TJA1100_CONFIG1_LED_MODE_SYM_ERR 0x0020
160 #define TJA1100_CONFIG1_LED_MODE_CRS 0x0030
161 #define TJA1100_CONFIG1_LED_ENABLE 0x0008
162 #define TJA1100_CONFIG1_CONFIG_WAKE 0x0004
163 #define TJA1100_CONFIG1_AUTO_PWD 0x0002
164 
165 //Configuration 2 register
166 #define TJA1100_CONFIG2_PHYAD 0xF800
167 #define TJA1100_CONFIG2_SQI_AVERAGING 0x0600
168 #define TJA1100_CONFIG2_SQI_AVERAGING_32_SYMBOLS 0x0000
169 #define TJA1100_CONFIG2_SQI_AVERAGING_64_SYMBOLS 0x0200
170 #define TJA1100_CONFIG2_SQI_AVERAGING_128_SYMBOLS 0x0400
171 #define TJA1100_CONFIG2_SQI_AVERAGING_256_SYMBOLS 0x0600
172 #define TJA1100_CONFIG2_SQI_WLIMIT 0x01C0
173 #define TJA1100_CONFIG2_SQI_WLIMIT_NONE 0x0000
174 #define TJA1100_CONFIG2_SQI_WLIMIT_CLASS_A 0x0040
175 #define TJA1100_CONFIG2_SQI_WLIMIT_CLASS_B 0x0080
176 #define TJA1100_CONFIG2_SQI_WLIMIT_CLASS_C 0x00C0
177 #define TJA1100_CONFIG2_SQI_WLIMIT_CLASS_D 0x0100
178 #define TJA1100_CONFIG2_SQI_WLIMIT_CLASS_E 0x0140
179 #define TJA1100_CONFIG2_SQI_WLIMIT_CLASS_F 0x0180
180 #define TJA1100_CONFIG2_SQI_WLIMIT_CLASS_G 0x01C0
181 #define TJA1100_CONFIG2_SQI_FAILLIMIT 0x0038
182 #define TJA1100_CONFIG2_SQI_FAILLIMIT_NONE 0x0000
183 #define TJA1100_CONFIG2_SQI_FAILLIMIT_CLASS_A 0x0008
184 #define TJA1100_CONFIG2_SQI_FAILLIMIT_CLASS_B 0x0010
185 #define TJA1100_CONFIG2_SQI_FAILLIMIT_CLASS_C 0x0018
186 #define TJA1100_CONFIG2_SQI_FAILLIMIT_CLASS_D 0x0020
187 #define TJA1100_CONFIG2_SQI_FAILLIMIT_CLASS_E 0x0028
188 #define TJA1100_CONFIG2_SQI_FAILLIMIT_CLASS_F 0x0030
189 #define TJA1100_CONFIG2_SQI_FAILLIMIT_CLASS_G 0x0038
190 #define TJA1100_CONFIG2_JUMBO_ENABLE 0x0004
191 #define TJA1100_CONFIG2_SLEEP_REQUEST_TO 0x0003
192 #define TJA1100_CONFIG2_SLEEP_REQUEST_TO_0_4MS 0x0000
193 #define TJA1100_CONFIG2_SLEEP_REQUEST_TO_1MS 0x0001
194 #define TJA1100_CONFIG2_SLEEP_REQUEST_TO_4MS 0x0002
195 #define TJA1100_CONFIG2_SLEEP_REQUEST_TO_16MS 0x0003
196 
197 //Symbol error counter register
198 #define TJA1100_SYM_ERR_COUNTER_SYM_ERR_CNT 0xFFFF
199 
200 //Interrupt source register
201 #define TJA1100_INT_SRC_PWON 0x8000
202 #define TJA1100_INT_SRC_WAKEUP 0x4000
203 #define TJA1100_INT_SRC_PHY_INIT_FAIL 0x0800
204 #define TJA1100_INT_SRC_LINK_STATUS_FAIL 0x0400
205 #define TJA1100_INT_SRC_LINK_STATUS_UP 0x0200
206 #define TJA1100_INT_SRC_SYM_ERR 0x0100
207 #define TJA1100_INT_SRC_TRAINING_FAILED 0x0080
208 #define TJA1100_INT_SRC_SQI_WARNING 0x0040
209 #define TJA1100_INT_SRC_CONTROL_ERR 0x0020
210 #define TJA1100_INT_SRC_UV_ERR 0x0008
211 #define TJA1100_INT_SRC_UV_RECOVERY 0x0004
212 #define TJA1100_INT_SRC_TEMP_ERR 0x0002
213 #define TJA1100_INT_SRC_SLEEP_ABORT 0x0001
214 
215 //Interrupt enable register
216 #define TJA1100_INT_EN_PWON 0x8000
217 #define TJA1100_INT_EN_WAKEUP 0x4000
218 #define TJA1100_INT_EN_PHY_INIT_FAIL 0x0800
219 #define TJA1100_INT_EN_LINK_STATUS_FAIL 0x0400
220 #define TJA1100_INT_EN_LINK_STATUS_UP 0x0200
221 #define TJA1100_INT_EN_SYM_ERR 0x0100
222 #define TJA1100_INT_EN_TRAINING_FAILED 0x0080
223 #define TJA1100_INT_EN_SQI_WARNING 0x0040
224 #define TJA1100_INT_EN_CONTROL_ERR 0x0020
225 #define TJA1100_INT_EN_UV_ERR 0x0008
226 #define TJA1100_INT_EN_UV_RECOVERY 0x0004
227 #define TJA1100_INT_EN_TEMP_ERR 0x0002
228 #define TJA1100_INT_EN_SLEEP_ABORT 0x0001
229 
230 //Communication status register
231 #define TJA1100_COMM_STAT_LINK_UP 0x8000
232 #define TJA1100_COMM_STAT_TX_MODE 0x6000
233 #define TJA1100_COMM_STAT_TX_MODE_DISABLED 0x0000
234 #define TJA1100_COMM_STAT_TX_MODE_SEND_N 0x2000
235 #define TJA1100_COMM_STAT_TX_MODE_SEND_I 0x4000
236 #define TJA1100_COMM_STAT_TX_MODE_SEND_Z 0x6000
237 #define TJA1100_COMM_STAT_LOC_RCVR_STATUS 0x1000
238 #define TJA1100_COMM_STAT_REM_RCVR_STATUS 0x0800
239 #define TJA1100_COMM_STAT_SCR_LOCKED 0x0400
240 #define TJA1100_COMM_STAT_SSD_ERR 0x0200
241 #define TJA1100_COMM_STAT_ESD_ERR 0x0100
242 #define TJA1100_COMM_STAT_SQI 0x00E0
243 #define TJA1100_COMM_STAT_SQI_WORSE_THAN_CLASS_A 0x0000
244 #define TJA1100_COMM_STAT_SQI_CLASS_A 0x0020
245 #define TJA1100_COMM_STAT_SQI_CLASS_B 0x0040
246 #define TJA1100_COMM_STAT_SQI_CLASS_C 0x0060
247 #define TJA1100_COMM_STAT_SQI_CLASS_D 0x0080
248 #define TJA1100_COMM_STAT_SQI_CLASS_E 0x00A0
249 #define TJA1100_COMM_STAT_SQI_CLASS_F 0x00C0
250 #define TJA1100_COMM_STAT_SQI_CLASS_G 0x00E0
251 #define TJA1100_COMM_STAT_RECEIVE_ERR 0x0010
252 #define TJA1100_COMM_STAT_TRANSMIT_ERR 0x0008
253 #define TJA1100_COMM_STAT_PHY_STATE 0x0007
254 #define TJA1100_COMM_STAT_PHY_STATE_IDLE 0x0000
255 #define TJA1100_COMM_STAT_PHY_STATE_INITIALIZING 0x0001
256 #define TJA1100_COMM_STAT_PHY_STATE_CONFIGURED 0x0002
257 #define TJA1100_COMM_STAT_PHY_STATE_OFFLINE 0x0003
258 #define TJA1100_COMM_STAT_PHY_STATE_ACTIVE 0x0004
259 #define TJA1100_COMM_STAT_PHY_STATE_ISOLATE 0x0005
260 #define TJA1100_COMM_STAT_PHY_STATE_CABLE_TEST 0x0006
261 #define TJA1100_COMM_STAT_PHY_STATE_TEST_MODE 0x0007
262 
263 //General status register
264 #define TJA1100_GENERAL_STAT_INT_STATUS 0x8000
265 #define TJA1100_GENERAL_STAT_PLL_LOCKED 0x4000
266 #define TJA1100_GENERAL_STAT_LOCAL_WU 0x2000
267 #define TJA1100_GENERAL_STAT_REMOTE_WU 0x1000
268 #define TJA1100_GENERAL_STAT_DATA_DET_WU 0x0800
269 #define TJA1100_GENERAL_STAT_EN_STATUS 0x0400
270 #define TJA1100_GENERAL_STAT_RESET_STATUS 0x0200
271 #define TJA1100_GENERAL_STAT_LINKFAIL_CNT 0x00F8
272 
273 //External status register
274 #define TJA1100_EXTERNAL_STAT_UV_VDDA_3V3 0x4000
275 #define TJA1100_EXTERNAL_STAT_UV_VDDD_1V8 0x2000
276 #define TJA1100_EXTERNAL_STAT_UV_VDDA_1V8 0x1000
277 #define TJA1100_EXTERNAL_STAT_UV_VDDIO 0x0800
278 #define TJA1100_EXTERNAL_STAT_TEMP_HIGH 0x0400
279 #define TJA1100_EXTERNAL_STAT_TEMP_WARN 0x0200
280 #define TJA1100_EXTERNAL_STAT_SHORT_DETECT 0x0100
281 #define TJA1100_EXTERNAL_STAT_OPEN_DETECT 0x0080
282 #define TJA1100_EXTERNAL_STAT_POLARITY_DETECT 0x0040
283 #define TJA1100_EXTERNAL_STAT_INTERLEAVE_DETECT 0x0020
284 
285 //Link-fail counter register
286 #define TJA1100_LINK_FAIL_COUNTER_LOC_RCVR_CNT 0xFF00
287 #define TJA1100_LINK_FAIL_COUNTER_REM_RCVR_CNT 0x00FF
288 
289 //C++ guard
290 #ifdef __cplusplus
291 extern "C" {
292 #endif
293 
294 //TJA1100 Ethernet PHY driver
295 extern const PhyDriver tja1100PhyDriver;
296 
297 //TJA1100 related functions
298 error_t tja1100Init(NetInterface *interface);
299 
300 void tja1100Tick(NetInterface *interface);
301 
302 void tja1100EnableIrq(NetInterface *interface);
303 void tja1100DisableIrq(NetInterface *interface);
304 
305 void tja1100EventHandler(NetInterface *interface);
306 
307 void tja1100WritePhyReg(NetInterface *interface, uint8_t address,
308  uint16_t data);
309 
310 uint16_t tja1100ReadPhyReg(NetInterface *interface, uint8_t address);
311 
312 void tja1100DumpPhyReg(NetInterface *interface);
313 
314 //C++ guard
315 #ifdef __cplusplus
316 }
317 #endif
318 
319 #endif
PHY driver.
Definition: nic.h:214
void tja1100DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
error_t
Error codes.
Definition: error.h:42
void tja1100WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define NetInterface
Definition: net.h:36
uint16_t tja1100ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void tja1100DisableIrq(NetInterface *interface)
Disable interrupts.
Network interface controller abstraction layer.
void tja1100EnableIrq(NetInterface *interface)
Enable interrupts.
const PhyDriver tja1100PhyDriver
TJA1100 Ethernet PHY driver.
error_t tja1100Init(NetInterface *interface)
TJA1100 PHY transceiver initialization.
Ipv6Addr address
void tja1100Tick(NetInterface *interface)
TJA1100 timer handler.
uint8_t data[]
Definition: dtls_misc.h:176
void tja1100EventHandler(NetInterface *interface)
TJA1100 event handler.