APM32F4 Ethernet MAC driver. More...
#include "core/nic.h"
Go to the source code of this file.
Data Structures | |
struct | Apm32f4xxTxDmaDesc |
Enhanced TX DMA descriptor. More... | |
struct | Apm32f4xxRxDmaDesc |
Enhanced RX DMA descriptor. More... | |
Macros | |
#define | APM32F4XX_ETH_TX_BUFFER_COUNT 3 |
#define | APM32F4XX_ETH_TX_BUFFER_SIZE 1536 |
#define | APM32F4XX_ETH_RX_BUFFER_COUNT 6 |
#define | APM32F4XX_ETH_RX_BUFFER_SIZE 1536 |
#define | APM32F4XX_ETH_IRQ_PRIORITY_GROUPING 3 |
#define | APM32F4XX_ETH_IRQ_GROUP_PRIORITY 12 |
#define | APM32F4XX_ETH_IRQ_SUB_PRIORITY 0 |
#define | ETH_CFG_CST 0x02000000 |
#define | ETH_CFG_WDTDIS 0x00800000 |
#define | ETH_CFG_JDIS 0x00400000 |
#define | ETH_CFG_IFG 0x000E0000 |
#define | ETH_CFG_DISCRS 0x00010000 |
#define | ETH_CFG_RESERVED15 0x00008000 |
#define | ETH_CFG_SSEL 0x00004000 |
#define | ETH_CFG_DISRXO 0x00002000 |
#define | ETH_CFG_LBM 0x00001000 |
#define | ETH_CFG_DM 0x00000800 |
#define | ETH_CFG_IPC 0x00000400 |
#define | ETH_CFG_DISR 0x00000200 |
#define | ETH_CFG_ACS 0x00000080 |
#define | ETH_CFG_BL 0x00000060 |
#define | ETH_CFG_DC 0x00000010 |
#define | ETH_CFG_TXEN 0x00000008 |
#define | ETH_CFG_RXEN 0x00000004 |
#define | ETH_FRAF_RXA 0x80000000 |
#define | ETH_FRAF_HPF 0x00000400 |
#define | ETH_FRAF_SAFEN 0x00000200 |
#define | ETH_FRAF_SAIF 0x00000100 |
#define | ETH_FRAF_PCTRLF 0x000000C0 |
#define | ETH_FRAF_DISBF 0x00000020 |
#define | ETH_FRAF_PM 0x00000010 |
#define | ETH_FRAF_DAIF 0x00000008 |
#define | ETH_FRAF_HMC 0x00000004 |
#define | ETH_FRAF_HUC 0x00000002 |
#define | ETH_FRAF_PR 0x00000001 |
#define | ETH_ADDR_PA 0x0000F800 |
#define | ETH_ADDR_MR 0x000007C0 |
#define | ETH_ADDR_CR 0x0000003C |
#define | ETH_ADDR_CR_DIV_42 0x00000000 |
#define | ETH_ADDR_CR_DIV_62 0x00000004 |
#define | ETH_ADDR_CR_DIV_16 0x00000008 |
#define | ETH_ADDR_CR_DIV_26 0x0000000C |
#define | ETH_ADDR_CR_DIV_102 0x00000010 |
#define | ETH_ADDR_MW 0x00000002 |
#define | ETH_ADDR_MB 0x00000001 |
#define | ETH_DATA_MD 0x0000FFFF |
#define | ETH_IMASK_TSTIM 0x00000200 |
#define | ETH_IMASK_PMTIM 0x00000008 |
#define | ETH_ADDR0H_AL1 0x80000000 |
#define | ETH_ADDR0H_ADDR0H 0x0000FFFF |
#define | ETH_ADDR1H_ADDREN 0x80000000 |
#define | ETH_ADDR1H_ADDRSEL 0x40000000 |
#define | ETH_ADDR1H_MASKBCTRL 0x3F000000 |
#define | ETH_ADDR1H_ADDR1H 0x0000FFFF |
#define | ETH_ADDR2H_ADDREN 0x80000000 |
#define | ETH_ADDR2H_ADDRSEL 0x40000000 |
#define | ETH_ADDR2H_MASKBCTRL 0x3F000000 |
#define | ETH_ADDR2H_ADDR2H 0x0000FFFF |
#define | ETH_ADDR3H_ADDREN 0x80000000 |
#define | ETH_ADDR3H_ADDRSEL 0x40000000 |
#define | ETH_ADDR3H_MASKBCTRL 0x3F000000 |
#define | ETH_ADDR3H_ADDR3H 0x0000FFFF |
#define | ETH_RXINT_RXGUNF 0x00020000 |
#define | ETH_RXINT_RXFAE 0x00000040 |
#define | ETH_RXINT_RXFCE 0x00000020 |
#define | ETH_TXINT_TXGF 0x00200000 |
#define | ETH_TXINT_TXGFMCOL 0x00008000 |
#define | ETH_TXINT_TXGFSCOL 0x00004000 |
#define | ETH_DMABMOD_MB 0x04000000 |
#define | ETH_DMABMOD_AAL 0x02000000 |
#define | ETH_DMABMOD_PBLX4 0x01000000 |
#define | ETH_DMABMOD_USP 0x00800000 |
#define | ETH_DMABMOD_RPBL 0x007E0000 |
#define | ETH_DMABMOD_RPBL_1 0x00020000 |
#define | ETH_DMABMOD_RPBL_2 0x00040000 |
#define | ETH_DMABMOD_RPBL_4 0x00080000 |
#define | ETH_DMABMOD_RPBL_8 0x00100000 |
#define | ETH_DMABMOD_RPBL_16 0x00200000 |
#define | ETH_DMABMOD_RPBL_32 0x00400000 |
#define | ETH_DMABMOD_FB 0x00010000 |
#define | ETH_DMABMOD_PR 0x0000C000 |
#define | ETH_DMABMOD_PR_1_1 0x00000000 |
#define | ETH_DMABMOD_PR_2_1 0x00004000 |
#define | ETH_DMABMOD_PR_3_1 0x00008000 |
#define | ETH_DMABMOD_PR_4_1 0x0000C000 |
#define | ETH_DMABMOD_PBL 0x00003F00 |
#define | ETH_DMABMOD_PBL_1 0x00000100 |
#define | ETH_DMABMOD_PBL_2 0x00000200 |
#define | ETH_DMABMOD_PBL_4 0x00000400 |
#define | ETH_DMABMOD_PBL_8 0x00000800 |
#define | ETH_DMABMOD_PBL_16 0x00001000 |
#define | ETH_DMABMOD_PBL_32 0x00002000 |
#define | ETH_DMABMOD_EDFEN 0x00000080 |
#define | ETH_DMABMOD_DSL 0x0000007C |
#define | ETH_DMABMOD_DSL_0 0x00000000 |
#define | ETH_DMABMOD_DSL_1 0x00000004 |
#define | ETH_DMABMOD_DSL_2 0x00000008 |
#define | ETH_DMABMOD_DSL_4 0x00000010 |
#define | ETH_DMABMOD_DSL_8 0x00000020 |
#define | ETH_DMABMOD_DSL_16 0x00000040 |
#define | ETH_DMABMOD_DAS 0x00000002 |
#define | ETH_DMABMOD_SWR 0x00000001 |
#define | ETH_DMASTS_TSTFLG 0x20000000 |
#define | ETH_DMASTS_PMTFLG 0x10000000 |
#define | ETH_DMASTS_MMCFLG 0x08000000 |
#define | ETH_DMASTS_ERRB 0x03800000 |
#define | ETH_DMASTS_TXSTS 0x00700000 |
#define | ETH_DMASTS_RXSTS 0x000E0000 |
#define | ETH_DMASTS_NINTS 0x00010000 |
#define | ETH_DMASTS_AINTS 0x00008000 |
#define | ETH_DMASTS_ERXFLG 0x00004000 |
#define | ETH_DMASTS_FBERRFLG 0x00002000 |
#define | ETH_DMASTS_ETXFLG 0x00000400 |
#define | ETH_DMASTS_RXWTOFLG 0x00000200 |
#define | ETH_DMASTS_RXSFLG 0x00000100 |
#define | ETH_DMASTS_RXBU 0x00000080 |
#define | ETH_DMASTS_RXFLG 0x00000040 |
#define | ETH_DMASTS_TXUNF 0x00000020 |
#define | ETH_DMASTS_RXOVF 0x00000010 |
#define | ETH_DMASTS_TXJTO 0x00000008 |
#define | ETH_DMASTS_TXBU 0x00000004 |
#define | ETH_DMASTS_TXSFLG 0x00000002 |
#define | ETH_DMASTS_TXFLG 0x00000001 |
#define | ETH_DMAOPMOD_DISDT 0x04000000 |
#define | ETH_DMAOPMOD_RXSF 0x02000000 |
#define | ETH_DMAOPMOD_DISFRXF 0x01000000 |
#define | ETH_DMAOPMOD_TXSF 0x00200000 |
#define | ETH_DMAOPMOD_FTXF 0x00100000 |
#define | ETH_DMAOPMOD_TXTHCTRL 0x0001C000 |
#define | ETH_DMAOPMOD_STTX 0x00002000 |
#define | ETH_DMAOPMOD_FERRF 0x00000080 |
#define | ETH_DMAOPMOD_FUF 0x00000040 |
#define | ETH_DMAOPMOD_RXTHCTRL 0x00000018 |
#define | ETH_DMAOPMOD_OSECF 0x00000004 |
#define | ETH_DMAOPMOD_STRX 0x00000002 |
#define | ETH_DMAINTEN_NINTSEN 0x00010000 |
#define | ETH_DMAINTEN_AINTSEN 0x00008000 |
#define | ETH_DMAINTEN_ERXIEN 0x00004000 |
#define | ETH_DMAINTEN_FBERREN 0x00002000 |
#define | ETH_DMAINTEN_ETXIEN 0x00000400 |
#define | ETH_DMAINTEN_RXWTOEN 0x00000200 |
#define | ETH_DMAINTEN_RXSEN 0x00000100 |
#define | ETH_DMAINTEN_RXBUEN 0x00000080 |
#define | ETH_DMAINTEN_RXIEN 0x00000040 |
#define | ETH_DMAINTEN_TXUNFEN 0x00000020 |
#define | ETH_DMAINTEN_RXOVFEN 0x00000010 |
#define | ETH_DMAINTEN_TXJTOEN 0x00000008 |
#define | ETH_DMAINTEN_TXBUEN 0x00000004 |
#define | ETH_DMAINTEN_TXSEN 0x00000002 |
#define | ETH_DMAINTEN_TXIEN 0x00000001 |
#define | ETH_TXDES0_OWN 0x80000000 |
#define | ETH_TXDES0_INTC 0x40000000 |
#define | ETH_TXDES0_LS 0x20000000 |
#define | ETH_TXDES0_FS 0x10000000 |
#define | ETH_TXDES0_DISC 0x08000000 |
#define | ETH_TXDES0_DISP 0x04000000 |
#define | ETH_TXDES0_TXTSEN 0x02000000 |
#define | ETH_TXDES0_CHINS 0x00C00000 |
#define | ETH_TXDES0_TXENDR 0x00200000 |
#define | ETH_TXDES0_TXCH 0x00100000 |
#define | ETH_TXDES0_TXTSS 0x00020000 |
#define | ETH_TXDES0_IHERR 0x00010000 |
#define | ETH_TXDES0_ERRS 0x00008000 |
#define | ETH_TXDES0_JTO 0x00004000 |
#define | ETH_TXDES0_FF 0x00002000 |
#define | ETH_TXDES0_IPERR 0x00001000 |
#define | ETH_TXDES0_LSC 0x00000800 |
#define | ETH_TXDES0_NC 0x00000400 |
#define | ETH_TXDES0_LC 0x00000200 |
#define | ETH_TXDES0_EC 0x00000100 |
#define | ETH_TXDES0_VLANF 0x00000080 |
#define | ETH_TXDES0_CCNT 0x00000078 |
#define | ETH_TXDES0_EDEF 0x00000004 |
#define | ETH_TXDES0_UFERR 0x00000002 |
#define | ETH_TXDES0_DEF 0x00000001 |
#define | ETH_TXDES1_TXBS2 0x1FFF0000 |
#define | ETH_TXDES1_TXBS1 0x00001FFF |
#define | ETH_TXDES2_TXADDR1_TXFTSL 0xFFFFFFFF |
#define | ETH_TXDES3_TXADDR2_TXFTSH 0xFFFFFFFF |
#define | ETH_TXDES6_TXFTSL 0xFFFFFFFF |
#define | ETH_TXDES7_TXFTSH 0xFFFFFFFF |
#define | ETH_RXDES0_OWN 0x80000000 |
#define | ETH_RXDES0_ADDRF 0x40000000 |
#define | ETH_RXDES0_FL 0x3FFF0000 |
#define | ETH_RXDES0_ERRS 0x00008000 |
#define | ETH_RXDES0_DESERR 0x00004000 |
#define | ETH_RXDES0_SADDRF 0x00002000 |
#define | ETH_RXDES0_LERR 0x00001000 |
#define | ETH_RXDES0_OFERR 0x00000800 |
#define | ETH_RXDES0_VLANF 0x00000400 |
#define | ETH_RXDES0_FDES 0x00000200 |
#define | ETH_RXDES0_LDES 0x00000100 |
#define | ETH_RXDES0_IPCERR_TSV 0x00000080 |
#define | ETH_RXDES0_LC 0x00000040 |
#define | ETH_RXDES0_FT 0x00000020 |
#define | ETH_RXDES0_RXWDTTO 0x00000010 |
#define | ETH_RXDES0_RERR 0x00000008 |
#define | ETH_RXDES0_DERR 0x00000004 |
#define | ETH_RXDES0_CERR 0x00000002 |
#define | ETH_RXDES0_PERR_ESA 0x00000001 |
#define | ETH_RXDES1_DINTC 0x80000000 |
#define | ETH_RXDES1_RBS2 0x1FFF0000 |
#define | ETH_RXDES1_RXER 0x00008000 |
#define | ETH_RXDES1_RXCH 0x00004000 |
#define | ETH_RXDES1_RBS1 0x00001FFF |
#define | ETH_RXDES2_RXADDR1_RXFTSL 0xFFFFFFFF |
#define | ETH_RXDES3_RXADDR2_RXFTSH 0xFFFFFFFF |
#define | ETH_RXDES4_PTPV 0x00002000 |
#define | ETH_RXDES4_PTPFT 0x00001000 |
#define | ETH_RXDES4_PTPMT 0x00000F00 |
#define | ETH_RXDES4_IPV6P 0x00000080 |
#define | ETH_RXDES4_IPV4P 0x00000040 |
#define | ETH_RXDES4_IPCBP 0x00000020 |
#define | ETH_RXDES4_IPPERR 0x00000010 |
#define | ETH_RXDES4_IPHERR 0x00000008 |
#define | ETH_RXDES4_IPPT 0x00000007 |
#define | ETH_RXDES6_RXFTSL 0xFFFFFFFF |
#define | ETH_RXDES7_RXFTSH 0xFFFFFFFF |
Functions | |
error_t | apm32f4xxEthInit (NetInterface *interface) |
APM32F4 Ethernet MAC initialization. More... | |
void | apm32f4xxEthInitGpio (NetInterface *interface) |
GPIO configuration. More... | |
void | apm32f4xxEthInitDmaDesc (NetInterface *interface) |
Initialize DMA descriptor lists. More... | |
void | apm32f4xxEthTick (NetInterface *interface) |
APM32F4 Ethernet MAC timer handler. More... | |
void | apm32f4xxEthEnableIrq (NetInterface *interface) |
Enable interrupts. More... | |
void | apm32f4xxEthDisableIrq (NetInterface *interface) |
Disable interrupts. More... | |
void | apm32f4xxEthEventHandler (NetInterface *interface) |
APM32F4 Ethernet MAC event handler. More... | |
error_t | apm32f4xxEthSendPacket (NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary) |
Send a packet. More... | |
error_t | apm32f4xxEthReceivePacket (NetInterface *interface) |
Receive a packet. More... | |
error_t | apm32f4xxEthUpdateMacAddrFilter (NetInterface *interface) |
Configure MAC address filtering. More... | |
error_t | apm32f4xxEthUpdateMacConfig (NetInterface *interface) |
Adjust MAC configuration parameters for proper operation. More... | |
void | apm32f4xxEthWritePhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data) |
Write PHY register. More... | |
uint16_t | apm32f4xxEthReadPhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr) |
Read PHY register. More... | |
uint32_t | apm32f4xxEthCalcCrc (const void *data, size_t length) |
CRC calculation. More... | |
Variables | |
const NicDriver | apm32f4xxEthDriver |
APM32F4 Ethernet MAC driver. More... | |
Detailed Description
APM32F4 Ethernet MAC driver.
License
SPDX-License-Identifier: GPL-2.0-or-later
Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
This file is part of CycloneTCP Open.
This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
- Version
- 2.4.4
Definition in file apm32f4xx_eth_driver.h.
Macro Definition Documentation
◆ APM32F4XX_ETH_IRQ_GROUP_PRIORITY
#define APM32F4XX_ETH_IRQ_GROUP_PRIORITY 12 |
Definition at line 74 of file apm32f4xx_eth_driver.h.
◆ APM32F4XX_ETH_IRQ_PRIORITY_GROUPING
#define APM32F4XX_ETH_IRQ_PRIORITY_GROUPING 3 |
Definition at line 67 of file apm32f4xx_eth_driver.h.
◆ APM32F4XX_ETH_IRQ_SUB_PRIORITY
#define APM32F4XX_ETH_IRQ_SUB_PRIORITY 0 |
Definition at line 81 of file apm32f4xx_eth_driver.h.
◆ APM32F4XX_ETH_RX_BUFFER_COUNT
#define APM32F4XX_ETH_RX_BUFFER_COUNT 6 |
Definition at line 53 of file apm32f4xx_eth_driver.h.
◆ APM32F4XX_ETH_RX_BUFFER_SIZE
#define APM32F4XX_ETH_RX_BUFFER_SIZE 1536 |
Definition at line 60 of file apm32f4xx_eth_driver.h.
◆ APM32F4XX_ETH_TX_BUFFER_COUNT
#define APM32F4XX_ETH_TX_BUFFER_COUNT 3 |
Definition at line 39 of file apm32f4xx_eth_driver.h.
◆ APM32F4XX_ETH_TX_BUFFER_SIZE
#define APM32F4XX_ETH_TX_BUFFER_SIZE 1536 |
Definition at line 46 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR0H_ADDR0H
#define ETH_ADDR0H_ADDR0H 0x0000FFFF |
Definition at line 139 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR0H_AL1
#define ETH_ADDR0H_AL1 0x80000000 |
Definition at line 138 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR1H_ADDR1H
#define ETH_ADDR1H_ADDR1H 0x0000FFFF |
Definition at line 145 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR1H_ADDREN
#define ETH_ADDR1H_ADDREN 0x80000000 |
Definition at line 142 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR1H_ADDRSEL
#define ETH_ADDR1H_ADDRSEL 0x40000000 |
Definition at line 143 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR1H_MASKBCTRL
#define ETH_ADDR1H_MASKBCTRL 0x3F000000 |
Definition at line 144 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR2H_ADDR2H
#define ETH_ADDR2H_ADDR2H 0x0000FFFF |
Definition at line 151 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR2H_ADDREN
#define ETH_ADDR2H_ADDREN 0x80000000 |
Definition at line 148 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR2H_ADDRSEL
#define ETH_ADDR2H_ADDRSEL 0x40000000 |
Definition at line 149 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR2H_MASKBCTRL
#define ETH_ADDR2H_MASKBCTRL 0x3F000000 |
Definition at line 150 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR3H_ADDR3H
#define ETH_ADDR3H_ADDR3H 0x0000FFFF |
Definition at line 157 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR3H_ADDREN
#define ETH_ADDR3H_ADDREN 0x80000000 |
Definition at line 154 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR3H_ADDRSEL
#define ETH_ADDR3H_ADDRSEL 0x40000000 |
Definition at line 155 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR3H_MASKBCTRL
#define ETH_ADDR3H_MASKBCTRL 0x3F000000 |
Definition at line 156 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_CR
#define ETH_ADDR_CR 0x0000003C |
Definition at line 121 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_CR_DIV_102
#define ETH_ADDR_CR_DIV_102 0x00000010 |
Definition at line 126 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_CR_DIV_16
#define ETH_ADDR_CR_DIV_16 0x00000008 |
Definition at line 124 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_CR_DIV_26
#define ETH_ADDR_CR_DIV_26 0x0000000C |
Definition at line 125 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_CR_DIV_42
#define ETH_ADDR_CR_DIV_42 0x00000000 |
Definition at line 122 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_CR_DIV_62
#define ETH_ADDR_CR_DIV_62 0x00000004 |
Definition at line 123 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_MB
#define ETH_ADDR_MB 0x00000001 |
Definition at line 128 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_MR
#define ETH_ADDR_MR 0x000007C0 |
Definition at line 120 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_MW
#define ETH_ADDR_MW 0x00000002 |
Definition at line 127 of file apm32f4xx_eth_driver.h.
◆ ETH_ADDR_PA
#define ETH_ADDR_PA 0x0000F800 |
Definition at line 119 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_ACS
#define ETH_CFG_ACS 0x00000080 |
Definition at line 99 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_BL
#define ETH_CFG_BL 0x00000060 |
Definition at line 100 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_CST
#define ETH_CFG_CST 0x02000000 |
Definition at line 87 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_DC
#define ETH_CFG_DC 0x00000010 |
Definition at line 101 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_DISCRS
#define ETH_CFG_DISCRS 0x00010000 |
Definition at line 91 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_DISR
#define ETH_CFG_DISR 0x00000200 |
Definition at line 98 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_DISRXO
#define ETH_CFG_DISRXO 0x00002000 |
Definition at line 94 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_DM
#define ETH_CFG_DM 0x00000800 |
Definition at line 96 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_IFG
#define ETH_CFG_IFG 0x000E0000 |
Definition at line 90 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_IPC
#define ETH_CFG_IPC 0x00000400 |
Definition at line 97 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_JDIS
#define ETH_CFG_JDIS 0x00400000 |
Definition at line 89 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_LBM
#define ETH_CFG_LBM 0x00001000 |
Definition at line 95 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_RESERVED15
#define ETH_CFG_RESERVED15 0x00008000 |
Definition at line 92 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_RXEN
#define ETH_CFG_RXEN 0x00000004 |
Definition at line 103 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_SSEL
#define ETH_CFG_SSEL 0x00004000 |
Definition at line 93 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_TXEN
#define ETH_CFG_TXEN 0x00000008 |
Definition at line 102 of file apm32f4xx_eth_driver.h.
◆ ETH_CFG_WDTDIS
#define ETH_CFG_WDTDIS 0x00800000 |
Definition at line 88 of file apm32f4xx_eth_driver.h.
◆ ETH_DATA_MD
#define ETH_DATA_MD 0x0000FFFF |
Definition at line 131 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_AAL
#define ETH_DMABMOD_AAL 0x02000000 |
Definition at line 171 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_DAS
#define ETH_DMABMOD_DAS 0x00000002 |
Definition at line 202 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_DSL
#define ETH_DMABMOD_DSL 0x0000007C |
Definition at line 195 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_DSL_0
#define ETH_DMABMOD_DSL_0 0x00000000 |
Definition at line 196 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_DSL_1
#define ETH_DMABMOD_DSL_1 0x00000004 |
Definition at line 197 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_DSL_16
#define ETH_DMABMOD_DSL_16 0x00000040 |
Definition at line 201 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_DSL_2
#define ETH_DMABMOD_DSL_2 0x00000008 |
Definition at line 198 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_DSL_4
#define ETH_DMABMOD_DSL_4 0x00000010 |
Definition at line 199 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_DSL_8
#define ETH_DMABMOD_DSL_8 0x00000020 |
Definition at line 200 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_EDFEN
#define ETH_DMABMOD_EDFEN 0x00000080 |
Definition at line 194 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_FB
#define ETH_DMABMOD_FB 0x00010000 |
Definition at line 181 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_MB
#define ETH_DMABMOD_MB 0x04000000 |
Definition at line 170 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PBL
#define ETH_DMABMOD_PBL 0x00003F00 |
Definition at line 187 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PBL_1
#define ETH_DMABMOD_PBL_1 0x00000100 |
Definition at line 188 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PBL_16
#define ETH_DMABMOD_PBL_16 0x00001000 |
Definition at line 192 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PBL_2
#define ETH_DMABMOD_PBL_2 0x00000200 |
Definition at line 189 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PBL_32
#define ETH_DMABMOD_PBL_32 0x00002000 |
Definition at line 193 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PBL_4
#define ETH_DMABMOD_PBL_4 0x00000400 |
Definition at line 190 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PBL_8
#define ETH_DMABMOD_PBL_8 0x00000800 |
Definition at line 191 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PBLX4
#define ETH_DMABMOD_PBLX4 0x01000000 |
Definition at line 172 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PR
#define ETH_DMABMOD_PR 0x0000C000 |
Definition at line 182 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PR_1_1
#define ETH_DMABMOD_PR_1_1 0x00000000 |
Definition at line 183 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PR_2_1
#define ETH_DMABMOD_PR_2_1 0x00004000 |
Definition at line 184 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PR_3_1
#define ETH_DMABMOD_PR_3_1 0x00008000 |
Definition at line 185 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_PR_4_1
#define ETH_DMABMOD_PR_4_1 0x0000C000 |
Definition at line 186 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_RPBL
#define ETH_DMABMOD_RPBL 0x007E0000 |
Definition at line 174 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_RPBL_1
#define ETH_DMABMOD_RPBL_1 0x00020000 |
Definition at line 175 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_RPBL_16
#define ETH_DMABMOD_RPBL_16 0x00200000 |
Definition at line 179 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_RPBL_2
#define ETH_DMABMOD_RPBL_2 0x00040000 |
Definition at line 176 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_RPBL_32
#define ETH_DMABMOD_RPBL_32 0x00400000 |
Definition at line 180 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_RPBL_4
#define ETH_DMABMOD_RPBL_4 0x00080000 |
Definition at line 177 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_RPBL_8
#define ETH_DMABMOD_RPBL_8 0x00100000 |
Definition at line 178 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_SWR
#define ETH_DMABMOD_SWR 0x00000001 |
Definition at line 203 of file apm32f4xx_eth_driver.h.
◆ ETH_DMABMOD_USP
#define ETH_DMABMOD_USP 0x00800000 |
Definition at line 173 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_AINTSEN
#define ETH_DMAINTEN_AINTSEN 0x00008000 |
Definition at line 244 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_ERXIEN
#define ETH_DMAINTEN_ERXIEN 0x00004000 |
Definition at line 245 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_ETXIEN
#define ETH_DMAINTEN_ETXIEN 0x00000400 |
Definition at line 247 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_FBERREN
#define ETH_DMAINTEN_FBERREN 0x00002000 |
Definition at line 246 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_NINTSEN
#define ETH_DMAINTEN_NINTSEN 0x00010000 |
Definition at line 243 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_RXBUEN
#define ETH_DMAINTEN_RXBUEN 0x00000080 |
Definition at line 250 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_RXIEN
#define ETH_DMAINTEN_RXIEN 0x00000040 |
Definition at line 251 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_RXOVFEN
#define ETH_DMAINTEN_RXOVFEN 0x00000010 |
Definition at line 253 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_RXSEN
#define ETH_DMAINTEN_RXSEN 0x00000100 |
Definition at line 249 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_RXWTOEN
#define ETH_DMAINTEN_RXWTOEN 0x00000200 |
Definition at line 248 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_TXBUEN
#define ETH_DMAINTEN_TXBUEN 0x00000004 |
Definition at line 255 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_TXIEN
#define ETH_DMAINTEN_TXIEN 0x00000001 |
Definition at line 257 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_TXJTOEN
#define ETH_DMAINTEN_TXJTOEN 0x00000008 |
Definition at line 254 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_TXSEN
#define ETH_DMAINTEN_TXSEN 0x00000002 |
Definition at line 256 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAINTEN_TXUNFEN
#define ETH_DMAINTEN_TXUNFEN 0x00000020 |
Definition at line 252 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_DISDT
#define ETH_DMAOPMOD_DISDT 0x04000000 |
Definition at line 229 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_DISFRXF
#define ETH_DMAOPMOD_DISFRXF 0x01000000 |
Definition at line 231 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_FERRF
#define ETH_DMAOPMOD_FERRF 0x00000080 |
Definition at line 236 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_FTXF
#define ETH_DMAOPMOD_FTXF 0x00100000 |
Definition at line 233 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_FUF
#define ETH_DMAOPMOD_FUF 0x00000040 |
Definition at line 237 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_OSECF
#define ETH_DMAOPMOD_OSECF 0x00000004 |
Definition at line 239 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_RXSF
#define ETH_DMAOPMOD_RXSF 0x02000000 |
Definition at line 230 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_RXTHCTRL
#define ETH_DMAOPMOD_RXTHCTRL 0x00000018 |
Definition at line 238 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_STRX
#define ETH_DMAOPMOD_STRX 0x00000002 |
Definition at line 240 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_STTX
#define ETH_DMAOPMOD_STTX 0x00002000 |
Definition at line 235 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_TXSF
#define ETH_DMAOPMOD_TXSF 0x00200000 |
Definition at line 232 of file apm32f4xx_eth_driver.h.
◆ ETH_DMAOPMOD_TXTHCTRL
#define ETH_DMAOPMOD_TXTHCTRL 0x0001C000 |
Definition at line 234 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_AINTS
#define ETH_DMASTS_AINTS 0x00008000 |
Definition at line 213 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_ERRB
#define ETH_DMASTS_ERRB 0x03800000 |
Definition at line 209 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_ERXFLG
#define ETH_DMASTS_ERXFLG 0x00004000 |
Definition at line 214 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_ETXFLG
#define ETH_DMASTS_ETXFLG 0x00000400 |
Definition at line 216 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_FBERRFLG
#define ETH_DMASTS_FBERRFLG 0x00002000 |
Definition at line 215 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_MMCFLG
#define ETH_DMASTS_MMCFLG 0x08000000 |
Definition at line 208 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_NINTS
#define ETH_DMASTS_NINTS 0x00010000 |
Definition at line 212 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_PMTFLG
#define ETH_DMASTS_PMTFLG 0x10000000 |
Definition at line 207 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_RXBU
#define ETH_DMASTS_RXBU 0x00000080 |
Definition at line 219 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_RXFLG
#define ETH_DMASTS_RXFLG 0x00000040 |
Definition at line 220 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_RXOVF
#define ETH_DMASTS_RXOVF 0x00000010 |
Definition at line 222 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_RXSFLG
#define ETH_DMASTS_RXSFLG 0x00000100 |
Definition at line 218 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_RXSTS
#define ETH_DMASTS_RXSTS 0x000E0000 |
Definition at line 211 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_RXWTOFLG
#define ETH_DMASTS_RXWTOFLG 0x00000200 |
Definition at line 217 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_TSTFLG
#define ETH_DMASTS_TSTFLG 0x20000000 |
Definition at line 206 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_TXBU
#define ETH_DMASTS_TXBU 0x00000004 |
Definition at line 224 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_TXFLG
#define ETH_DMASTS_TXFLG 0x00000001 |
Definition at line 226 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_TXJTO
#define ETH_DMASTS_TXJTO 0x00000008 |
Definition at line 223 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_TXSFLG
#define ETH_DMASTS_TXSFLG 0x00000002 |
Definition at line 225 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_TXSTS
#define ETH_DMASTS_TXSTS 0x00700000 |
Definition at line 210 of file apm32f4xx_eth_driver.h.
◆ ETH_DMASTS_TXUNF
#define ETH_DMASTS_TXUNF 0x00000020 |
Definition at line 221 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_DAIF
#define ETH_FRAF_DAIF 0x00000008 |
Definition at line 113 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_DISBF
#define ETH_FRAF_DISBF 0x00000020 |
Definition at line 111 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_HMC
#define ETH_FRAF_HMC 0x00000004 |
Definition at line 114 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_HPF
#define ETH_FRAF_HPF 0x00000400 |
Definition at line 107 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_HUC
#define ETH_FRAF_HUC 0x00000002 |
Definition at line 115 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_PCTRLF
#define ETH_FRAF_PCTRLF 0x000000C0 |
Definition at line 110 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_PM
#define ETH_FRAF_PM 0x00000010 |
Definition at line 112 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_PR
#define ETH_FRAF_PR 0x00000001 |
Definition at line 116 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_RXA
#define ETH_FRAF_RXA 0x80000000 |
Definition at line 106 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_SAFEN
#define ETH_FRAF_SAFEN 0x00000200 |
Definition at line 108 of file apm32f4xx_eth_driver.h.
◆ ETH_FRAF_SAIF
#define ETH_FRAF_SAIF 0x00000100 |
Definition at line 109 of file apm32f4xx_eth_driver.h.
◆ ETH_IMASK_PMTIM
#define ETH_IMASK_PMTIM 0x00000008 |
Definition at line 135 of file apm32f4xx_eth_driver.h.
◆ ETH_IMASK_TSTIM
#define ETH_IMASK_TSTIM 0x00000200 |
Definition at line 134 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_ADDRF
#define ETH_RXDES0_ADDRF 0x40000000 |
Definition at line 294 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_CERR
#define ETH_RXDES0_CERR 0x00000002 |
Definition at line 310 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_DERR
#define ETH_RXDES0_DERR 0x00000004 |
Definition at line 309 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_DESERR
#define ETH_RXDES0_DESERR 0x00004000 |
Definition at line 297 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_ERRS
#define ETH_RXDES0_ERRS 0x00008000 |
Definition at line 296 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_FDES
#define ETH_RXDES0_FDES 0x00000200 |
Definition at line 302 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_FL
#define ETH_RXDES0_FL 0x3FFF0000 |
Definition at line 295 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_FT
#define ETH_RXDES0_FT 0x00000020 |
Definition at line 306 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_IPCERR_TSV
#define ETH_RXDES0_IPCERR_TSV 0x00000080 |
Definition at line 304 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_LC
#define ETH_RXDES0_LC 0x00000040 |
Definition at line 305 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_LDES
#define ETH_RXDES0_LDES 0x00000100 |
Definition at line 303 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_LERR
#define ETH_RXDES0_LERR 0x00001000 |
Definition at line 299 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_OFERR
#define ETH_RXDES0_OFERR 0x00000800 |
Definition at line 300 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_OWN
#define ETH_RXDES0_OWN 0x80000000 |
Definition at line 293 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_PERR_ESA
#define ETH_RXDES0_PERR_ESA 0x00000001 |
Definition at line 311 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_RERR
#define ETH_RXDES0_RERR 0x00000008 |
Definition at line 308 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_RXWDTTO
#define ETH_RXDES0_RXWDTTO 0x00000010 |
Definition at line 307 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_SADDRF
#define ETH_RXDES0_SADDRF 0x00002000 |
Definition at line 298 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES0_VLANF
#define ETH_RXDES0_VLANF 0x00000400 |
Definition at line 301 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES1_DINTC
#define ETH_RXDES1_DINTC 0x80000000 |
Definition at line 312 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES1_RBS1
#define ETH_RXDES1_RBS1 0x00001FFF |
Definition at line 316 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES1_RBS2
#define ETH_RXDES1_RBS2 0x1FFF0000 |
Definition at line 313 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES1_RXCH
#define ETH_RXDES1_RXCH 0x00004000 |
Definition at line 315 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES1_RXER
#define ETH_RXDES1_RXER 0x00008000 |
Definition at line 314 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES2_RXADDR1_RXFTSL
#define ETH_RXDES2_RXADDR1_RXFTSL 0xFFFFFFFF |
Definition at line 317 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES3_RXADDR2_RXFTSH
#define ETH_RXDES3_RXADDR2_RXFTSH 0xFFFFFFFF |
Definition at line 318 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES4_IPCBP
#define ETH_RXDES4_IPCBP 0x00000020 |
Definition at line 324 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES4_IPHERR
#define ETH_RXDES4_IPHERR 0x00000008 |
Definition at line 326 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES4_IPPERR
#define ETH_RXDES4_IPPERR 0x00000010 |
Definition at line 325 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES4_IPPT
#define ETH_RXDES4_IPPT 0x00000007 |
Definition at line 327 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES4_IPV4P
#define ETH_RXDES4_IPV4P 0x00000040 |
Definition at line 323 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES4_IPV6P
#define ETH_RXDES4_IPV6P 0x00000080 |
Definition at line 322 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES4_PTPFT
#define ETH_RXDES4_PTPFT 0x00001000 |
Definition at line 320 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES4_PTPMT
#define ETH_RXDES4_PTPMT 0x00000F00 |
Definition at line 321 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES4_PTPV
#define ETH_RXDES4_PTPV 0x00002000 |
Definition at line 319 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES6_RXFTSL
#define ETH_RXDES6_RXFTSL 0xFFFFFFFF |
Definition at line 328 of file apm32f4xx_eth_driver.h.
◆ ETH_RXDES7_RXFTSH
#define ETH_RXDES7_RXFTSH 0xFFFFFFFF |
Definition at line 329 of file apm32f4xx_eth_driver.h.
◆ ETH_RXINT_RXFAE
#define ETH_RXINT_RXFAE 0x00000040 |
Definition at line 161 of file apm32f4xx_eth_driver.h.
◆ ETH_RXINT_RXFCE
#define ETH_RXINT_RXFCE 0x00000020 |
Definition at line 162 of file apm32f4xx_eth_driver.h.
◆ ETH_RXINT_RXGUNF
#define ETH_RXINT_RXGUNF 0x00020000 |
Definition at line 160 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_CCNT
#define ETH_TXDES0_CCNT 0x00000078 |
Definition at line 281 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_CHINS
#define ETH_TXDES0_CHINS 0x00C00000 |
Definition at line 267 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_DEF
#define ETH_TXDES0_DEF 0x00000001 |
Definition at line 284 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_DISC
#define ETH_TXDES0_DISC 0x08000000 |
Definition at line 264 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_DISP
#define ETH_TXDES0_DISP 0x04000000 |
Definition at line 265 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_EC
#define ETH_TXDES0_EC 0x00000100 |
Definition at line 279 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_EDEF
#define ETH_TXDES0_EDEF 0x00000004 |
Definition at line 282 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_ERRS
#define ETH_TXDES0_ERRS 0x00008000 |
Definition at line 272 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_FF
#define ETH_TXDES0_FF 0x00002000 |
Definition at line 274 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_FS
#define ETH_TXDES0_FS 0x10000000 |
Definition at line 263 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_IHERR
#define ETH_TXDES0_IHERR 0x00010000 |
Definition at line 271 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_INTC
#define ETH_TXDES0_INTC 0x40000000 |
Definition at line 261 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_IPERR
#define ETH_TXDES0_IPERR 0x00001000 |
Definition at line 275 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_JTO
#define ETH_TXDES0_JTO 0x00004000 |
Definition at line 273 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_LC
#define ETH_TXDES0_LC 0x00000200 |
Definition at line 278 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_LS
#define ETH_TXDES0_LS 0x20000000 |
Definition at line 262 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_LSC
#define ETH_TXDES0_LSC 0x00000800 |
Definition at line 276 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_NC
#define ETH_TXDES0_NC 0x00000400 |
Definition at line 277 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_OWN
#define ETH_TXDES0_OWN 0x80000000 |
Definition at line 260 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_TXCH
#define ETH_TXDES0_TXCH 0x00100000 |
Definition at line 269 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_TXENDR
#define ETH_TXDES0_TXENDR 0x00200000 |
Definition at line 268 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_TXTSEN
#define ETH_TXDES0_TXTSEN 0x02000000 |
Definition at line 266 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_TXTSS
#define ETH_TXDES0_TXTSS 0x00020000 |
Definition at line 270 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_UFERR
#define ETH_TXDES0_UFERR 0x00000002 |
Definition at line 283 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES0_VLANF
#define ETH_TXDES0_VLANF 0x00000080 |
Definition at line 280 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES1_TXBS1
#define ETH_TXDES1_TXBS1 0x00001FFF |
Definition at line 286 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES1_TXBS2
#define ETH_TXDES1_TXBS2 0x1FFF0000 |
Definition at line 285 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES2_TXADDR1_TXFTSL
#define ETH_TXDES2_TXADDR1_TXFTSL 0xFFFFFFFF |
Definition at line 287 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES3_TXADDR2_TXFTSH
#define ETH_TXDES3_TXADDR2_TXFTSH 0xFFFFFFFF |
Definition at line 288 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES6_TXFTSL
#define ETH_TXDES6_TXFTSL 0xFFFFFFFF |
Definition at line 289 of file apm32f4xx_eth_driver.h.
◆ ETH_TXDES7_TXFTSH
#define ETH_TXDES7_TXFTSH 0xFFFFFFFF |
Definition at line 290 of file apm32f4xx_eth_driver.h.
◆ ETH_TXINT_TXGF
#define ETH_TXINT_TXGF 0x00200000 |
Definition at line 165 of file apm32f4xx_eth_driver.h.
◆ ETH_TXINT_TXGFMCOL
#define ETH_TXINT_TXGFMCOL 0x00008000 |
Definition at line 166 of file apm32f4xx_eth_driver.h.
◆ ETH_TXINT_TXGFSCOL
#define ETH_TXINT_TXGFSCOL 0x00004000 |
Definition at line 167 of file apm32f4xx_eth_driver.h.
Function Documentation
◆ apm32f4xxEthCalcCrc()
uint32_t apm32f4xxEthCalcCrc | ( | const void * | data, |
size_t | length | ||
) |
CRC calculation.
- Parameters
-
[in] data Pointer to the data over which to calculate the CRC [in] length Number of bytes to process
- Returns
- Resulting CRC value
Definition at line 906 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthDisableIrq()
void apm32f4xxEthDisableIrq | ( | NetInterface * | interface | ) |
Disable interrupts.
- Parameters
-
[in] interface Underlying network interface
Definition at line 419 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthEnableIrq()
void apm32f4xxEthEnableIrq | ( | NetInterface * | interface | ) |
Enable interrupts.
- Parameters
-
[in] interface Underlying network interface
Definition at line 391 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthEventHandler()
void apm32f4xxEthEventHandler | ( | NetInterface * | interface | ) |
APM32F4 Ethernet MAC event handler.
- Parameters
-
[in] interface Underlying network interface
Definition at line 499 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthInit()
error_t apm32f4xxEthInit | ( | NetInterface * | interface | ) |
APM32F4 Ethernet MAC initialization.
- Parameters
-
[in] interface Underlying network interface
- Returns
- Error code
Definition at line 117 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthInitDmaDesc()
void apm32f4xxEthInitDmaDesc | ( | NetInterface * | interface | ) |
Initialize DMA descriptor lists.
- Parameters
-
[in] interface Underlying network interface
Definition at line 297 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthInitGpio()
void apm32f4xxEthInitGpio | ( | NetInterface * | interface | ) |
GPIO configuration.
- Parameters
-
[in] interface Underlying network interface
Definition at line 242 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthReadPhyReg()
uint16_t apm32f4xxEthReadPhyReg | ( | uint8_t | opcode, |
uint8_t | phyAddr, | ||
uint8_t | regAddr | ||
) |
Read PHY register.
- Parameters
-
[in] opcode Access type (2 bits) [in] phyAddr PHY address (5 bits) [in] regAddr Register address (5 bits)
- Returns
- Register value
Definition at line 860 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthReceivePacket()
error_t apm32f4xxEthReceivePacket | ( | NetInterface * | interface | ) |
Receive a packet.
- Parameters
-
[in] interface Underlying network interface
- Returns
- Error code
Definition at line 583 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthSendPacket()
error_t apm32f4xxEthSendPacket | ( | NetInterface * | interface, |
const NetBuffer * | buffer, | ||
size_t | offset, | ||
NetTxAncillary * | ancillary | ||
) |
Send a packet.
- Parameters
-
[in] interface Underlying network interface [in] buffer Multi-part buffer containing the data to send [in] offset Offset to the first data byte [in] ancillary Additional options passed to the stack along with the packet
- Returns
- Error code
Definition at line 524 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthTick()
void apm32f4xxEthTick | ( | NetInterface * | interface | ) |
APM32F4 Ethernet MAC timer handler.
This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state
- Parameters
-
[in] interface Underlying network interface
Definition at line 366 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthUpdateMacAddrFilter()
error_t apm32f4xxEthUpdateMacAddrFilter | ( | NetInterface * | interface | ) |
Configure MAC address filtering.
- Parameters
-
[in] interface Underlying network interface
- Returns
- Error code
Definition at line 653 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthUpdateMacConfig()
error_t apm32f4xxEthUpdateMacConfig | ( | NetInterface * | interface | ) |
Adjust MAC configuration parameters for proper operation.
- Parameters
-
[in] interface Underlying network interface
- Returns
- Error code
Definition at line 775 of file apm32f4xx_eth_driver.c.
◆ apm32f4xxEthWritePhyReg()
void apm32f4xxEthWritePhyReg | ( | uint8_t | opcode, |
uint8_t | phyAddr, | ||
uint8_t | regAddr, | ||
uint16_t | data | ||
) |
Write PHY register.
- Parameters
-
[in] opcode Access type (2 bits) [in] phyAddr PHY address (5 bits) [in] regAddr Register address (5 bits) [in] data Register value
Definition at line 818 of file apm32f4xx_eth_driver.c.
Variable Documentation
◆ apm32f4xxEthDriver
|
extern |
APM32F4 Ethernet MAC driver.
Definition at line 90 of file apm32f4xx_eth_driver.c.