dm9162_driver.c
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1 /**
2  * @file dm9162_driver.c
3  * @brief DM9162 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.4
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief DM9162 Ethernet PHY driver
42  **/
43 
45 {
46  dm9162Init,
47  dm9162Tick,
51 };
52 
53 
54 /**
55  * @brief DM9162 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  //Debug message
63  TRACE_INFO("Initializing DM9162...\r\n");
64 
65  //Undefined PHY address?
66  if(interface->phyAddr >= 32)
67  {
68  //Use the default address
69  interface->phyAddr = DM9162_PHY_ADDR;
70  }
71 
72  //Initialize serial management interface
73  if(interface->smiDriver != NULL)
74  {
75  interface->smiDriver->init();
76  }
77 
78  //Initialize external interrupt line driver
79  if(interface->extIntDriver != NULL)
80  {
81  interface->extIntDriver->init();
82  }
83 
84  //Reset PHY transceiver
86 
87  //Wait for the reset to complete
89  {
90  }
91 
92  //Dump PHY registers for debugging purpose
93  dm9162DumpPhyReg(interface);
94 
95  //The PHY will generate interrupts when link status changes are detected
98 
99  //Perform custom configuration
100  dm9162InitHook(interface);
101 
102  //Force the TCP/IP stack to poll the link state at startup
103  interface->phyEvent = TRUE;
104  //Notify the TCP/IP stack of the event
106 
107  //Successful initialization
108  return NO_ERROR;
109 }
110 
111 
112 /**
113  * @brief DM9162 custom configuration
114  * @param[in] interface Underlying network interface
115  **/
116 
117 __weak_func void dm9162InitHook(NetInterface *interface)
118 {
119 }
120 
121 
122 /**
123  * @brief DM9162 timer handler
124  * @param[in] interface Underlying network interface
125  **/
126 
127 void dm9162Tick(NetInterface *interface)
128 {
129  uint16_t value;
130  bool_t linkState;
131 
132  //No external interrupt line driver?
133  if(interface->extIntDriver == NULL)
134  {
135  //Read basic status register
136  value = dm9162ReadPhyReg(interface, DM9162_BMSR);
137  //Retrieve current link state
138  linkState = (value & DM9162_BMSR_LINK_STATUS) ? TRUE : FALSE;
139 
140  //Link up event?
141  if(linkState && !interface->linkState)
142  {
143  //Set event flag
144  interface->phyEvent = TRUE;
145  //Notify the TCP/IP stack of the event
147  }
148  //Link down event?
149  else if(!linkState && interface->linkState)
150  {
151  //Set event flag
152  interface->phyEvent = TRUE;
153  //Notify the TCP/IP stack of the event
155  }
156  }
157 }
158 
159 
160 /**
161  * @brief Enable interrupts
162  * @param[in] interface Underlying network interface
163  **/
164 
166 {
167  //Enable PHY transceiver interrupts
168  if(interface->extIntDriver != NULL)
169  {
170  interface->extIntDriver->enableIrq();
171  }
172 }
173 
174 
175 /**
176  * @brief Disable interrupts
177  * @param[in] interface Underlying network interface
178  **/
179 
181 {
182  //Disable PHY transceiver interrupts
183  if(interface->extIntDriver != NULL)
184  {
185  interface->extIntDriver->disableIrq();
186  }
187 }
188 
189 
190 /**
191  * @brief DM9162 event handler
192  * @param[in] interface Underlying network interface
193  **/
194 
196 {
197  uint16_t value;
198  bool_t end;
199 
200  //Read status register to acknowledge the interrupt
201  value = dm9162ReadPhyReg(interface, DM9162_MDINTR);
202 
203  //Link status change?
204  if((value & DM9162_MDINTR_LINK_CHANGE) != 0)
205  {
206  //Any link failure condition is latched in the BMSR register. Reading
207  //the register twice will always return the actual link status
208  value = dm9162ReadPhyReg(interface, DM9162_BMSR);
209  value = dm9162ReadPhyReg(interface, DM9162_BMSR);
210 
211  //Link is up?
212  if((value & DM9162_BMSR_LINK_STATUS) != 0)
213  {
214  //Wait for the auto-negotiation to complete
215  do
216  {
217  //Read DSCSR register
218  value = dm9162ReadPhyReg(interface, DM9162_DSCSR);
219 
220  //Check current state
221  switch(value & DM9162_DSCSR_ANMB)
222  {
223  //Auto-negotiation is still in progress?
228  end = FALSE;
229  break;
230  //Auto-negotiation is complete?
231  default:
232  end = TRUE;
233  break;
234  }
235 
236  //Check loop condition variable
237  } while(!end);
238 
239  //Read DSCSR register
240  value = dm9162ReadPhyReg(interface, DM9162_DSCSR);
241 
242  //Check current operation mode
243  if((value & DM9162_DSCSR_10HDX) != 0)
244  {
245  //10BASE-T half-duplex
246  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
247  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
248  }
249  else if((value & DM9162_DSCSR_10FDX) != 0)
250  {
251  //10BASE-T full-duplex
252  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
253  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
254  }
255  else if((value & DM9162_DSCSR_100HDX) != 0)
256  {
257  //100BASE-TX half-duplex
258  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
259  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
260  }
261  else if((value & DM9162_DSCSR_100FDX) != 0)
262  {
263  //100BASE-TX full-duplex
264  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
265  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
266  }
267  else
268  {
269  //Debug message
270  TRACE_WARNING("Invalid operation mode!\r\n");
271  }
272 
273  //Update link state
274  interface->linkState = TRUE;
275 
276  //Adjust MAC configuration parameters for proper operation
277  interface->nicDriver->updateMacConfig(interface);
278  }
279  else
280  {
281  //Update link state
282  interface->linkState = FALSE;
283  }
284 
285  //Process link state change event
286  nicNotifyLinkChange(interface);
287  }
288 }
289 
290 
291 /**
292  * @brief Write PHY register
293  * @param[in] interface Underlying network interface
294  * @param[in] address PHY register address
295  * @param[in] data Register value
296  **/
297 
298 void dm9162WritePhyReg(NetInterface *interface, uint8_t address,
299  uint16_t data)
300 {
301  //Write the specified PHY register
302  if(interface->smiDriver != NULL)
303  {
304  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
305  interface->phyAddr, address, data);
306  }
307  else
308  {
309  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
310  interface->phyAddr, address, data);
311  }
312 }
313 
314 
315 /**
316  * @brief Read PHY register
317  * @param[in] interface Underlying network interface
318  * @param[in] address PHY register address
319  * @return Register value
320  **/
321 
322 uint16_t dm9162ReadPhyReg(NetInterface *interface, uint8_t address)
323 {
324  uint16_t data;
325 
326  //Read the specified PHY register
327  if(interface->smiDriver != NULL)
328  {
329  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
330  interface->phyAddr, address);
331  }
332  else
333  {
334  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
335  interface->phyAddr, address);
336  }
337 
338  //Return the value of the PHY register
339  return data;
340 }
341 
342 
343 /**
344  * @brief Dump PHY registers for debugging purpose
345  * @param[in] interface Underlying network interface
346  **/
347 
349 {
350  uint8_t i;
351 
352  //Loop through PHY registers
353  for(i = 0; i < 32; i++)
354  {
355  //Display current PHY register
356  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
357  dm9162ReadPhyReg(interface, i));
358  }
359 
360  //Terminate with a line feed
361  TRACE_DEBUG("\r\n");
362 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:559
#define DM9162_BMSR
Definition: dm9162_driver.h:46
uint16_t dm9162ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
int bool_t
Definition: compiler_port.h:53
#define netEvent
Definition: net_legacy.h:196
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
void dm9162EventHandler(NetInterface *interface)
DM9162 event handler.
__weak_func void dm9162InitHook(NetInterface *interface)
DM9162 custom configuration.
#define DM9162_BMSR_LINK_STATUS
Definition: dm9162_driver.h:84
#define TRUE
Definition: os_port.h:50
Ethernet PHY driver.
Definition: nic.h:311
void dm9162DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
uint8_t data[]
Definition: ethernet.h:222
#define DM9162_DSCSR_10FDX
error_t dm9162Init(NetInterface *interface)
DM9162 PHY transceiver initialization.
Definition: dm9162_driver.c:60
void dm9162DisableIrq(NetInterface *interface)
Disable interrupts.
#define DM9162_DSCSR_ANMB_LINK_READY
#define DM9162_PHY_ADDR
Definition: dm9162_driver.h:39
#define DM9162_DSCSR_ANMB
#define SMI_OPCODE_WRITE
Definition: nic.h:66
#define DM9162_DSCSR_ANMB_ACK_MATCH
#define FALSE
Definition: os_port.h:46
error_t
Error codes.
Definition: error.h:43
#define DM9162_DSCSR_ANMB_CONSIST_MATCH
#define DM9162_MDINTR_LINK_CHANGE
#define DM9162_MDINTR
Definition: dm9162_driver.h:57
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
#define DM9162_DSCSR_100HDX
#define SMI_OPCODE_READ
Definition: nic.h:67
DM9162 Ethernet PHY driver.
#define DM9162_BMCR_RESET
Definition: dm9162_driver.h:64
void dm9162Tick(NetInterface *interface)
DM9162 timer handler.
#define DM9162_DSCSR_ANMB_ABILITY_MATCH
#define TRACE_INFO(...)
Definition: debug.h:95
#define DM9162_BMCR
Definition: dm9162_driver.h:45
void dm9162WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define TRACE_WARNING(...)
Definition: debug.h:85
#define TRACE_DEBUG(...)
Definition: debug.h:107
#define DM9162_MDINTR_INTR_MASK
#define DM9162_DSCSR_100FDX
Ipv6Addr address[]
Definition: ipv6.h:325
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
#define DM9162_DSCSR
Definition: dm9162_driver.h:53
uint8_t value[]
Definition: tcp.h:369
#define DM9162_MDINTR_LINK_MASK
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define DM9162_DSCSR_10HDX
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
TCP/IP stack core.
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.
void dm9162EnableIrq(NetInterface *interface)
Enable interrupts.
const PhyDriver dm9162PhyDriver
DM9162 Ethernet PHY driver.
Definition: dm9162_driver.c:44