32 #define TRACE_LEVEL CRYPTO_TRACE_LEVEL
35 #include "esp_crypto_lock.h"
36 #include "soc/system_reg.h"
37 #include "soc/hwcrypto_reg.h"
38 #include "esp_private/periph_ctrl.h"
47 #if (ESP32_C3_CRYPTO_PKC_SUPPORT == ENABLED)
50 #define SECP224R1_PRIME_M 0xFFFFFFFF
51 #define SECP256K1_PRIME_M 0xD2253531
52 #define SECP256R1_PRIME_M 0x00000001
53 #define SECP384R1_PRIME_M 0x00000001
54 #define SECP521R1_PRIME_M 0x00000001
55 #define BRAINPOOLP256R1_PRIME_M 0xCEFD89B9
56 #define BRAINPOOLP384R1_PRIME_M 0xEA9EC825
57 #define BRAINPOOLP512R1_PRIME_M 0x7D89EFC5
58 #define FRP256V1_PRIME_M 0x164E1155
59 #define SM2_PRIME_M 0x00000001
60 #define CURVE25519_PRIME_M 0x286BCA1B
61 #define CURVE448_PRIME_M 0x00000001
64 #define SECP224R1_ORDER_M 0x6A1FC2EB
65 #define SECP256K1_ORDER_M 0x5588B13F
66 #define SECP256R1_ORDER_M 0xEE00BC4F
67 #define SECP384R1_ORDER_M 0xE88FDC45
68 #define SECP521R1_ORDER_M 0x79A995C7
69 #define BRAINPOOLP256R1_ORDER_M 0xCBB40EE9
70 #define BRAINPOOLP384R1_ORDER_M 0x5CB5BB93
71 #define BRAINPOOLP512R1_ORDER_M 0x0F1B7027
72 #define FRP256V1_ORDER_M 0x4FFF51DF
73 #define SM2_ORDER_M 0x72350975
76 static const uint32_t SECP224R1_PRIME_R2[7] =
78 0x00000001, 0x00000000, 0x00000000, 0xFFFFFFFE, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000
82 static const uint32_t SECP224R1_ORDER_R2[7] =
84 0x3AD01289, 0x6BDAAE6C, 0x97A54552, 0x6AD09D91, 0xB1E97961, 0x1822BC47, 0xD4BAA4CF
88 static const uint32_t SECP256K1_PRIME_R2[8] =
90 0x000E90A1, 0x000007A2, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000
94 static const uint32_t SECP256K1_ORDER_R2[8] =
96 0x67D7D140, 0x896CF214, 0x0E7CF878, 0x741496C2, 0x5BCD07C6, 0xE697F5E4, 0x81C69BC5, 0x9D671CD5
100 static const uint32_t SECP256R1_PRIME_R2[8] =
102 0x00000003, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFB, 0xFFFFFFFE, 0xFFFFFFFF, 0xFFFFFFFD, 0x00000004
106 static const uint32_t SECP256R1_ORDER_R2[8] =
108 0xBE79EEA2, 0x83244C95, 0x49BD6FA6, 0x4699799C, 0x2B6BEC59, 0x2845B239, 0xF3D95620, 0x66E12D94
112 static const uint32_t SECP384R1_PRIME_R2[12] =
114 0x00000001, 0xFFFFFFFE, 0x00000000, 0x00000002, 0x00000000, 0xFFFFFFFE, 0x00000000, 0x00000002,
115 0x00000001, 0x00000000, 0x00000000, 0x00000000
119 static const uint32_t SECP384R1_ORDER_R2[12] =
121 0x19B409A9, 0x2D319B24, 0xDF1AA419, 0xFF3D81E5, 0xFCB82947, 0xBC3E483A, 0x4AAB1CC5, 0xD40D4917,
122 0x28266895, 0x3FB05B7A, 0x2B39BF21, 0x0C84EE01
126 static const uint32_t SECP521R1_PRIME_R2[17] =
128 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
129 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
134 static const uint32_t SECP521R1_ORDER_R2[17] =
136 0x61C64CA7, 0x1163115A, 0x4374A642, 0x18354A56, 0x0791D9DC, 0x5D4DD6D3, 0xD3402705, 0x4FB35B72,
137 0xB7756E3A, 0xCFF3D142, 0xA8E567BC, 0x5BCC6D61, 0x492D0D45, 0x2D8E03D1, 0x8C44383D, 0x5B5A3AFE,
142 static const uint32_t BRAINPOOLP256R1_PRIME_R2[8] =
144 0xA6465B6C, 0x8CFEDF7B, 0x614D4F4D, 0x5CCE4C26, 0x6B1AC807, 0xA1ECDACD, 0xE5957FA8, 0x4717AA21
148 static const uint32_t BRAINPOOLP256R1_ORDER_R2[8] =
150 0x3312FCA6, 0xE1D8D8DE, 0x1134E4A0, 0xF35D176A, 0x6C815CB0, 0x9B7F25E7, 0xC3236762, 0x0B25F1B9
154 static const uint32_t BRAINPOOLP384R1_PRIME_R2[12] =
156 0x40B64BDE, 0x087CEFFF, 0x3D7FD965, 0x53528334, 0xC9940899, 0x8E28F99C, 0x9918D5AF, 0x62140191,
157 0xA57E052C, 0xD5C6EF3B, 0x178DF842, 0x36BF6883
161 static const uint32_t BRAINPOOLP384R1_ORDER_R2[12] =
163 0xDE771C8E, 0xAC4ED3A2, 0x2F2B6B6E, 0x37264E20, 0x9802688A, 0x2A927E3B, 0x52D748FF, 0x574A74CB,
164 0x65165FDB, 0x8F886DC9, 0x614E97C2, 0x0CE8941A
168 static const uint32_t BRAINPOOLP512R1_PRIME_R2[16] =
170 0x6158F205, 0x49AD144A, 0x27157905, 0x793FB130, 0x905AFFD3, 0x53B7F9BC, 0x83514A25, 0xE0C19A77,
171 0xD5898057, 0x19486FD8, 0xD42BFF83, 0xA16DAA5F, 0x2056EECC, 0x202E1940, 0xA9FF6450, 0x3C4C9D05
175 static const uint32_t BRAINPOOLP512R1_ORDER_R2[16] =
177 0xCDA81671, 0xD2A3681E, 0x95283DDD, 0x0886B758, 0x33B7627F, 0x3EC64BD0, 0x2F0207E8, 0xA6F230C7,
178 0x3B790DE3, 0xD7F9CC26, 0x2F16BBDF, 0x723C37A2, 0x194B2E56, 0x95DF1B4C, 0x718407B0, 0xA794586A
182 static const uint32_t FRP256V1_PRIME_R2[8] =
184 0xC99F1513, 0xB0C24E77, 0x0C960F92, 0x846F8083, 0xCE137EEE, 0x62B7012F, 0x88EB98AC, 0xB02C8F9F
188 static const uint32_t FRP256V1_ORDER_R2[8] =
190 0xF849D44D, 0x1416B735, 0xBCC2D0E1, 0xB551ADB5, 0xC380D52D, 0xCFB26475, 0x15C243BB, 0x0DF1A20D
194 static const uint32_t SM2_PRIME_R2[8] =
196 0x00000003, 0x00000002, 0xFFFFFFFF, 0x00000002, 0x00000001, 0x00000001, 0x00000002, 0x00000004
200 static const uint32_t SM2_ORDER_R2[8] =
202 0x7C114F20, 0x901192AF, 0xDE6FA2FA, 0x3464504A, 0x3AFFE0D4, 0x620FC84C, 0xA22B3D3B, 0x1EB5E412
213 periph_module_enable(PERIPH_RSA_MODULE);
216 REG_CLR_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD);
221 while(REG_READ(RSA_QUERY_CLEAN_REG) == 0)
227 #if (MPI_SUPPORT == ENABLED)
251 if(aLen <= 48 && bLen <= 48)
259 esp_crypto_mpi_lock_acquire();
262 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
264 REG_WRITE(RSA_LENGTH_REG, (2 *
n) - 1);
267 for(i = 0; i <
n; i++)
271 REG_WRITE(RSA_MEM_X_BLOCK_BASE + i * 4,
a->data[i]);
275 REG_WRITE(RSA_MEM_X_BLOCK_BASE + i * 4, 0);
281 for(i = 0; i <
n; i++)
283 REG_WRITE(RSA_MEM_Z_BLOCK_BASE + i * 4, 0);
288 for(i = 0; i <
n; i++)
292 REG_WRITE(RSA_MEM_Z_BLOCK_BASE + (
n + i) * 4,
b->data[i]);
296 REG_WRITE(RSA_MEM_Z_BLOCK_BASE + (
n + i) * 4, 0);
301 REG_WRITE(RSA_MULT_START_REG, 1);
304 while(REG_READ(RSA_QUERY_INTERRUPT_REG) == 0)
309 r->sign = (
a->sign ==
b->sign) ? 1 : -1;
318 for(i = 0; i <
r->size; i++)
322 r->data[i] = REG_READ(RSA_MEM_Z_BLOCK_BASE + i * 4);
332 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
335 esp_crypto_mpi_lock_release();
378 if(modLen > 0 && modLen <= 3072 && expLen > 0 && expLen <= 3072)
381 n =
MAX(modLen, expLen);
407 esp_crypto_mpi_lock_acquire();
410 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
412 REG_WRITE(RSA_LENGTH_REG,
n - 1);
415 for(i = 0; i <
n; i++)
419 REG_WRITE(RSA_MEM_X_BLOCK_BASE + i * 4,
t.data[i]);
423 REG_WRITE(RSA_MEM_X_BLOCK_BASE + i * 4, 0);
428 for(i = 0; i <
n; i++)
432 REG_WRITE(RSA_MEM_Y_BLOCK_BASE + i * 4, e->
data[i]);
436 REG_WRITE(RSA_MEM_Y_BLOCK_BASE + i * 4, 0);
441 for(i = 0; i <
n; i++)
445 REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4,
p->data[i]);
449 REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4, 0);
454 for(i = 0; i <
n; i++)
458 REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, r2.
data[i]);
462 REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, 0);
467 for(
m =
p->data[0], i = 0; i < 4; i++)
469 m =
m * (2U -
m *
p->data[0]);
476 REG_WRITE(RSA_M_DASH_REG,
m);
479 REG_WRITE(RSA_SEARCH_ENABLE_REG, 1);
480 REG_WRITE(RSA_SEARCH_POS_REG, expLen - 1);
483 REG_WRITE(RSA_MODEXP_START_REG, 1);
486 while(REG_READ(RSA_QUERY_INTERRUPT_REG) == 0)
497 for(i = 0; i <
r->size; i++)
501 r->data[i] = REG_READ(RSA_MEM_Z_BLOCK_BASE + i * 4);
511 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
514 esp_crypto_mpi_lock_release();
532 #if (EC_SUPPORT == ENABLED)
549 esp_crypto_mpi_lock_acquire();
552 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
554 REG_WRITE(RSA_LENGTH_REG, (2 *
n) - 1);
557 for(i = 0; i <
n; i++)
559 REG_WRITE(RSA_MEM_X_BLOCK_BASE + i * 4,
a[i]);
564 for(i = 0; i <
n; i++)
566 REG_WRITE(RSA_MEM_Z_BLOCK_BASE + i * 4, 0);
571 for(i = 0; i <
n; i++)
573 REG_WRITE(RSA_MEM_Z_BLOCK_BASE + (
n + i) * 4,
b[i]);
577 REG_WRITE(RSA_MULT_START_REG, 1);
580 while(REG_READ(RSA_QUERY_INTERRUPT_REG) == 0)
588 for(i = 0; i <
n; i++)
590 rl[i] = REG_READ(RSA_MEM_Z_BLOCK_BASE + i * 4);
598 for(i = 0; i <
n; i++)
600 rh[i] = REG_READ(RSA_MEM_Z_BLOCK_BASE + (
n + i) * 4);
605 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
608 esp_crypto_mpi_lock_release();
643 n = (curve->fieldSize + 31) / 32;
646 if(
osStrcmp(curve->name,
"secp224r1") == 0)
648 r2 = SECP224R1_PRIME_R2;
651 else if(
osStrcmp(curve->name,
"secp256k1") == 0)
653 r2 = SECP256K1_PRIME_R2;
656 else if(
osStrcmp(curve->name,
"secp256r1") == 0)
658 r2 = SECP256R1_PRIME_R2;
661 else if(
osStrcmp(curve->name,
"secp384r1") == 0)
663 r2 = SECP384R1_PRIME_R2;
666 else if(
osStrcmp(curve->name,
"secp521r1") == 0)
668 r2 = SECP521R1_PRIME_R2;
671 else if(
osStrcmp(curve->name,
"brainpoolP256r1") == 0)
673 r2 = BRAINPOOLP256R1_PRIME_R2;
676 else if(
osStrcmp(curve->name,
"brainpoolP384r1") == 0)
678 r2 = BRAINPOOLP384R1_PRIME_R2;
681 else if(
osStrcmp(curve->name,
"brainpoolP512r1") == 0)
683 r2 = BRAINPOOLP512R1_PRIME_R2;
686 else if(
osStrcmp(curve->name,
"FRP256v1") == 0)
688 r2 = FRP256V1_PRIME_R2;
691 else if(
osStrcmp(curve->name,
"curveSM2") == 0)
703 if(r2 != NULL &&
m != 0)
706 esp_crypto_mpi_lock_acquire();
709 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
711 REG_WRITE(RSA_LENGTH_REG,
n - 1);
714 for(i = 0; i <
n; i++)
716 REG_WRITE(RSA_MEM_X_BLOCK_BASE + i * 4,
a[i]);
720 for(i = 0; i <
n; i++)
722 REG_WRITE(RSA_MEM_Y_BLOCK_BASE + i * 4,
b[i]);
726 for(i = 0; i <
n; i++)
728 REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4, curve->p[i]);
732 for(i = 0; i <
n; i++)
734 REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, r2[i]);
738 REG_WRITE(RSA_M_DASH_REG,
m);
740 REG_WRITE(RSA_MOD_MULT_START_REG, 1);
743 while(REG_READ(RSA_QUERY_INTERRUPT_REG) == 0)
748 for(i = 0; i <
n; i++)
750 r[i] = REG_READ(RSA_MEM_Z_BLOCK_BASE + i * 4);
754 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
757 esp_crypto_mpi_lock_release();
765 curve->fieldMod(curve,
r,
u);
801 n = (curve->orderSize + 31) / 32;
804 if(
osStrcmp(curve->name,
"secp224r1") == 0)
806 r2 = SECP224R1_ORDER_R2;
809 else if(
osStrcmp(curve->name,
"secp256k1") == 0)
811 r2 = SECP256K1_ORDER_R2;
814 else if(
osStrcmp(curve->name,
"secp256r1") == 0)
816 r2 = SECP256R1_ORDER_R2;
819 else if(
osStrcmp(curve->name,
"secp384r1") == 0)
821 r2 = SECP384R1_ORDER_R2;
824 else if(
osStrcmp(curve->name,
"secp521r1") == 0)
826 r2 = SECP521R1_ORDER_R2;
829 else if(
osStrcmp(curve->name,
"brainpoolP256r1") == 0)
831 r2 = BRAINPOOLP256R1_ORDER_R2;
834 else if(
osStrcmp(curve->name,
"brainpoolP384r1") == 0)
836 r2 = BRAINPOOLP384R1_ORDER_R2;
839 else if(
osStrcmp(curve->name,
"brainpoolP512r1") == 0)
841 r2 = BRAINPOOLP512R1_ORDER_R2;
844 else if(
osStrcmp(curve->name,
"FRP256v1") == 0)
846 r2 = FRP256V1_ORDER_R2;
849 else if(
osStrcmp(curve->name,
"curveSM2") == 0)
861 if(r2 != NULL &&
m != 0)
864 esp_crypto_mpi_lock_acquire();
867 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
869 REG_WRITE(RSA_LENGTH_REG,
n - 1);
872 for(i = 0; i <
n; i++)
874 REG_WRITE(RSA_MEM_X_BLOCK_BASE + i * 4,
a[i]);
878 for(i = 0; i <
n; i++)
880 REG_WRITE(RSA_MEM_Y_BLOCK_BASE + i * 4,
b[i]);
884 for(i = 0; i <
n; i++)
886 REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4, curve->q[i]);
890 for(i = 0; i <
n; i++)
892 REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, r2[i]);
896 REG_WRITE(RSA_M_DASH_REG,
m);
898 REG_WRITE(RSA_MOD_MULT_START_REG, 1);
901 while(REG_READ(RSA_QUERY_INTERRUPT_REG) == 0)
906 for(i = 0; i <
n; i++)
908 r[i] = REG_READ(RSA_MEM_Z_BLOCK_BASE + i * 4);
912 REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
915 esp_crypto_mpi_lock_release();
923 curve->scalarMod(curve,
r,
u);