32 #define TRACE_LEVEL CRYPTO_TRACE_LEVEL
35 #include "esp_crypto_lock.h"
36 #include "hal/sha_types.h"
37 #include "soc/hwcrypto_reg.h"
38 #include "esp_private/periph_ctrl.h"
46 #if (ESP32_C6_CRYPTO_HASH_SUPPORT == ENABLED)
49 static const uint8_t padding[64] =
51 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
52 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
53 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
54 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
85 esp_crypto_sha_aes_lock_acquire();
87 periph_module_enable(PERIPH_SHA_MODULE);
90 REG_WRITE(SHA_MODE_REG, algo);
93 REG_WRITE(SHA_H_MEM,
h[0]);
94 REG_WRITE(SHA_H_MEM + 4,
h[1]);
95 REG_WRITE(SHA_H_MEM + 8,
h[2]);
96 REG_WRITE(SHA_H_MEM + 12,
h[3]);
97 REG_WRITE(SHA_H_MEM + 16,
h[4]);
102 REG_WRITE(SHA_H_MEM + 20,
h[5]);
103 REG_WRITE(SHA_H_MEM + 24,
h[6]);
104 REG_WRITE(SHA_H_MEM + 28,
h[7]);
108 while(
length >= blockSize)
112 REG_WRITE(SHA_M_MEM, temp);
114 REG_WRITE(SHA_M_MEM + 4, temp);
116 REG_WRITE(SHA_M_MEM + 8, temp);
118 REG_WRITE(SHA_M_MEM + 12, temp);
120 REG_WRITE(SHA_M_MEM + 16, temp);
122 REG_WRITE(SHA_M_MEM + 20, temp);
124 REG_WRITE(SHA_M_MEM + 24, temp);
126 REG_WRITE(SHA_M_MEM + 28, temp);
128 REG_WRITE(SHA_M_MEM + 32, temp);
130 REG_WRITE(SHA_M_MEM + 36, temp);
132 REG_WRITE(SHA_M_MEM + 40, temp);
134 REG_WRITE(SHA_M_MEM + 44, temp);
136 REG_WRITE(SHA_M_MEM + 48, temp);
138 REG_WRITE(SHA_M_MEM + 52, temp);
140 REG_WRITE(SHA_M_MEM + 56, temp);
142 REG_WRITE(SHA_M_MEM + 60, temp);
145 REG_WRITE(SHA_CONTINUE_REG, 1);
148 while(REG_READ(SHA_BUSY_REG) != 0)
158 h[0] = REG_READ(SHA_H_MEM);
159 h[1] = REG_READ(SHA_H_MEM + 4);
160 h[2] = REG_READ(SHA_H_MEM + 8);
161 h[3] = REG_READ(SHA_H_MEM + 12);
162 h[4] = REG_READ(SHA_H_MEM + 16);
167 h[5] = REG_READ(SHA_H_MEM + 20);
168 h[6] = REG_READ(SHA_H_MEM + 24);
169 h[7] = REG_READ(SHA_H_MEM + 28);
173 periph_module_disable(PERIPH_SHA_MODULE);
175 esp_crypto_sha_aes_lock_release();
179 #if (SHA1_SUPPORT == ENABLED)
189 context->
h[0] =
BETOH32(0x67452301);
190 context->
h[1] =
BETOH32(0xEFCDAB89);
191 context->
h[2] =
BETOH32(0x98BADCFE);
192 context->
h[3] =
BETOH32(0x10325476);
193 context->
h[4] =
BETOH32(0xC3D2E1F0);
249 if(context->
size == 64)
278 if(context->
size < 56)
280 paddingSize = 56 - context->
size;
284 paddingSize = 64 + 56 - context->
size;
291 context->
w[14] =
htobe32((uint32_t) (totalSize >> 32));
292 context->
w[15] =
htobe32((uint32_t) totalSize);
318 #if (SHA224_SUPPORT == ENABLED)
328 context->
h[0] =
BETOH32(0xC1059ED8);
329 context->
h[1] =
BETOH32(0x367CD507);
330 context->
h[2] =
BETOH32(0x3070DD17);
331 context->
h[3] =
BETOH32(0xF70E5939);
332 context->
h[4] =
BETOH32(0xFFC00B31);
333 context->
h[5] =
BETOH32(0x68581511);
334 context->
h[6] =
BETOH32(0x64F98FA7);
335 context->
h[7] =
BETOH32(0xBEFA4FA4);
344 #if (SHA256_SUPPORT == ENABLED)
354 context->
h[0] =
BETOH32(0x6A09E667);
355 context->
h[1] =
BETOH32(0xBB67AE85);
356 context->
h[2] =
BETOH32(0x3C6EF372);
357 context->
h[3] =
BETOH32(0xA54FF53A);
358 context->
h[4] =
BETOH32(0x510E527F);
359 context->
h[5] =
BETOH32(0x9B05688C);
360 context->
h[6] =
BETOH32(0x1F83D9AB);
361 context->
h[7] =
BETOH32(0x5BE0CD19);
417 if(context->
size == 64)
446 if(context->
size < 56)
448 paddingSize = 56 - context->
size;
452 paddingSize = 64 + 56 - context->
size;
459 context->
w[14] =
htobe32((uint32_t) (totalSize >> 32));
460 context->
w[15] =
htobe32((uint32_t) totalSize);