f28m35x_eth_driver.h
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1 /**
2  * @file f28m35x_eth_driver.h
3  * @brief F28M35x Ethernet MAC controller
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 #ifndef _F28M35X_ETH_DRIVER_H
32 #define _F28M35X_ETH_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Interrupt priority grouping
38 #ifndef F28M35X_ETH_IRQ_PRIORITY_GROUPING
39  #define F28M35X_ETH_IRQ_PRIORITY_GROUPING 3
40 #elif (F28M35X_ETH_IRQ_PRIORITY_GROUPING < 0)
41  #error F28M35X_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
42 #endif
43 
44 //Ethernet interrupt priority
45 #ifndef F28M35X_ETH_IRQ_PRIORITY
46  #define F28M35X_ETH_IRQ_PRIORITY 192
47 #elif (F28M35X_ETH_IRQ_PRIORITY < 0)
48  #error F28M35X_ETH_IRQ_PRIORITY parameter is not valid
49 #endif
50 
51 //F28M35x Ethernet MAC registers
52 #define MAC_RIS_R HWREG(ETH_BASE + MAC_O_RIS)
53 #define MAC_IACK_R HWREG(ETH_BASE + MAC_O_IACK)
54 #define MAC_IM_R HWREG(ETH_BASE + MAC_O_IM)
55 #define MAC_RCTL_R HWREG(ETH_BASE + MAC_O_RCTL)
56 #define MAC_TCTL_R HWREG(ETH_BASE + MAC_O_TCTL)
57 #define MAC_DATA_R HWREG(ETH_BASE + MAC_O_DATA)
58 #define MAC_IA0_R HWREG(ETH_BASE + MAC_O_IA0)
59 #define MAC_IA1_R HWREG(ETH_BASE + MAC_O_IA1)
60 #define MAC_THR_R HWREG(ETH_BASE + MAC_O_THR)
61 #define MAC_MCTL_R HWREG(ETH_BASE + MAC_O_MCTL)
62 #define MAC_MDV_R HWREG(ETH_BASE + MAC_O_MDV)
63 #define MAC_MAR_R HWREG(ETH_BASE + 0x28)
64 #define MAC_MTXD_R HWREG(ETH_BASE + MAC_O_MTXD)
65 #define MAC_MRXD_R HWREG(ETH_BASE + MAC_O_MRXD)
66 #define MAC_NP_R HWREG(ETH_BASE + MAC_O_NP)
67 #define MAC_TR_R HWREG(ETH_BASE + MAC_O_TR)
68 #define MAC_TS_R HWREG(ETH_BASE + MAC_O_TS)
69 
70 //C++ guard
71 #ifdef __cplusplus
72 extern "C" {
73 #endif
74 
75 //F28M35x Ethernet MAC driver
76 extern const NicDriver f28m35xEthDriver;
77 
78 //F28M35x Ethernet MAC related functions
80 void f28m35xEthInitGpio(NetInterface *interface);
81 
82 void f28m35xEthTick(NetInterface *interface);
83 
84 void f28m35xEthEnableIrq(NetInterface *interface);
85 void f28m35xEthDisableIrq(NetInterface *interface);
86 void f28m35xEthIrqHandler(void);
87 void f28m35xEthEventHandler(NetInterface *interface);
88 
90  const NetBuffer *buffer, size_t offset);
91 
93 
96 
97 void f28m35xEthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
98  uint8_t regAddr, uint16_t data);
99 
100 uint16_t f28m35xEthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
101  uint8_t regAddr);
102 
103 //C++ guard
104 #ifdef __cplusplus
105 }
106 #endif
107 
108 #endif
error_t f28m35xEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
uint8_t opcode
Definition: dns_common.h:172
error_t f28m35xEthInit(NetInterface *interface)
F28M35x Ethernet MAC controller initialization.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
void f28m35xEthDisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t f28m35xEthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void f28m35xEthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
void f28m35xEthInitGpio(NetInterface *interface)
error_t
Error codes.
Definition: error.h:42
#define NetInterface
Definition: net.h:36
void f28m35xEthTick(NetInterface *interface)
F28M35x Ethernet MAC timer handler.
void f28m35xEthEventHandler(NetInterface *interface)
F28M35x Ethernet MAC event handler.
const NicDriver f28m35xEthDriver
F28M35x Ethernet MAC driver.
error_t f28m35xEthReceivePacket(NetInterface *interface)
Receive a packet.
void f28m35xEthIrqHandler(void)
F28M35x Ethernet MAC interrupt service routine.
error_t f28m35xEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
error_t f28m35xEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
uint16_t regAddr
Network interface controller abstraction layer.
void f28m35xEthEnableIrq(NetInterface *interface)
Enable interrupts.
uint8_t data[]
Definition: dtls_misc.h:176
NIC driver.
Definition: nic.h:179