f28m35x_eth_driver.h
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1 /**
2  * @file f28m35x_eth_driver.h
3  * @brief F28M35x Ethernet MAC controller
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _F28M35X_ETH_DRIVER_H
30 #define _F28M35X_ETH_DRIVER_H
31 
32 //Dependencies
33 #include "core/nic.h"
34 
35 //Interrupt priority grouping
36 #ifndef F28M35X_ETH_IRQ_PRIORITY_GROUPING
37  #define F28M35X_ETH_IRQ_PRIORITY_GROUPING 3
38 #elif (F28M35X_ETH_IRQ_PRIORITY_GROUPING < 0)
39  #error F28M35X_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
40 #endif
41 
42 //Ethernet interrupt priority
43 #ifndef F28M35X_ETH_IRQ_PRIORITY
44  #define F28M35X_ETH_IRQ_PRIORITY 192
45 #elif (F28M35X_ETH_IRQ_PRIORITY < 0)
46  #error F28M35X_ETH_IRQ_PRIORITY parameter is not valid
47 #endif
48 
49 //F28M35x Ethernet MAC registers
50 #define MAC_RIS_R HWREG(ETH_BASE + MAC_O_RIS)
51 #define MAC_IACK_R HWREG(ETH_BASE + MAC_O_IACK)
52 #define MAC_IM_R HWREG(ETH_BASE + MAC_O_IM)
53 #define MAC_RCTL_R HWREG(ETH_BASE + MAC_O_RCTL)
54 #define MAC_TCTL_R HWREG(ETH_BASE + MAC_O_TCTL)
55 #define MAC_DATA_R HWREG(ETH_BASE + MAC_O_DATA)
56 #define MAC_IA0_R HWREG(ETH_BASE + MAC_O_IA0)
57 #define MAC_IA1_R HWREG(ETH_BASE + MAC_O_IA1)
58 #define MAC_THR_R HWREG(ETH_BASE + MAC_O_THR)
59 #define MAC_MCTL_R HWREG(ETH_BASE + MAC_O_MCTL)
60 #define MAC_MDV_R HWREG(ETH_BASE + MAC_O_MDV)
61 #define MAC_MAR_R HWREG(ETH_BASE + 0x28)
62 #define MAC_MTXD_R HWREG(ETH_BASE + MAC_O_MTXD)
63 #define MAC_MRXD_R HWREG(ETH_BASE + MAC_O_MRXD)
64 #define MAC_NP_R HWREG(ETH_BASE + MAC_O_NP)
65 #define MAC_TR_R HWREG(ETH_BASE + MAC_O_TR)
66 #define MAC_TS_R HWREG(ETH_BASE + MAC_O_TS)
67 
68 //C++ guard
69 #ifdef __cplusplus
70  extern "C" {
71 #endif
72 
73 //F28M35x Ethernet MAC driver
74 extern const NicDriver f28m35xEthDriver;
75 
76 //F28M35x Ethernet MAC related functions
78 void f28m35xEthInitGpio(NetInterface *interface);
79 
80 void f28m35xEthTick(NetInterface *interface);
81 
82 void f28m35xEthEnableIrq(NetInterface *interface);
83 void f28m35xEthDisableIrq(NetInterface *interface);
84 void f28m35xEthIrqHandler(void);
85 void f28m35xEthEventHandler(NetInterface *interface);
86 
88  const NetBuffer *buffer, size_t offset);
89 
91 
94 
95 void f28m35xEthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
96 uint16_t f28m35xEthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
97 
98 //C++ guard
99 #ifdef __cplusplus
100  }
101 #endif
102 
103 #endif
void f28m35xEthDisableIrq(NetInterface *interface)
Disable interrupts.
void f28m35xEthEnableIrq(NetInterface *interface)
Enable interrupts.
uint16_t f28m35xEthReadPhyReg(uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
error_t f28m35xEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
void f28m35xEthTick(NetInterface *interface)
F28M35x Ethernet MAC timer handler.
error_t f28m35xEthReceivePacket(NetInterface *interface)
Receive a packet.
void f28m35xEthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
error_t f28m35xEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
void f28m35xEthIrqHandler(void)
F28M35x Ethernet MAC interrupt service routine.
const NicDriver f28m35xEthDriver
F28M35x Ethernet MAC driver.
NIC driver.
Definition: nic.h:161
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:86
uint16_t regAddr
error_t
Error codes.
Definition: error.h:40
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
error_t f28m35xEthInit(NetInterface *interface)
F28M35x Ethernet MAC controller initialization.
void f28m35xEthEventHandler(NetInterface *interface)
F28M35x Ethernet MAC event handler.
void f28m35xEthInitGpio(NetInterface *interface)
error_t f28m35xEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
Network interface controller abstraction layer.