Cypress FM3 Ethernet MAC driver (ETHER0 instance) More...

#include "core/nic.h"

Data Structures
struct	Fm3Eth1TxDmaDesc
	Enhanced TX DMA descriptor. More...

struct	Fm3Eth1RxDmaDesc
	Enhanced RX DMA descriptor. More...

Macros
#define	FM3_ETH1_TX_BUFFER_COUNT 3

#define	FM3_ETH1_TX_BUFFER_SIZE 1536

#define	FM3_ETH1_RX_BUFFER_COUNT 6

#define	FM3_ETH1_RX_BUFFER_SIZE 1536

#define	FM3_ETH1_IRQ_PRIORITY_GROUPING 3

#define	FM3_ETH1_IRQ_GROUP_PRIORITY 12

#define	FM3_ETH1_IRQ_SUB_PRIORITY 0

#define	ETH_SR_GLPII 0x40000000

#define	ETH_SR_TTI 0x20000000

#define	ETH_SR_GPI 0x10000000

#define	ETH_SR_GMI 0x08000000

#define	ETH_SR_GLI 0x04000000

#define	ETH_SR_EB 0x03800000

#define	ETH_SR_TS 0x00700000

#define	ETH_SR_RS 0x000E0000

#define	ETH_SR_NIS 0x00010000

#define	ETH_SR_AIS 0x00008000

#define	ETH_SR_ERI 0x00004000

#define	ETH_SR_FBI 0x00002000

#define	ETH_SR_ETI 0x00000400

#define	ETH_SR_RWT 0x00000200

#define	ETH_SR_RPS 0x00000100

#define	ETH_SR_RU 0x00000080

#define	ETH_SR_RI 0x00000040

#define	ETH_SR_UNF 0x00000020

#define	ETH_SR_OVF 0x00000010

#define	ETH_SR_TJT 0x00000008

#define	ETH_SR_TU 0x00000004

#define	ETH_SR_TPS 0x00000002

#define	ETH_SR_TI 0x00000001

#define	ETH_TDES0_OWN 0x80000000

#define	ETH_TDES0_IC 0x40000000

#define	ETH_TDES0_LS 0x20000000

#define	ETH_TDES0_FS 0x10000000

#define	ETH_TDES0_DC 0x08000000

#define	ETH_TDES0_DP 0x04000000

#define	ETH_TDES0_TTSE 0x02000000

#define	ETH_TDES0_CIC 0x00C00000

#define	ETH_TDES0_TER 0x00200000

#define	ETH_TDES0_TCH 0x00100000

#define	ETH_TDES0_TTSS 0x00020000

#define	ETH_TDES0_IHE 0x00010000

#define	ETH_TDES0_ES 0x00008000

#define	ETH_TDES0_JT 0x00004000

#define	ETH_TDES0_FF 0x00002000

#define	ETH_TDES0_IPE 0x00001000

#define	ETH_TDES0_LCA 0x00000800

#define	ETH_TDES0_NC 0x00000400

#define	ETH_TDES0_LCO 0x00000200

#define	ETH_TDES0_EC 0x00000100

#define	ETH_TDES0_VF 0x00000080

#define	ETH_TDES0_CC 0x00000078

#define	ETH_TDES0_ED 0x00000004

#define	ETH_TDES0_UF 0x00000002

#define	ETH_TDES0_DB 0x00000001

#define	ETH_TDES1_TBS2 0x1FFF0000

#define	ETH_TDES1_TBS1 0x00001FFF

#define	ETH_TDES2_B1AP 0xFFFFFFFF

#define	ETH_TDES3_B2AP 0xFFFFFFFF

#define	ETH_TDES6_TTSL 0xFFFFFFFF

#define	ETH_TDES7_TTSH 0xFFFFFFFF

#define	ETH_RDES0_OWN 0x80000000

#define	ETH_RDES0_AFM 0x40000000

#define	ETH_RDES0_FL 0x3FFF0000

#define	ETH_RDES0_ES 0x00008000

#define	ETH_RDES0_DE 0x00004000

#define	ETH_RDES0_SAF 0x00002000

#define	ETH_RDES0_LE 0x00001000

#define	ETH_RDES0_OE 0x00000800

#define	ETH_RDES0_VLAN 0x00000400

#define	ETH_RDES0_FS 0x00000200

#define	ETH_RDES0_LS 0x00000100

#define	ETH_RDES0_TS 0x00000080

#define	ETH_RDES0_LCO 0x00000040

#define	ETH_RDES0_FT 0x00000020

#define	ETH_RDES0_RWT 0x00000010

#define	ETH_RDES0_RE 0x00000008

#define	ETH_RDES0_DBE 0x00000004

#define	ETH_RDES0_CE 0x00000002

#define	ETH_RDES0_ESA 0x00000001

#define	ETH_RDES1_DIC 0x80000000

#define	ETH_RDES1_RBS2 0x1FFF0000

#define	ETH_RDES1_RER 0x00008000

#define	ETH_RDES1_RCH 0x00004000

#define	ETH_RDES1_RBS1 0x00001FFF

#define	ETH_RDES2_B1AP 0xFFFFFFFF

#define	ETH_RDES3_B2AP 0xFFFFFFFF

#define	ETH_RDES4_TD 0x00004000

#define	ETH_RDES4_PV 0x00002000

#define	ETH_RDES4_PFT 0x00001000

#define	ETH_RDES4_MT 0x00000F00

#define	ETH_RDES4_IP6R 0x00000080

#define	ETH_RDES4_IP4R 0x00000040

#define	ETH_RDES4_IPCB 0x00000020

#define	ETH_RDES4_IPE 0x00000010

#define	ETH_RDES4_IPHE 0x00000008

#define	ETH_RDES4_IPT 0x00000007

#define	ETH_RDES6_RTSL 0xFFFFFFFF

#define	ETH_RDES7_RTSH 0xFFFFFFFF

Functions
error_t	fm3Eth1Init (NetInterface *interface)
	FM3 Ethernet MAC initialization. More...

void	fm3Eth1InitGpio (NetInterface *interface)
	GPIO configuration. More...

void	fm3Eth1InitDmaDesc (NetInterface *interface)
	Initialize DMA descriptor lists. More...

void	fm3Eth1Tick (NetInterface *interface)
	FM3 Ethernet MAC timer handler. More...

void	fm3Eth1EnableIrq (NetInterface *interface)
	Enable interrupts. More...

void	fm3Eth1DisableIrq (NetInterface *interface)
	Disable interrupts. More...

void	fm3Eth1EventHandler (NetInterface *interface)
	FM3 Ethernet MAC event handler. More...

error_t	fm3Eth1SendPacket (NetInterface interface, const NetBuffer buffer, size_t offset, NetTxAncillary *ancillary)
	Send a packet. More...

error_t	fm3Eth1ReceivePacket (NetInterface *interface)
	Receive a packet. More...

error_t	fm3Eth1UpdateMacAddrFilter (NetInterface *interface)
	Configure MAC address filtering. More...

error_t	fm3Eth1UpdateMacConfig (NetInterface *interface)
	Adjust MAC configuration parameters for proper operation. More...

void	fm3Eth1WritePhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
	Write PHY register. More...

uint16_t	fm3Eth1ReadPhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
	Read PHY register. More...

uint32_t	fm3Eth1CalcCrc (const void *data, size_t length)
	CRC calculation. More...

Variables
const NicDriver	fm3Eth1Driver
	FM3 Ethernet MAC driver (ETHER0 instance) More...

Detailed Description

Cypress FM3 Ethernet MAC driver (ETHER0 instance)

License

SPDX-License-Identifier: GPL-2.0-or-later

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author: Oryx Embedded SARL (www.oryx-embedded.com)

Version: 2.4.4

Definition in file fm3_eth1_driver.h.

Macro Definition Documentation

◆ ETH_RDES0_AFM

#define ETH_RDES0_AFM 0x40000000

Definition at line 146 of file fm3_eth1_driver.h.

◆ ETH_RDES0_CE

#define ETH_RDES0_CE 0x00000002

Definition at line 162 of file fm3_eth1_driver.h.

◆ ETH_RDES0_DBE

#define ETH_RDES0_DBE 0x00000004

Definition at line 161 of file fm3_eth1_driver.h.

◆ ETH_RDES0_DE

#define ETH_RDES0_DE 0x00004000

Definition at line 149 of file fm3_eth1_driver.h.

◆ ETH_RDES0_ES

#define ETH_RDES0_ES 0x00008000

Definition at line 148 of file fm3_eth1_driver.h.

◆ ETH_RDES0_ESA

#define ETH_RDES0_ESA 0x00000001

Definition at line 163 of file fm3_eth1_driver.h.

◆ ETH_RDES0_FL

#define ETH_RDES0_FL 0x3FFF0000

Definition at line 147 of file fm3_eth1_driver.h.

◆ ETH_RDES0_FS

#define ETH_RDES0_FS 0x00000200

Definition at line 154 of file fm3_eth1_driver.h.

◆ ETH_RDES0_FT

#define ETH_RDES0_FT 0x00000020

Definition at line 158 of file fm3_eth1_driver.h.

◆ ETH_RDES0_LCO

#define ETH_RDES0_LCO 0x00000040

Definition at line 157 of file fm3_eth1_driver.h.

◆ ETH_RDES0_LE

#define ETH_RDES0_LE 0x00001000

Definition at line 151 of file fm3_eth1_driver.h.

◆ ETH_RDES0_LS

#define ETH_RDES0_LS 0x00000100

Definition at line 155 of file fm3_eth1_driver.h.

◆ ETH_RDES0_OE

#define ETH_RDES0_OE 0x00000800

Definition at line 152 of file fm3_eth1_driver.h.

◆ ETH_RDES0_OWN

#define ETH_RDES0_OWN 0x80000000

Definition at line 145 of file fm3_eth1_driver.h.

◆ ETH_RDES0_RE

#define ETH_RDES0_RE 0x00000008

Definition at line 160 of file fm3_eth1_driver.h.

◆ ETH_RDES0_RWT

#define ETH_RDES0_RWT 0x00000010

Definition at line 159 of file fm3_eth1_driver.h.

◆ ETH_RDES0_SAF

#define ETH_RDES0_SAF 0x00002000

Definition at line 150 of file fm3_eth1_driver.h.

◆ ETH_RDES0_TS

#define ETH_RDES0_TS 0x00000080

Definition at line 156 of file fm3_eth1_driver.h.

◆ ETH_RDES0_VLAN

#define ETH_RDES0_VLAN 0x00000400

Definition at line 153 of file fm3_eth1_driver.h.

◆ ETH_RDES1_DIC

#define ETH_RDES1_DIC 0x80000000

Definition at line 164 of file fm3_eth1_driver.h.

◆ ETH_RDES1_RBS1

#define ETH_RDES1_RBS1 0x00001FFF

Definition at line 168 of file fm3_eth1_driver.h.

◆ ETH_RDES1_RBS2

#define ETH_RDES1_RBS2 0x1FFF0000

Definition at line 165 of file fm3_eth1_driver.h.

◆ ETH_RDES1_RCH

#define ETH_RDES1_RCH 0x00004000

Definition at line 167 of file fm3_eth1_driver.h.

◆ ETH_RDES1_RER

#define ETH_RDES1_RER 0x00008000

Definition at line 166 of file fm3_eth1_driver.h.

◆ ETH_RDES2_B1AP

#define ETH_RDES2_B1AP 0xFFFFFFFF

Definition at line 169 of file fm3_eth1_driver.h.

◆ ETH_RDES3_B2AP

#define ETH_RDES3_B2AP 0xFFFFFFFF

Definition at line 170 of file fm3_eth1_driver.h.

◆ ETH_RDES4_IP4R

#define ETH_RDES4_IP4R 0x00000040

Definition at line 176 of file fm3_eth1_driver.h.

◆ ETH_RDES4_IP6R

#define ETH_RDES4_IP6R 0x00000080

Definition at line 175 of file fm3_eth1_driver.h.

◆ ETH_RDES4_IPCB

#define ETH_RDES4_IPCB 0x00000020

Definition at line 177 of file fm3_eth1_driver.h.

◆ ETH_RDES4_IPE

#define ETH_RDES4_IPE 0x00000010

Definition at line 178 of file fm3_eth1_driver.h.

◆ ETH_RDES4_IPHE

#define ETH_RDES4_IPHE 0x00000008

Definition at line 179 of file fm3_eth1_driver.h.

◆ ETH_RDES4_IPT

#define ETH_RDES4_IPT 0x00000007

Definition at line 180 of file fm3_eth1_driver.h.

◆ ETH_RDES4_MT

#define ETH_RDES4_MT 0x00000F00

Definition at line 174 of file fm3_eth1_driver.h.

◆ ETH_RDES4_PFT

#define ETH_RDES4_PFT 0x00001000

Definition at line 173 of file fm3_eth1_driver.h.

◆ ETH_RDES4_PV

#define ETH_RDES4_PV 0x00002000

Definition at line 172 of file fm3_eth1_driver.h.

◆ ETH_RDES4_TD

#define ETH_RDES4_TD 0x00004000

Definition at line 171 of file fm3_eth1_driver.h.

◆ ETH_RDES6_RTSL

#define ETH_RDES6_RTSL 0xFFFFFFFF

Definition at line 181 of file fm3_eth1_driver.h.

◆ ETH_RDES7_RTSH

#define ETH_RDES7_RTSH 0xFFFFFFFF

Definition at line 182 of file fm3_eth1_driver.h.

◆ ETH_SR_AIS

#define ETH_SR_AIS 0x00008000

Definition at line 96 of file fm3_eth1_driver.h.

◆ ETH_SR_EB

#define ETH_SR_EB 0x03800000

Definition at line 92 of file fm3_eth1_driver.h.

◆ ETH_SR_ERI

#define ETH_SR_ERI 0x00004000

Definition at line 97 of file fm3_eth1_driver.h.

◆ ETH_SR_ETI

#define ETH_SR_ETI 0x00000400

Definition at line 99 of file fm3_eth1_driver.h.

◆ ETH_SR_FBI

#define ETH_SR_FBI 0x00002000

Definition at line 98 of file fm3_eth1_driver.h.

◆ ETH_SR_GLI

#define ETH_SR_GLI 0x04000000

Definition at line 91 of file fm3_eth1_driver.h.

◆ ETH_SR_GLPII

#define ETH_SR_GLPII 0x40000000

Definition at line 87 of file fm3_eth1_driver.h.

◆ ETH_SR_GMI

#define ETH_SR_GMI 0x08000000

Definition at line 90 of file fm3_eth1_driver.h.

◆ ETH_SR_GPI

#define ETH_SR_GPI 0x10000000

Definition at line 89 of file fm3_eth1_driver.h.

◆ ETH_SR_NIS

#define ETH_SR_NIS 0x00010000

Definition at line 95 of file fm3_eth1_driver.h.

◆ ETH_SR_OVF

#define ETH_SR_OVF 0x00000010

Definition at line 105 of file fm3_eth1_driver.h.

◆ ETH_SR_RI

#define ETH_SR_RI 0x00000040

Definition at line 103 of file fm3_eth1_driver.h.

◆ ETH_SR_RPS

#define ETH_SR_RPS 0x00000100

Definition at line 101 of file fm3_eth1_driver.h.

◆ ETH_SR_RS

#define ETH_SR_RS 0x000E0000

Definition at line 94 of file fm3_eth1_driver.h.

◆ ETH_SR_RU

#define ETH_SR_RU 0x00000080

Definition at line 102 of file fm3_eth1_driver.h.

◆ ETH_SR_RWT

#define ETH_SR_RWT 0x00000200

Definition at line 100 of file fm3_eth1_driver.h.

◆ ETH_SR_TI

#define ETH_SR_TI 0x00000001

Definition at line 109 of file fm3_eth1_driver.h.

◆ ETH_SR_TJT

#define ETH_SR_TJT 0x00000008

Definition at line 106 of file fm3_eth1_driver.h.

◆ ETH_SR_TPS

#define ETH_SR_TPS 0x00000002

Definition at line 108 of file fm3_eth1_driver.h.

◆ ETH_SR_TS

#define ETH_SR_TS 0x00700000

Definition at line 93 of file fm3_eth1_driver.h.

◆ ETH_SR_TTI

#define ETH_SR_TTI 0x20000000

Definition at line 88 of file fm3_eth1_driver.h.

◆ ETH_SR_TU

#define ETH_SR_TU 0x00000004

Definition at line 107 of file fm3_eth1_driver.h.

◆ ETH_SR_UNF

#define ETH_SR_UNF 0x00000020

Definition at line 104 of file fm3_eth1_driver.h.

◆ ETH_TDES0_CC

#define ETH_TDES0_CC 0x00000078

Definition at line 133 of file fm3_eth1_driver.h.

◆ ETH_TDES0_CIC

#define ETH_TDES0_CIC 0x00C00000

Definition at line 119 of file fm3_eth1_driver.h.

◆ ETH_TDES0_DB

#define ETH_TDES0_DB 0x00000001

Definition at line 136 of file fm3_eth1_driver.h.

◆ ETH_TDES0_DC

#define ETH_TDES0_DC 0x08000000

Definition at line 116 of file fm3_eth1_driver.h.

◆ ETH_TDES0_DP

#define ETH_TDES0_DP 0x04000000

Definition at line 117 of file fm3_eth1_driver.h.

◆ ETH_TDES0_EC

#define ETH_TDES0_EC 0x00000100

Definition at line 131 of file fm3_eth1_driver.h.

◆ ETH_TDES0_ED

#define ETH_TDES0_ED 0x00000004

Definition at line 134 of file fm3_eth1_driver.h.

◆ ETH_TDES0_ES

#define ETH_TDES0_ES 0x00008000

Definition at line 124 of file fm3_eth1_driver.h.

◆ ETH_TDES0_FF

#define ETH_TDES0_FF 0x00002000

Definition at line 126 of file fm3_eth1_driver.h.

◆ ETH_TDES0_FS

#define ETH_TDES0_FS 0x10000000

Definition at line 115 of file fm3_eth1_driver.h.

◆ ETH_TDES0_IC

#define ETH_TDES0_IC 0x40000000

Definition at line 113 of file fm3_eth1_driver.h.

◆ ETH_TDES0_IHE

#define ETH_TDES0_IHE 0x00010000

Definition at line 123 of file fm3_eth1_driver.h.

◆ ETH_TDES0_IPE

#define ETH_TDES0_IPE 0x00001000

Definition at line 127 of file fm3_eth1_driver.h.

◆ ETH_TDES0_JT

#define ETH_TDES0_JT 0x00004000

Definition at line 125 of file fm3_eth1_driver.h.

◆ ETH_TDES0_LCA

#define ETH_TDES0_LCA 0x00000800

Definition at line 128 of file fm3_eth1_driver.h.

◆ ETH_TDES0_LCO

#define ETH_TDES0_LCO 0x00000200

Definition at line 130 of file fm3_eth1_driver.h.

◆ ETH_TDES0_LS

#define ETH_TDES0_LS 0x20000000

Definition at line 114 of file fm3_eth1_driver.h.

◆ ETH_TDES0_NC

#define ETH_TDES0_NC 0x00000400

Definition at line 129 of file fm3_eth1_driver.h.

◆ ETH_TDES0_OWN

#define ETH_TDES0_OWN 0x80000000

Definition at line 112 of file fm3_eth1_driver.h.

◆ ETH_TDES0_TCH

#define ETH_TDES0_TCH 0x00100000

Definition at line 121 of file fm3_eth1_driver.h.

◆ ETH_TDES0_TER

#define ETH_TDES0_TER 0x00200000

Definition at line 120 of file fm3_eth1_driver.h.

◆ ETH_TDES0_TTSE

#define ETH_TDES0_TTSE 0x02000000

Definition at line 118 of file fm3_eth1_driver.h.

◆ ETH_TDES0_TTSS

#define ETH_TDES0_TTSS 0x00020000

Definition at line 122 of file fm3_eth1_driver.h.

◆ ETH_TDES0_UF

#define ETH_TDES0_UF 0x00000002

Definition at line 135 of file fm3_eth1_driver.h.

◆ ETH_TDES0_VF

#define ETH_TDES0_VF 0x00000080

Definition at line 132 of file fm3_eth1_driver.h.

◆ ETH_TDES1_TBS1

#define ETH_TDES1_TBS1 0x00001FFF

Definition at line 138 of file fm3_eth1_driver.h.

◆ ETH_TDES1_TBS2

#define ETH_TDES1_TBS2 0x1FFF0000

Definition at line 137 of file fm3_eth1_driver.h.

◆ ETH_TDES2_B1AP

#define ETH_TDES2_B1AP 0xFFFFFFFF

Definition at line 139 of file fm3_eth1_driver.h.

◆ ETH_TDES3_B2AP

#define ETH_TDES3_B2AP 0xFFFFFFFF

Definition at line 140 of file fm3_eth1_driver.h.

◆ ETH_TDES6_TTSL

#define ETH_TDES6_TTSL 0xFFFFFFFF

Definition at line 141 of file fm3_eth1_driver.h.

◆ ETH_TDES7_TTSH

#define ETH_TDES7_TTSH 0xFFFFFFFF

Definition at line 142 of file fm3_eth1_driver.h.

◆ FM3_ETH1_IRQ_GROUP_PRIORITY

#define FM3_ETH1_IRQ_GROUP_PRIORITY 12

Definition at line 74 of file fm3_eth1_driver.h.

◆ FM3_ETH1_IRQ_PRIORITY_GROUPING

#define FM3_ETH1_IRQ_PRIORITY_GROUPING 3

Definition at line 67 of file fm3_eth1_driver.h.

◆ FM3_ETH1_IRQ_SUB_PRIORITY

#define FM3_ETH1_IRQ_SUB_PRIORITY 0

Definition at line 81 of file fm3_eth1_driver.h.

◆ FM3_ETH1_RX_BUFFER_COUNT

#define FM3_ETH1_RX_BUFFER_COUNT 6

Definition at line 53 of file fm3_eth1_driver.h.

◆ FM3_ETH1_RX_BUFFER_SIZE

#define FM3_ETH1_RX_BUFFER_SIZE 1536

Definition at line 60 of file fm3_eth1_driver.h.

◆ FM3_ETH1_TX_BUFFER_COUNT

#define FM3_ETH1_TX_BUFFER_COUNT 3

Definition at line 39 of file fm3_eth1_driver.h.

◆ FM3_ETH1_TX_BUFFER_SIZE

#define FM3_ETH1_TX_BUFFER_SIZE 1536

Definition at line 46 of file fm3_eth1_driver.h.

Function Documentation

◆ fm3Eth1CalcCrc()

uint32_t fm3Eth1CalcCrc	(	const void *	data,
		size_t	length
	)

CRC calculation.

Parameters

[in]	data	Pointer to the data over which to calculate the CRC
[in]	length	Number of bytes to process

Returns: Resulting CRC value

Definition at line 853 of file fm3_eth1_driver.c.

◆ fm3Eth1DisableIrq()

void fm3Eth1DisableIrq ( NetInterface * interface )

Disable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 435 of file fm3_eth1_driver.c.

◆ fm3Eth1EnableIrq()

void fm3Eth1EnableIrq ( NetInterface * interface )

Enable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 407 of file fm3_eth1_driver.c.

◆ fm3Eth1EventHandler()

void fm3Eth1EventHandler ( NetInterface * interface )

FM3 Ethernet MAC event handler.

Parameters

[in] interface Underlying network interface

Definition at line 515 of file fm3_eth1_driver.c.

◆ fm3Eth1Init()

error_t fm3Eth1Init ( NetInterface * interface )

FM3 Ethernet MAC initialization.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 114 of file fm3_eth1_driver.c.

◆ fm3Eth1InitDmaDesc()

void fm3Eth1InitDmaDesc ( NetInterface * interface )

Initialize DMA descriptor lists.

Parameters

[in] interface Underlying network interface

Definition at line 313 of file fm3_eth1_driver.c.

◆ fm3Eth1InitGpio()

void fm3Eth1InitGpio ( NetInterface * interface )

GPIO configuration.

Parameters

[in] interface Underlying network interface

Definition at line 261 of file fm3_eth1_driver.c.

◆ fm3Eth1ReadPhyReg()

uint16_t fm3Eth1ReadPhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr
	)

Read PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)

Returns: Register value

Definition at line 810 of file fm3_eth1_driver.c.

◆ fm3Eth1ReceivePacket()

error_t fm3Eth1ReceivePacket ( NetInterface * interface )

Receive a packet.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 599 of file fm3_eth1_driver.c.

◆ fm3Eth1SendPacket()

error_t fm3Eth1SendPacket	(	NetInterface *	interface,
		const NetBuffer *	buffer,
		size_t	offset,
		NetTxAncillary *	ancillary
	)

Send a packet.

Parameters

[in]	interface	Underlying network interface
[in]	buffer	Multi-part buffer containing the data to send
[in]	offset	Offset to the first data byte
[in]	ancillary	Additional options passed to the stack along with the packet

Returns: Error code

Definition at line 540 of file fm3_eth1_driver.c.

◆ fm3Eth1Tick()

void fm3Eth1Tick ( NetInterface * interface )

FM3 Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters

[in] interface Underlying network interface

Definition at line 382 of file fm3_eth1_driver.c.

◆ fm3Eth1UpdateMacAddrFilter()

error_t fm3Eth1UpdateMacAddrFilter ( NetInterface * interface )

Configure MAC address filtering.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 669 of file fm3_eth1_driver.c.

◆ fm3Eth1UpdateMacConfig()

error_t fm3Eth1UpdateMacConfig ( NetInterface * interface )

Adjust MAC configuration parameters for proper operation.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 729 of file fm3_eth1_driver.c.

◆ fm3Eth1WritePhyReg()

void fm3Eth1WritePhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr,
		uint16_t	data
	)

Write PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)
[in]	data	Register value

Definition at line 772 of file fm3_eth1_driver.c.

Variable Documentation

◆ fm3Eth1Driver

const NicDriver fm3Eth1Driver

extern

FM3 Ethernet MAC driver (ETHER0 instance)

Definition at line 87 of file fm3_eth1_driver.c.

Data Structures

Macros

Functions

Variables

Detailed Description

License

Macro Definition Documentation

◆ ETH_RDES0_AFM

◆ ETH_RDES0_CE

◆ ETH_RDES0_DBE

◆ ETH_RDES0_DE

◆ ETH_RDES0_ES

◆ ETH_RDES0_ESA

◆ ETH_RDES0_FL

◆ ETH_RDES0_FS

◆ ETH_RDES0_FT

◆ ETH_RDES0_LCO

◆ ETH_RDES0_LE

◆ ETH_RDES0_LS

◆ ETH_RDES0_OE

◆ ETH_RDES0_OWN

◆ ETH_RDES0_RE

◆ ETH_RDES0_RWT

◆ ETH_RDES0_SAF

◆ ETH_RDES0_TS

◆ ETH_RDES0_VLAN

◆ ETH_RDES1_DIC

◆ ETH_RDES1_RBS1

◆ ETH_RDES1_RBS2

◆ ETH_RDES1_RCH

◆ ETH_RDES1_RER

◆ ETH_RDES2_B1AP

◆ ETH_RDES3_B2AP

◆ ETH_RDES4_IP4R

◆ ETH_RDES4_IP6R

◆ ETH_RDES4_IPCB

◆ ETH_RDES4_IPE

◆ ETH_RDES4_IPHE

◆ ETH_RDES4_IPT

◆ ETH_RDES4_MT

◆ ETH_RDES4_PFT

◆ ETH_RDES4_PV

◆ ETH_RDES4_TD

◆ ETH_RDES6_RTSL

◆ ETH_RDES7_RTSH

◆ ETH_SR_AIS

◆ ETH_SR_EB

◆ ETH_SR_ERI

◆ ETH_SR_ETI

◆ ETH_SR_FBI

◆ ETH_SR_GLI

◆ ETH_SR_GLPII

◆ ETH_SR_GMI

◆ ETH_SR_GPI

◆ ETH_SR_NIS

◆ ETH_SR_OVF

◆ ETH_SR_RI

◆ ETH_SR_RPS

◆ ETH_SR_RS

◆ ETH_SR_RU

◆ ETH_SR_RWT

◆ ETH_SR_TI

◆ ETH_SR_TJT

◆ ETH_SR_TPS

◆ ETH_SR_TS

◆ ETH_SR_TTI

◆ ETH_SR_TU

◆ ETH_SR_UNF

◆ ETH_TDES0_CC

◆ ETH_TDES0_CIC

◆ ETH_TDES0_DB

◆ ETH_TDES0_DC

◆ ETH_TDES0_DP

◆ ETH_TDES0_EC

◆ ETH_TDES0_ED

◆ ETH_TDES0_ES

◆ ETH_TDES0_FF

◆ ETH_TDES0_FS

◆ ETH_TDES0_IC

◆ ETH_TDES0_IHE