gd32f2xx_eth_driver.h
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1 /**
2  * @file gd32f2xx_eth_driver.h
3  * @brief GigaDevice GD32F2 Ethernet MAC driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.4
29  **/
30 
31 #ifndef _GD32F2XX_ETH_DRIVER_H
32 #define _GD32F2XX_ETH_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Number of TX buffers
38 #ifndef GD32F2XX_ETH_TX_BUFFER_COUNT
39  #define GD32F2XX_ETH_TX_BUFFER_COUNT 3
40 #elif (GD32F2XX_ETH_TX_BUFFER_COUNT < 1)
41  #error GD32F2XX_ETH_TX_BUFFER_COUNT parameter is not valid
42 #endif
43 
44 //TX buffer size
45 #ifndef GD32F2XX_ETH_TX_BUFFER_SIZE
46  #define GD32F2XX_ETH_TX_BUFFER_SIZE 1536
47 #elif (GD32F2XX_ETH_TX_BUFFER_SIZE != 1536)
48  #error GD32F2XX_ETH_TX_BUFFER_SIZE parameter is not valid
49 #endif
50 
51 //Number of RX buffers
52 #ifndef GD32F2XX_ETH_RX_BUFFER_COUNT
53  #define GD32F2XX_ETH_RX_BUFFER_COUNT 6
54 #elif (GD32F2XX_ETH_RX_BUFFER_COUNT < 1)
55  #error GD32F2XX_ETH_RX_BUFFER_COUNT parameter is not valid
56 #endif
57 
58 //RX buffer size
59 #ifndef GD32F2XX_ETH_RX_BUFFER_SIZE
60  #define GD32F2XX_ETH_RX_BUFFER_SIZE 1536
61 #elif (GD32F2XX_ETH_RX_BUFFER_SIZE != 1536)
62  #error GD32F2XX_ETH_RX_BUFFER_SIZE parameter is not valid
63 #endif
64 
65 //Interrupt priority grouping
66 #ifndef GD32F2XX_ETH_IRQ_PRIORITY_GROUPING
67  #define GD32F2XX_ETH_IRQ_PRIORITY_GROUPING 3
68 #elif (GD32F2XX_ETH_IRQ_PRIORITY_GROUPING < 0)
69  #error GD32F2XX_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
70 #endif
71 
72 //Ethernet interrupt group priority
73 #ifndef GD32F2XX_ETH_IRQ_GROUP_PRIORITY
74  #define GD32F2XX_ETH_IRQ_GROUP_PRIORITY 12
75 #elif (GD32F2XX_ETH_IRQ_GROUP_PRIORITY < 0)
76  #error GD32F2XX_ETH_IRQ_GROUP_PRIORITY parameter is not valid
77 #endif
78 
79 //Ethernet interrupt subpriority
80 #ifndef GD32F2XX_ETH_IRQ_SUB_PRIORITY
81  #define GD32F2XX_ETH_IRQ_SUB_PRIORITY 0
82 #elif (GD32F2XX_ETH_IRQ_SUB_PRIORITY < 0)
83  #error GD32F2XX_ETH_IRQ_SUB_PRIORITY parameter is not valid
84 #endif
85 
86 //C++ guard
87 #ifdef __cplusplus
88 extern "C" {
89 #endif
90 
91 
92 /**
93  * @brief Enhanced TX DMA descriptor
94  **/
95 
96 typedef struct
97 {
98  uint32_t tdes0;
99  uint32_t tdes1;
100  uint32_t tdes2;
101  uint32_t tdes3;
103 
104 
105 /**
106  * @brief Enhanced RX DMA descriptor
107  **/
108 
109 typedef struct
110 {
111  uint32_t rdes0;
112  uint32_t rdes1;
113  uint32_t rdes2;
114  uint32_t rdes3;
116 
117 
118 //GD32F2XX Ethernet MAC driver
119 extern const NicDriver gd32f2xxEthDriver;
120 
121 //GD32F2XX Ethernet MAC related functions
123 void gd32f2xxEthInitGpio(NetInterface *interface);
124 void gd32f2xxEthInitDmaDesc(NetInterface *interface);
125 
126 void gd32f2xxEthTick(NetInterface *interface);
127 
128 void gd32f2xxEthEnableIrq(NetInterface *interface);
129 void gd32f2xxEthDisableIrq(NetInterface *interface);
130 void gd32f2xxEthEventHandler(NetInterface *interface);
131 
133  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
134 
136 
139 
140 void gd32f2xxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
141  uint8_t regAddr, uint16_t data);
142 
143 uint16_t gd32f2xxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
144  uint8_t regAddr);
145 
146 uint32_t gd32f2xxEthCalcCrc(const void *data, size_t length);
147 
148 //C++ guard
149 #ifdef __cplusplus
150 }
151 #endif
152 
153 #endif
void gd32f2xxEthTick(NetInterface *interface)
GD32F2XX Ethernet MAC timer handler.
uint8_t opcode
Definition: dns_common.h:188
error_t gd32f2xxEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
uint8_t data[]
Definition: ethernet.h:222
uint16_t gd32f2xxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void gd32f2xxEthEventHandler(NetInterface *interface)
GD32F2XX Ethernet MAC event handler.
void gd32f2xxEthEnableIrq(NetInterface *interface)
Enable interrupts.
error_t
Error codes.
Definition: error.h:43
#define NetInterface
Definition: net.h:36
#define NetTxAncillary
Definition: net_misc.h:36
uint8_t length
Definition: tcp.h:368
void gd32f2xxEthInitGpio(NetInterface *interface)
GPIO configuration.
void gd32f2xxEthDisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t regAddr
error_t gd32f2xxEthInit(NetInterface *interface)
GD32F2XX Ethernet MAC initialization.
Network interface controller abstraction layer.
void gd32f2xxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
Enhanced RX DMA descriptor.
void gd32f2xxEthInitDmaDesc(NetInterface *interface)
Initialize DMA descriptor lists.
uint32_t gd32f2xxEthCalcCrc(const void *data, size_t length)
CRC calculation.
error_t gd32f2xxEthReceivePacket(NetInterface *interface)
Receive a packet.
NIC driver.
Definition: nic.h:286
error_t gd32f2xxEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
const NicDriver gd32f2xxEthDriver
GD32F2XX Ethernet MAC driver.
error_t gd32f2xxEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
Enhanced TX DMA descriptor.