ksz8051_driver.h
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1 /**
2  * @file ksz8051_driver.h
3  * @brief KSZ8051 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 #ifndef _KSZ8051_DRIVER_H
32 #define _KSZ8051_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //PHY address
38 #ifndef KSZ8051_PHY_ADDR
39  #define KSZ8051_PHY_ADDR 1
40 #elif (KSZ8051_PHY_ADDR < 0 || KSZ8051_PHY_ADDR > 31)
41  #error KSZ8051_PHY_ADDR parameter is not valid
42 #endif
43 
44 //KSZ8051 PHY registers
45 #define KSZ8051_BMCR 0x00
46 #define KSZ8051_BMSR 0x01
47 #define KSZ8051_PHYID1 0x02
48 #define KSZ8051_PHYID2 0x03
49 #define KSZ8051_ANAR 0x04
50 #define KSZ8051_ANLPAR 0x05
51 #define KSZ8051_ANER 0x06
52 #define KSZ8051_ANNPR 0x07
53 #define KSZ8051_ANLPNPR 0x08
54 #define KSZ8051_DRCON 0x10
55 #define KSZ8051_AFECON1 0x11
56 #define KSZ8051_RXERCTR 0x15
57 #define KSZ8051_OMSO 0x16
58 #define KSZ8051_OMSS 0x17
59 #define KSZ8051_EXCON 0x18
60 #define KSZ8051_ICSR 0x1B
61 #define KSZ8051_LINKMD 0x1D
62 #define KSZ8051_PHYCON1 0x1E
63 #define KSZ8051_PHYCON2 0x1F
64 
65 //Basic Control register
66 #define KSZ8051_BMCR_RESET 0x8000
67 #define KSZ8051_BMCR_LOOPBACK 0x4000
68 #define KSZ8051_BMCR_SPEED_SEL 0x2000
69 #define KSZ8051_BMCR_AN_EN 0x1000
70 #define KSZ8051_BMCR_POWER_DOWN 0x0800
71 #define KSZ8051_BMCR_ISOLATE 0x0400
72 #define KSZ8051_BMCR_RESTART_AN 0x0200
73 #define KSZ8051_BMCR_DUPLEX_MODE 0x0100
74 #define KSZ8051_BMCR_COL_TEST 0x0080
75 
76 //Basic Status register
77 #define KSZ8051_BMSR_100BT4 0x8000
78 #define KSZ8051_BMSR_100BTX_FD 0x4000
79 #define KSZ8051_BMSR_100BTX_HD 0x2000
80 #define KSZ8051_BMSR_10BT_FD 0x1000
81 #define KSZ8051_BMSR_10BT_HD 0x0800
82 #define KSZ8051_BMSR_NO_PREAMBLE 0x0040
83 #define KSZ8051_BMSR_AN_COMPLETE 0x0020
84 #define KSZ8051_BMSR_REMOTE_FAULT 0x0010
85 #define KSZ8051_BMSR_AN_CAPABLE 0x0008
86 #define KSZ8051_BMSR_LINK_STATUS 0x0004
87 #define KSZ8051_BMSR_JABBER_DETECT 0x0002
88 #define KSZ8051_BMSR_EXTENDED_CAPABLE 0x0001
89 
90 //PHY Identifier 1 register
91 #define KSZ8051_PHYID1_PHY_ID_MSB 0xFFFF
92 #define KSZ8051_PHYID1_PHY_ID_MSB_DEFAULT 0x0022
93 
94 //PHY Identifier 2 register
95 #define KSZ8051_PHYID2_PHY_ID_LSB 0xFC00
96 #define KSZ8051_PHYID2_PHY_ID_LSB_DEFAULT 0x1400
97 #define KSZ8051_PHYID2_MODEL_NUM 0x03F0
98 #define KSZ8051_PHYID2_MODEL_NUM_DEFAULT 0x0160
99 #define KSZ8051_PHYID2_REVISION_NUM 0x000F
100 
101 //Auto-Negotiation Advertisement register
102 #define KSZ8051_ANAR_NEXT_PAGE 0x8000
103 #define KSZ8051_ANAR_REMOTE_FAULT 0x2000
104 #define KSZ8051_ANAR_PAUSE 0x0C00
105 #define KSZ8051_ANAR_100BT4 0x0200
106 #define KSZ8051_ANAR_100BTX_FD 0x0100
107 #define KSZ8051_ANAR_100BTX_HD 0x0080
108 #define KSZ8051_ANAR_10BT_FD 0x0040
109 #define KSZ8051_ANAR_10BT_HD 0x0020
110 #define KSZ8051_ANAR_SELECTOR 0x001F
111 #define KSZ8051_ANAR_SELECTOR_DEFAULT 0x0001
112 
113 //Auto-Negotiation Link Partner Ability register
114 #define KSZ8051_ANLPAR_NEXT_PAGE 0x8000
115 #define KSZ8051_ANLPAR_ACK 0x4000
116 #define KSZ8051_ANLPAR_REMOTE_FAULT 0x2000
117 #define KSZ8051_ANLPAR_PAUSE 0x0C00
118 #define KSZ8051_ANLPAR_100BT4 0x0200
119 #define KSZ8051_ANLPAR_100BTX_FD 0x0100
120 #define KSZ8051_ANLPAR_100BTX_HD 0x0080
121 #define KSZ8051_ANLPAR_10BT_FD 0x0040
122 #define KSZ8051_ANLPAR_10BT_HD 0x0020
123 #define KSZ8051_ANLPAR_SELECTOR 0x001F
124 #define KSZ8051_ANLPAR_SELECTOR_DEFAULT 0x0001
125 
126 //Auto-Negotiation Expansion register
127 #define KSZ8051_ANER_PAR_DETECT_FAULT 0x0010
128 #define KSZ8051_ANER_LP_NEXT_PAGE_ABLE 0x0008
129 #define KSZ8051_ANER_NEXT_PAGE_ABLE 0x0004
130 #define KSZ8051_ANER_PAGE_RECEIVED 0x0002
131 #define KSZ8051_ANER_LP_AN_ABLE 0x0001
132 
133 //Auto-Negotiation Next Page register
134 #define KSZ8051_ANNPR_NEXT_PAGE 0x8000
135 #define KSZ8051_ANNPR_MSG_PAGE 0x2000
136 #define KSZ8051_ANNPR_ACK2 0x1000
137 #define KSZ8051_ANNPR_TOGGLE 0x0800
138 #define KSZ8051_ANNPR_MESSAGE 0x07FF
139 
140 //Link Partner Next Page Ability register
141 #define KSZ8051_ANLPNPR_NEXT_PAGE 0x8000
142 #define KSZ8051_ANLPNPR_ACK 0x4000
143 #define KSZ8051_ANLPNPR_MSG_PAGE 0x2000
144 #define KSZ8051_ANLPNPR_ACK2 0x1000
145 #define KSZ8051_ANLPNPR_TOGGLE 0x0800
146 #define KSZ8051_ANLPNPR_MESSAGE 0x07FF
147 
148 //Digital Reserved Control register
149 #define KSZ8051_DRCON_PLL_OFF 0x0010
150 
151 //AFE Control 1 register
152 #define KSZ8051_AFECON1_SLOW_OSC_MODE_EN 0x0020
153 
154 //Operation Mode Strap Override register
155 #define KSZ8051_OMSO_BCAST_OFF_OVERRIDE 0x0200
156 #define KSZ8051_OMSO_MII_BTB_OVERRIDE 0x0080
157 #define KSZ8051_OMSO_RMII_BTB_OVERRIDE 0x0040
158 #define KSZ8051_OMSO_NAND_TREE_OVERRIDE 0x0020
159 #define KSZ8051_OMSO_RMII_OVERRIDE 0x0002
160 #define KSZ8051_OMSO_MII_OVERRIDE 0x0001
161 
162 //Operation Mode Strap Status register
163 #define KSZ8051_OMSS_PHYAD 0xE000
164 #define KSZ8051_OMSS_BCAST_OFF_STRAP_STATUS 0x0200
165 #define KSZ8051_OMSS_MII_BTB_STRAP_STATUS 0x0080
166 #define KSZ8051_OMSS_RMII_BTB_STRAP_STATUS 0x0040
167 #define KSZ8051_OMSS_NAND_TREE_STRAP_STATUS 0x0020
168 #define KSZ8051_OMSS_RMII_STRAP_STATUS 0x0002
169 #define KSZ8051_OMSS_MII_STRAP_STATUS 0x0001
170 
171 //Expanded Control register
172 #define KSZ8051_EXCON_EDPD_DIS 0x0800
173 #define KSZ8051_EXCON_100BTX_LATENCY 0x0400
174 #define KSZ8051_EXCON_10BT_PREAMBLE_RESTORE 0x0040
175 
176 //Interrupt Control/Status register
177 #define KSZ8051_ICSR_JABBER_IE 0x8000
178 #define KSZ8051_ICSR_RECEIVE_ERROR_IE 0x4000
179 #define KSZ8051_ICSR_PAGE_RECEIVED_IE 0x2000
180 #define KSZ8051_ICSR_PAR_DETECT_FAULT_IE 0x1000
181 #define KSZ8051_ICSR_LP_ACK_IE 0x0800
182 #define KSZ8051_ICSR_LINK_DOWN_IE 0x0400
183 #define KSZ8051_ICSR_REMOTE_FAULT_IE 0x0200
184 #define KSZ8051_ICSR_LINK_UP_IE 0x0100
185 #define KSZ8051_ICSR_JABBER_IF 0x0080
186 #define KSZ8051_ICSR_RECEIVE_ERROR_IF 0x0040
187 #define KSZ8051_ICSR_PAGE_RECEIVED_IF 0x0020
188 #define KSZ8051_ICSR_PAR_DETECT_FAULT_IF 0x0010
189 #define KSZ8051_ICSR_LP_ACK_IF 0x0008
190 #define KSZ8051_ICSR_LINK_DOWN_IF 0x0004
191 #define KSZ8051_ICSR_REMOTE_FAULT_IF 0x0002
192 #define KSZ8051_ICSR_LINK_UP_IF 0x0001
193 
194 //LinkMD Control/Status register
195 #define KSZ8051_LINKMD_TEST_EN 0x8000
196 #define KSZ8051_LINKMD_RESULT 0x6000
197 #define KSZ8051_LINKMD_SHORT 0x1000
198 #define KSZ8051_LINKMD_FAULT_COUNT 0x01FF
199 
200 //PHY Control 1 register
201 #define KSZ8051_PHYCON1_PAUSE_EN 0x0200
202 #define KSZ8051_PHYCON1_LINK_STATUS 0x0100
203 #define KSZ8051_PHYCON1_POL_STATUS 0x0080
204 #define KSZ8051_PHYCON1_MDIX_STATE 0x0020
205 #define KSZ8051_PHYCON1_ENERGY_DETECT 0x0010
206 #define KSZ8051_PHYCON1_PHY_ISOLATE 0x0008
207 #define KSZ8051_PHYCON1_OP_MODE 0x0007
208 #define KSZ8051_PHYCON1_OP_MODE_AN 0x0000
209 #define KSZ8051_PHYCON1_OP_MODE_10BT_HD 0x0001
210 #define KSZ8051_PHYCON1_OP_MODE_100BTX_HD 0x0002
211 #define KSZ8051_PHYCON1_OP_MODE_10BT_FD 0x0005
212 #define KSZ8051_PHYCON1_OP_MODE_100BTX_FD 0x0006
213 
214 //PHY Control 2 register
215 #define KSZ8051_PHYCON2_HP_MDIX 0x8000
216 #define KSZ8051_PHYCON2_MDIX_SEL 0x4000
217 #define KSZ8051_PHYCON2_PAIR_SWAP_DIS 0x2000
218 #define KSZ8051_PHYCON2_FORCE_LINK 0x0800
219 #define KSZ8051_PHYCON2_POWER_SAVING 0x0400
220 #define KSZ8051_PHYCON2_INT_LEVEL 0x0200
221 #define KSZ8051_PHYCON2_JABBER_EN 0x0100
222 #define KSZ8051_PHYCON2_RMII_REF_CLK_SEL 0x0080
223 #define KSZ8051_PHYCON2_LED_MODE 0x0030
224 #define KSZ8051_PHYCON2_TX_DIS 0x0008
225 #define KSZ8051_PHYCON2_REMOTE_LOOPBACK 0x0004
226 #define KSZ8051_PHYCON2_SQE_TEST_EN 0x0002
227 #define KSZ8051_PHYCON2_DATA_SCRAMBLING_DIS 0x0001
228 
229 //C++ guard
230 #ifdef __cplusplus
231 extern "C" {
232 #endif
233 
234 //KSZ8051 Ethernet PHY driver
235 extern const PhyDriver ksz8051PhyDriver;
236 
237 //KSZ8051 related functions
238 error_t ksz8051Init(NetInterface *interface);
239 
240 void ksz8051Tick(NetInterface *interface);
241 
242 void ksz8051EnableIrq(NetInterface *interface);
243 void ksz8051DisableIrq(NetInterface *interface);
244 
245 void ksz8051EventHandler(NetInterface *interface);
246 
247 void ksz8051WritePhyReg(NetInterface *interface, uint8_t address,
248  uint16_t data);
249 
250 uint16_t ksz8051ReadPhyReg(NetInterface *interface, uint8_t address);
251 
252 void ksz8051DumpPhyReg(NetInterface *interface);
253 
254 //C++ guard
255 #ifdef __cplusplus
256 }
257 #endif
258 
259 #endif
void ksz8051DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
void ksz8051Tick(NetInterface *interface)
KSZ8051 timer handler.
PHY driver.
Definition: nic.h:214
const PhyDriver ksz8051PhyDriver
KSZ8051 Ethernet PHY driver.
uint16_t ksz8051ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void ksz8051DisableIrq(NetInterface *interface)
Disable interrupts.
error_t
Error codes.
Definition: error.h:42
#define NetInterface
Definition: net.h:36
error_t ksz8051Init(NetInterface *interface)
KSZ8051 PHY transceiver initialization.
Network interface controller abstraction layer.
void ksz8051EventHandler(NetInterface *interface)
KSZ8051 event handler.
Ipv6Addr address
void ksz8051EnableIrq(NetInterface *interface)
Enable interrupts.
uint8_t data[]
Definition: dtls_misc.h:176
void ksz8051WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.