ksz8051_driver.c
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1 /**
2  * @file ksz8051_driver.c
3  * @brief KSZ8051 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 //Switch to the appropriate trace level
30 #define TRACE_LEVEL NIC_TRACE_LEVEL
31 
32 //Dependencies
33 #include "core/net.h"
35 #include "debug.h"
36 
37 
38 /**
39  * @brief KSZ8051 Ethernet PHY driver
40  **/
41 
43 {
49 };
50 
51 
52 /**
53  * @brief KSZ8051 PHY transceiver initialization
54  * @param[in] interface Underlying network interface
55  * @return Error code
56  **/
57 
59 {
60  //Debug message
61  TRACE_INFO("Initializing KSZ8051...\r\n");
62 
63  //Initialize external interrupt line driver
64  if(interface->extIntDriver != NULL)
65  interface->extIntDriver->init();
66 
67  //Reset PHY transceiver
69  //Wait for the reset to complete
71 
72  //Dump PHY registers for debugging purpose
73  ksz8051DumpPhyReg(interface);
74 
75  //The PHY will generate interrupts when link status changes are detected
77 
78  //Force the TCP/IP stack to poll the link state at startup
79  interface->phyEvent = TRUE;
80  //Notify the TCP/IP stack of the event
82 
83  //Successful initialization
84  return NO_ERROR;
85 }
86 
87 
88 /**
89  * @brief KSZ8051 timer handler
90  * @param[in] interface Underlying network interface
91  **/
92 
93 void ksz8051Tick(NetInterface *interface)
94 {
95  uint16_t value;
96  bool_t linkState;
97 
98  //No external interrupt line driver?
99  if(interface->extIntDriver == NULL)
100  {
101  //Read basic status register
103  //Retrieve current link state
104  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
105 
106  //Link up event?
107  if(linkState && !interface->linkState)
108  {
109  //Set event flag
110  interface->phyEvent = TRUE;
111  //Notify the TCP/IP stack of the event
113  }
114  //Link down event?
115  else if(!linkState && interface->linkState)
116  {
117  //Set event flag
118  interface->phyEvent = TRUE;
119  //Notify the TCP/IP stack of the event
121  }
122  }
123 }
124 
125 
126 /**
127  * @brief Enable interrupts
128  * @param[in] interface Underlying network interface
129  **/
130 
132 {
133  //Enable PHY transceiver interrupts
134  if(interface->extIntDriver != NULL)
135  interface->extIntDriver->enableIrq();
136 }
137 
138 
139 /**
140  * @brief Disable interrupts
141  * @param[in] interface Underlying network interface
142  **/
143 
145 {
146  //Disable PHY transceiver interrupts
147  if(interface->extIntDriver != NULL)
148  interface->extIntDriver->disableIrq();
149 }
150 
151 
152 /**
153  * @brief KSZ8051 event handler
154  * @param[in] interface Underlying network interface
155  **/
156 
158 {
159  uint16_t value;
160 
161  //Read status register to acknowledge the interrupt
163 
164  //Link status change?
166  {
167  //Any link failure condition is latched in the BMSR register... Reading
168  //the register twice will always return the actual link status
171 
172  //Link is up?
173  if(value & BMSR_LINK_STATUS)
174  {
175  //Read PHY control register
177 
178  //Check current operation mode
179  switch(value & PHYCON1_OP_MODE_MASK)
180  {
181  //10BASE-T
183  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
184  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
185  break;
186  //10BASE-T full-duplex
188  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
189  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
190  break;
191  //100BASE-TX
193  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
194  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
195  break;
196  //100BASE-TX full-duplex
198  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
199  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
200  break;
201  //Unknown operation mode
202  default:
203  //Debug message
204  TRACE_WARNING("Invalid Duplex mode\r\n");
205  break;
206  }
207 
208  //Update link state
209  interface->linkState = TRUE;
210 
211  //Adjust MAC configuration parameters for proper operation
212  interface->nicDriver->updateMacConfig(interface);
213  }
214  else
215  {
216  //Update link state
217  interface->linkState = FALSE;
218  }
219 
220  //Process link state change event
221  nicNotifyLinkChange(interface);
222  }
223 }
224 
225 
226 /**
227  * @brief Write PHY register
228  * @param[in] interface Underlying network interface
229  * @param[in] address PHY register address
230  * @param[in] data Register value
231  **/
232 
233 void ksz8051WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
234 {
235  uint8_t phyAddr;
236 
237  //Get the address of the PHY transceiver
238  if(interface->phyAddr < 32)
239  phyAddr = interface->phyAddr;
240  else
241  phyAddr = KSZ8051_PHY_ADDR;
242 
243  //Write the specified PHY register
244  interface->nicDriver->writePhyReg(phyAddr, address, data);
245 }
246 
247 
248 /**
249  * @brief Read PHY register
250  * @param[in] interface Underlying network interface
251  * @param[in] address PHY register address
252  * @return Register value
253  **/
254 
255 uint16_t ksz8051ReadPhyReg(NetInterface *interface, uint8_t address)
256 {
257  uint8_t phyAddr;
258 
259  //Get the address of the PHY transceiver
260  if(interface->phyAddr < 32)
261  phyAddr = interface->phyAddr;
262  else
263  phyAddr = KSZ8051_PHY_ADDR;
264 
265  //Read the specified PHY register
266  return interface->nicDriver->readPhyReg(phyAddr, address);
267 }
268 
269 
270 /**
271  * @brief Dump PHY registers for debugging purpose
272  * @param[in] interface Underlying network interface
273  **/
274 
276 {
277  uint8_t i;
278 
279  //Loop through PHY registers
280  for(i = 0; i < 32; i++)
281  {
282  //Display current PHY register
283  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i, ksz8051ReadPhyReg(interface, i));
284  }
285 
286  //Terminate with a line feed
287  TRACE_DEBUG("\r\n");
288 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change event.
Definition: nic.c:298
uint16_t ksz8051ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
TCP/IP stack core.
Debugging facilities.
#define KSZ8051_PHY_REG_PHYCON1
void ksz8051EnableIrq(NetInterface *interface)
Enable interrupts.
void ksz8051DisableIrq(NetInterface *interface)
Disable interrupts.
#define BMSR_LINK_STATUS
Definition: ar8031_driver.h:95
void ksz8051WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
void ksz8051EventHandler(NetInterface *interface)
KSZ8051 event handler.
#define ICSR_LINK_UP_IF
error_t ksz8051Init(NetInterface *interface)
KSZ8051 PHY transceiver initialization.
#define KSZ8051_PHY_ADDR
#define TRUE
Definition: os_port.h:48
PHY driver.
Definition: nic.h:196
#define PHYCON1_OP_MODE_10BT
#define KSZ8051_PHY_REG_BMCR
const PhyDriver ksz8051PhyDriver
KSZ8051 Ethernet PHY driver.
#define BMCR_RESET
Definition: ar8031_driver.h:71
#define KSZ8051_PHY_REG_BMSR
#define ICSR_LINK_UP_IE
void ksz8051Tick(NetInterface *interface)
KSZ8051 timer handler.
#define ICSR_LINK_DOWN_IF
#define TRACE_INFO(...)
Definition: debug.h:86
void ksz8051DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
Success.
Definition: error.h:42
#define PHYCON1_OP_MODE_100BTX_FD
Ipv6Addr address
#define ICSR_LINK_DOWN_IE
OsEvent netEvent
Definition: net.c:72
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define PHYCON1_OP_MODE_MASK
error_t
Error codes.
Definition: error.h:40
#define TRACE_WARNING(...)
Definition: debug.h:78
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
uint8_t value[]
Definition: dtls_misc.h:141
#define PHYCON1_OP_MODE_10BT_FD
#define PHYCON1_OP_MODE_100BTX
KSZ8051 Ethernet PHY transceiver.
#define KSZ8051_PHY_REG_ICSR
#define FALSE
Definition: os_port.h:44
int bool_t
Definition: compiler_port.h:47
#define TRACE_DEBUG(...)
Definition: debug.h:98