ksz8061_driver.c
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1 /**
2  * @file ksz8061_driver.c
3  * @brief KSZ8061 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.4
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief KSZ8061 Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief KSZ8061 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  //Debug message
63  TRACE_INFO("Initializing KSZ8061...\r\n");
64 
65  //Undefined PHY address?
66  if(interface->phyAddr >= 32)
67  {
68  //Use the default address
69  interface->phyAddr = KSZ8061_PHY_ADDR;
70  }
71 
72  //Initialize serial management interface
73  if(interface->smiDriver != NULL)
74  {
75  interface->smiDriver->init();
76  }
77 
78  //Initialize external interrupt line driver
79  if(interface->extIntDriver != NULL)
80  {
81  interface->extIntDriver->init();
82  }
83 
84  //Reset PHY transceiver
86 
87  //Wait for the reset to complete
89  {
90  }
91 
92  //Dump PHY registers for debugging purpose
93  ksz8061DumpPhyReg(interface);
94 
95  //Silicon errata workaround #1
96  ksz8061WritePhyReg(interface, KSZ8061_MMDACR, 0x0001);
97  ksz8061WritePhyReg(interface, KSZ8061_MMDAADR, 0x0002);
98  ksz8061WritePhyReg(interface, KSZ8061_MMDACR, 0x4001);
99  ksz8061WritePhyReg(interface, KSZ8061_MMDAADR, 0xB61A);
100 
101  //Silicon errata workaround #2
102  ksz8061WritePhyReg(interface, KSZ8061_MMDACR, 0x0001);
103  ksz8061WritePhyReg(interface, KSZ8061_MMDAADR, 0x001D);
104  ksz8061WritePhyReg(interface, KSZ8061_MMDACR, 0x4001);
105  ksz8061WritePhyReg(interface, KSZ8061_MMDAADR, 0x0110);
106 
107  //The PHY will generate interrupts when link status changes are detected
110 
111  //Perform custom configuration
112  ksz8061InitHook(interface);
113 
114  //Force the TCP/IP stack to poll the link state at startup
115  interface->phyEvent = TRUE;
116  //Notify the TCP/IP stack of the event
118 
119  //Successful initialization
120  return NO_ERROR;
121 }
122 
123 
124 /**
125  * @brief KSZ8061 custom configuration
126  * @param[in] interface Underlying network interface
127  **/
128 
129 __weak_func void ksz8061InitHook(NetInterface *interface)
130 {
131 }
132 
133 
134 /**
135  * @brief KSZ8061 timer handler
136  * @param[in] interface Underlying network interface
137  **/
138 
139 void ksz8061Tick(NetInterface *interface)
140 {
141  uint16_t value;
142  bool_t linkState;
143 
144  //No external interrupt line driver?
145  if(interface->extIntDriver == NULL)
146  {
147  //Read basic status register
148  value = ksz8061ReadPhyReg(interface, KSZ8061_BMSR);
149  //Retrieve current link state
150  linkState = (value & KSZ8061_BMSR_LINK_STATUS) ? TRUE : FALSE;
151 
152  //Link up event?
153  if(linkState && !interface->linkState)
154  {
155  //Set event flag
156  interface->phyEvent = TRUE;
157  //Notify the TCP/IP stack of the event
159  }
160  //Link down event?
161  else if(!linkState && interface->linkState)
162  {
163  //Set event flag
164  interface->phyEvent = TRUE;
165  //Notify the TCP/IP stack of the event
167  }
168  }
169 }
170 
171 
172 /**
173  * @brief Enable interrupts
174  * @param[in] interface Underlying network interface
175  **/
176 
178 {
179  //Enable PHY transceiver interrupts
180  if(interface->extIntDriver != NULL)
181  {
182  interface->extIntDriver->enableIrq();
183  }
184 }
185 
186 
187 /**
188  * @brief Disable interrupts
189  * @param[in] interface Underlying network interface
190  **/
191 
193 {
194  //Disable PHY transceiver interrupts
195  if(interface->extIntDriver != NULL)
196  {
197  interface->extIntDriver->disableIrq();
198  }
199 }
200 
201 
202 /**
203  * @brief KSZ8061 event handler
204  * @param[in] interface Underlying network interface
205  **/
206 
208 {
209  uint16_t value;
210 
211  //Read status register to acknowledge the interrupt
212  value = ksz8061ReadPhyReg(interface, KSZ8061_ICSR);
213 
214  //Link status change?
216  {
217  //Any link failure condition is latched in the BMSR register. Reading
218  //the register twice will always return the actual link status
219  value = ksz8061ReadPhyReg(interface, KSZ8061_BMSR);
220  value = ksz8061ReadPhyReg(interface, KSZ8061_BMSR);
221 
222  //Link is up?
223  if((value & KSZ8061_BMSR_LINK_STATUS) != 0)
224  {
225  //Read PHY control register
227 
228  //Check current operation mode
230  {
231  //10BASE-T half-duplex
233  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
234  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
235  break;
236 
237  //10BASE-T full-duplex
239  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
240  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
241  break;
242 
243  //100BASE-TX half-duplex
245  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
246  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
247  break;
248 
249  //100BASE-TX full-duplex
251  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
252  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
253  break;
254 
255  //Unknown operation mode
256  default:
257  //Debug message
258  TRACE_WARNING("Invalid operation mode!\r\n");
259  break;
260  }
261 
262  //Update link state
263  interface->linkState = TRUE;
264 
265  //Adjust MAC configuration parameters for proper operation
266  interface->nicDriver->updateMacConfig(interface);
267  }
268  else
269  {
270  //Update link state
271  interface->linkState = FALSE;
272  }
273 
274  //Process link state change event
275  nicNotifyLinkChange(interface);
276  }
277 }
278 
279 
280 /**
281  * @brief Write PHY register
282  * @param[in] interface Underlying network interface
283  * @param[in] address PHY register address
284  * @param[in] data Register value
285  **/
286 
287 void ksz8061WritePhyReg(NetInterface *interface, uint8_t address,
288  uint16_t data)
289 {
290  //Write the specified PHY register
291  if(interface->smiDriver != NULL)
292  {
293  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
294  interface->phyAddr, address, data);
295  }
296  else
297  {
298  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
299  interface->phyAddr, address, data);
300  }
301 }
302 
303 
304 /**
305  * @brief Read PHY register
306  * @param[in] interface Underlying network interface
307  * @param[in] address PHY register address
308  * @return Register value
309  **/
310 
311 uint16_t ksz8061ReadPhyReg(NetInterface *interface, uint8_t address)
312 {
313  uint16_t data;
314 
315  //Read the specified PHY register
316  if(interface->smiDriver != NULL)
317  {
318  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
319  interface->phyAddr, address);
320  }
321  else
322  {
323  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
324  interface->phyAddr, address);
325  }
326 
327  //Return the value of the PHY register
328  return data;
329 }
330 
331 
332 /**
333  * @brief Dump PHY registers for debugging purpose
334  * @param[in] interface Underlying network interface
335  **/
336 
338 {
339  uint8_t i;
340 
341  //Loop through PHY registers
342  for(i = 0; i < 32; i++)
343  {
344  //Display current PHY register
345  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
346  ksz8061ReadPhyReg(interface, i));
347  }
348 
349  //Terminate with a line feed
350  TRACE_DEBUG("\r\n");
351 }
352 
353 
354 /**
355  * @brief Write MMD register
356  * @param[in] interface Underlying network interface
357  * @param[in] devAddr Device address
358  * @param[in] regAddr Register address
359  * @param[in] data MMD register value
360  **/
361 
362 void ksz8061WriteMmdReg(NetInterface *interface, uint8_t devAddr,
363  uint16_t regAddr, uint16_t data)
364 {
365  //Select register operation
368 
369  //Write MMD register address
371 
372  //Select data operation
375 
376  //Write the content of the MMD register
378 }
379 
380 
381 /**
382  * @brief Read MMD register
383  * @param[in] interface Underlying network interface
384  * @param[in] devAddr Device address
385  * @param[in] regAddr Register address
386  * @return MMD register value
387  **/
388 
389 uint16_t ksz8061ReadMmdReg(NetInterface *interface, uint8_t devAddr,
390  uint16_t regAddr)
391 {
392  //Select register operation
395 
396  //Write MMD register address
398 
399  //Select data operation
402 
403  //Read the content of the MMD register
404  return ksz8061ReadPhyReg(interface, KSZ8061_MMDAADR);
405 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:559
int bool_t
Definition: compiler_port.h:53
#define netEvent
Definition: net_legacy.h:196
#define KSZ8061_BMCR
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
#define KSZ8061_BMSR_LINK_STATUS
void ksz8061WriteMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr, uint16_t data)
Write MMD register.
#define TRUE
Definition: os_port.h:50
Ethernet PHY driver.
Definition: nic.h:311
uint8_t data[]
Definition: ethernet.h:222
#define KSZ8061_PHYCON1_OP_MODE_100BTX_HD
#define KSZ8061_PHYCON1_OP_MODE_100BTX_FD
#define KSZ8061_MMDACR_FUNC_DATA_NO_POST_INC
uint16_t ksz8061ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void ksz8061DisableIrq(NetInterface *interface)
Disable interrupts.
#define SMI_OPCODE_WRITE
Definition: nic.h:66
#define KSZ8061_PHYCON1_OP_MODE_10BT_FD
#define FALSE
Definition: os_port.h:46
error_t
Error codes.
Definition: error.h:43
error_t ksz8061Init(NetInterface *interface)
KSZ8061 PHY transceiver initialization.
#define KSZ8061_PHYCON1
#define KSZ8061_PHYCON1_OP_MODE_10BT_HD
#define KSZ8061_MMDACR_FUNC_ADDR
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
#define KSZ8061_ICSR_LINK_DOWN_IF
#define SMI_OPCODE_READ
Definition: nic.h:67
uint16_t ksz8061ReadMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr)
Read MMD register.
#define TRACE_INFO(...)
Definition: debug.h:95
void ksz8061EnableIrq(NetInterface *interface)
Enable interrupts.
KSZ8061 Ethernet PHY driver.
const PhyDriver ksz8061PhyDriver
KSZ8061 Ethernet PHY driver.
#define KSZ8061_PHY_ADDR
#define KSZ8061_BMCR_RESET
#define TRACE_WARNING(...)
Definition: debug.h:85
#define TRACE_DEBUG(...)
Definition: debug.h:107
#define KSZ8061_MMDACR
#define KSZ8061_PHYCON1_OP_MODE
uint16_t regAddr
void ksz8061Tick(NetInterface *interface)
KSZ8061 timer handler.
Ipv6Addr address[]
Definition: ipv6.h:325
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
void ksz8061DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
uint8_t value[]
Definition: tcp.h:369
#define KSZ8061_ICSR_LINK_UP_IF
#define KSZ8061_ICSR_LINK_DOWN_IE
#define KSZ8061_MMDAADR
__weak_func void ksz8061InitHook(NetInterface *interface)
KSZ8061 custom configuration.
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
TCP/IP stack core.
void ksz8061EventHandler(NetInterface *interface)
KSZ8061 event handler.
#define KSZ8061_ICSR
void ksz8061WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define KSZ8061_ICSR_LINK_UP_IE
@ NO_ERROR
Success.
Definition: error.h:44
#define KSZ8061_BMSR
Debugging facilities.
#define KSZ8061_MMDACR_DEVAD