ksz8863_driver.h
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1 /**
2  * @file ksz8863_driver.h
3  * @brief KSZ8863 3-port Ethernet switch driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 #ifndef _KSZ8863_DRIVER_H
32 #define _KSZ8863_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Port identifiers
38 #define KSZ8863_PORT1 1
39 #define KSZ8863_PORT2 2
40 #define KSZ8863_PORT3 3
41 
42 //Port masks
43 #define KSZ8863_PORT_MASK 0x07
44 #define KSZ8863_PORT1_MASK 0x01
45 #define KSZ8863_PORT2_MASK 0x02
46 #define KSZ8863_PORT3_MASK 0x04
47 
48 //SPI command byte
49 #define KSZ8863_SPI_CMD_WRITE 0x02
50 #define KSZ8863_SPI_CMD_READ 0x03
51 
52 //Size of static and dynamic MAC tables
53 #define KSZ8863_STATIC_MAC_TABLE_SIZE 8
54 #define KSZ8863_DYNAMIC_MAC_TABLE_SIZE 1024
55 
56 //Tail tag rules (host to KSZ8863)
57 #define KSZ8863_TAIL_TAG_PRIORITY 0x0C
58 #define KSZ8863_TAIL_TAG_DEST_PORT2 0x02
59 #define KSZ8863_TAIL_TAG_DEST_PORT1 0x01
60 #define KSZ8863_TAIL_TAG_NORMAL_ADDR_LOOKUP 0x00
61 
62 //Tail tag rules (KSZ8863 to host)
63 #define KSZ8863_TAIL_TAG_SRC_PORT 0x01
64 
65 //KSZ8863 PHY registers
66 #define KSZ8863_BMCR 0x00
67 #define KSZ8863_BMSR 0x01
68 #define KSZ8863_PHYID1 0x02
69 #define KSZ8863_PHYID2 0x03
70 #define KSZ8863_ANAR 0x04
71 #define KSZ8863_ANLPAR 0x05
72 #define KSZ8863_LINKMD 0x1D
73 #define KSZ8863_PHYSCS 0x1F
74 
75 //KSZ8863 Switch registers
76 #define KSZ8863_CHIP_ID0 0x00
77 #define KSZ8863_CHIP_ID1 0x01
78 #define KSZ8863_GLOBAL_CTRL0 0x02
79 #define KSZ8863_GLOBAL_CTRL1 0x03
80 #define KSZ8863_GLOBAL_CTRL2 0x04
81 #define KSZ8863_GLOBAL_CTRL3 0x05
82 #define KSZ8863_GLOBAL_CTRL4 0x06
83 #define KSZ8863_GLOBAL_CTRL5 0x07
84 #define KSZ8863_GLOBAL_CTRL6 0x08
85 #define KSZ8863_GLOBAL_CTRL7 0x09
86 #define KSZ8863_GLOBAL_CTRL8 0x0A
87 #define KSZ8863_GLOBAL_CTRL9 0x0B
88 #define KSZ8863_GLOBAL_CTRL10 0x0C
89 #define KSZ8863_GLOBAL_CTRL11 0x0D
90 #define KSZ8863_GLOBAL_CTRL12 0x0E
91 #define KSZ8863_GLOBAL_CTRL13 0x0F
92 #define KSZ8863_PORT1_CTRL0 0x10
93 #define KSZ8863_PORT1_CTRL1 0x11
94 #define KSZ8863_PORT1_CTRL2 0x12
95 #define KSZ8863_PORT1_CTRL3 0x13
96 #define KSZ8863_PORT1_CTRL4 0x14
97 #define KSZ8863_PORT1_CTRL5 0x15
98 #define KSZ8863_PORT1_Q0_IG_LIMIT 0x16
99 #define KSZ8863_PORT1_Q1_IG_LIMIT 0x17
100 #define KSZ8863_PORT1_Q2_IG_LIMIT 0x18
101 #define KSZ8863_PORT1_Q3_IG_LIMIT 0x19
102 #define KSZ8863_PORT1_PSCS 0x1A
103 #define KSZ8863_PORT1_LINKMD 0x1B
104 #define KSZ8863_PORT1_CTRL12 0x1C
105 #define KSZ8863_PORT1_CTRL13 0x1D
106 #define KSZ8863_PORT1_STAT0 0x1E
107 #define KSZ8863_PORT1_STAT1 0x1F
108 #define KSZ8863_PORT2_CTRL0 0x20
109 #define KSZ8863_PORT2_CTRL1 0x21
110 #define KSZ8863_PORT2_CTRL2 0x22
111 #define KSZ8863_PORT2_CTRL3 0x23
112 #define KSZ8863_PORT2_CTRL4 0x24
113 #define KSZ8863_PORT2_CTRL5 0x25
114 #define KSZ8863_PORT2_Q0_IG_LIMIT 0x26
115 #define KSZ8863_PORT2_Q1_IG_LIMIT 0x27
116 #define KSZ8863_PORT2_Q2_IG_LIMIT 0x28
117 #define KSZ8863_PORT2_Q3_IG_LIMIT 0x29
118 #define KSZ8863_PORT2_PSCS 0x2A
119 #define KSZ8863_PORT2_LINKMD 0x2B
120 #define KSZ8863_PORT2_CTRL12 0x2C
121 #define KSZ8863_PORT2_CTRL13 0x2D
122 #define KSZ8863_PORT2_STAT0 0x2E
123 #define KSZ8863_PORT2_STAT1 0x2F
124 #define KSZ8863_PORT3_CTRL0 0x30
125 #define KSZ8863_PORT3_CTRL1 0x31
126 #define KSZ8863_PORT3_CTRL2 0x32
127 #define KSZ8863_PORT3_CTRL3 0x33
128 #define KSZ8863_PORT3_CTRL4 0x34
129 #define KSZ8863_PORT3_CTRL5 0x35
130 #define KSZ8863_PORT3_Q0_IG_LIMIT 0x36
131 #define KSZ8863_PORT3_Q1_IG_LIMIT 0x37
132 #define KSZ8863_PORT3_Q2_IG_LIMIT 0x38
133 #define KSZ8863_PORT3_Q3_IG_LIMIT 0x39
134 #define KSZ8863_PORT3_STAT0 0x3E
135 #define KSZ8863_PORT3_STAT1 0x3F
136 #define KSZ8863_RESET 0x43
137 #define KSZ8863_TOS_PRIO_CTRL0 0x60
138 #define KSZ8863_TOS_PRIO_CTRL1 0x61
139 #define KSZ8863_TOS_PRIO_CTRL2 0x62
140 #define KSZ8863_TOS_PRIO_CTRL3 0x63
141 #define KSZ8863_TOS_PRIO_CTRL4 0x64
142 #define KSZ8863_TOS_PRIO_CTRL5 0x65
143 #define KSZ8863_TOS_PRIO_CTRL6 0x66
144 #define KSZ8863_TOS_PRIO_CTRL7 0x67
145 #define KSZ8863_TOS_PRIO_CTRL8 0x68
146 #define KSZ8863_TOS_PRIO_CTRL9 0x69
147 #define KSZ8863_TOS_PRIO_CTRL10 0x6A
148 #define KSZ8863_TOS_PRIO_CTRL11 0x6B
149 #define KSZ8863_TOS_PRIO_CTRL12 0x6C
150 #define KSZ8863_TOS_PRIO_CTRL13 0x6D
151 #define KSZ8863_TOS_PRIO_CTRL14 0x6E
152 #define KSZ8863_TOS_PRIO_CTRL15 0x6F
153 #define KSZ8863_MAC_ADDR0 0x70
154 #define KSZ8863_MAC_ADDR1 0x71
155 #define KSZ8863_MAC_ADDR2 0x72
156 #define KSZ8863_MAC_ADDR3 0x73
157 #define KSZ8863_MAC_ADDR4 0x74
158 #define KSZ8863_MAC_ADDR5 0x75
159 #define KSZ8863_UDR1 0x76
160 #define KSZ8863_UDR2 0x77
161 #define KSZ8863_UDR3 0x78
162 #define KSZ8863_INDIRECT_CTRL0 0x79
163 #define KSZ8863_INDIRECT_CTRL1 0x7A
164 #define KSZ8863_INDIRECT_DATA8 0x7B
165 #define KSZ8863_INDIRECT_DATA7 0x7C
166 #define KSZ8863_INDIRECT_DATA6 0x7D
167 #define KSZ8863_INDIRECT_DATA5 0x7E
168 #define KSZ8863_INDIRECT_DATA4 0x7F
169 #define KSZ8863_INDIRECT_DATA3 0x80
170 #define KSZ8863_INDIRECT_DATA2 0x81
171 #define KSZ8863_INDIRECT_DATA1 0x82
172 #define KSZ8863_INDIRECT_DATA0 0x83
173 #define KSZ8863_MACA1 0x8E
174 #define KSZ8863_MACA2 0x94
175 #define KSZ8863_PORT1_Q0_EG_LIMIT 0x9A
176 #define KSZ8863_PORT1_Q1_EG_LIMIT 0x9B
177 #define KSZ8863_PORT1_Q2_EG_LIMIT 0x9C
178 #define KSZ8863_PORT1_Q3_EG_LIMIT 0x9D
179 #define KSZ8863_PORT2_Q0_EG_LIMIT 0x9E
180 #define KSZ8863_PORT2_Q1_EG_LIMIT 0x9F
181 #define KSZ8863_PORT2_Q2_EG_LIMIT 0xA0
182 #define KSZ8863_PORT2_Q3_EG_LIMIT 0xA1
183 #define KSZ8863_PORT3_Q0_EG_LIMIT 0xA2
184 #define KSZ8863_PORT3_Q1_EG_LIMIT 0xA3
185 #define KSZ8863_PORT3_Q2_EG_LIMIT 0xA4
186 #define KSZ8863_PORT3_Q3_EG_LIMIT 0xA5
187 #define KSZ8863_MODE_INDICATOR 0xA6
188 #define KSZ8863_HIGH_PRIO_PKT_BUF_Q3 0xA7
189 #define KSZ8863_HIGH_PRIO_PKT_BUF_Q2 0xA8
190 #define KSZ8863_HIGH_PRIO_PKT_BUF_Q1 0xA9
191 #define KSZ8863_HIGH_PRIO_PKT_BUF_Q0 0xAA
192 #define KSZ8863_PM_USAGE_FLOW_CTRL_SEL_MODE1 0xAB
193 #define KSZ8863_PM_USAGE_FLOW_CTRL_SEL_MODE2 0xAC
194 #define KSZ8863_PM_USAGE_FLOW_CTRL_SEL_MODE3 0xAD
195 #define KSZ8863_PM_USAGE_FLOW_CTRL_SEL_MODE4 0xAE
196 #define KSZ8863_PORT1_Q3_TXQ_SPLIT 0xAF
197 #define KSZ8863_PORT1_Q2_TXQ_SPLIT 0xB0
198 #define KSZ8863_PORT1_Q1_TXQ_SPLIT 0xB1
199 #define KSZ8863_PORT1_Q0_TXQ_SPLIT 0xB2
200 #define KSZ8863_PORT2_Q3_TXQ_SPLIT 0xB3
201 #define KSZ8863_PORT2_Q2_TXQ_SPLIT 0xB4
202 #define KSZ8863_PORT2_Q1_TXQ_SPLIT 0xB5
203 #define KSZ8863_PORT2_Q0_TXQ_SPLIT 0xB6
204 #define KSZ8863_PORT3_Q3_TXQ_SPLIT 0xB7
205 #define KSZ8863_PORT3_Q2_TXQ_SPLIT 0xB8
206 #define KSZ8863_PORT3_Q1_TXQ_SPLIT 0xB9
207 #define KSZ8863_PORT3_Q0_TXQ_SPLIT 0xBA
208 #define KSZ8863_INT_EN 0xBB
209 #define KSZ8863_LINK_CHANGE_INT 0xBC
210 #define KSZ8863_FORCE_PAUSE_OFF_LIMIT_EN 0xBD
211 #define KSZ8863_FIBER_SIGNAL_THRESHOLD 0xC0
212 #define KSZ8863_INTERNAL_LDO_CTRL 0xC1
213 #define KSZ8863_INSERT_SRC_PVID 0xC2
214 #define KSZ8863_PWR_MGMT_LED_MODE 0xC3
215 #define KSZ8863_SLEEP_MODE 0xC4
216 #define KSZ8863_FWD_INVALID_VID_HOST_MODE 0xC6
217 
218 //KSZ8863 Switch register access macros
219 #define KSZ8863_PORTn_CTRL0(port) (0x00 + ((port) * 0x10))
220 #define KSZ8863_PORTn_CTRL1(port) (0x01 + ((port) * 0x10))
221 #define KSZ8863_PORTn_CTRL2(port) (0x02 + ((port) * 0x10))
222 #define KSZ8863_PORTn_CTRL3(port) (0x03 + ((port) * 0x10))
223 #define KSZ8863_PORTn_CTRL4(port) (0x04 + ((port) * 0x10))
224 #define KSZ8863_PORTn_CTRL5(port) (0x05 + ((port) * 0x10))
225 #define KSZ8863_PORTn_Q0_IG_LIMIT(port) (0x06 + ((port) * 0x10))
226 #define KSZ8863_PORTn_Q1_IG_LIMIT(port) (0x07 + ((port) * 0x10))
227 #define KSZ8863_PORTn_Q2_IG_LIMIT(port) (0x08 + ((port) * 0x10))
228 #define KSZ8863_PORTn_Q3_IG_LIMIT(port) (0x09 + ((port) * 0x10))
229 #define KSZ8863_PORTn_PSCS(port) (0x0A + ((port) * 0x10))
230 #define KSZ8863_PORTn_LINKMD(port) (0x0B + ((port) * 0x10))
231 #define KSZ8863_PORTn_CTRL12(port) (0x0C + ((port) * 0x10))
232 #define KSZ8863_PORTn_CTRL13(port) (0x0D + ((port) * 0x10))
233 #define KSZ8863_PORTn_STAT0(port) (0x0E + ((port) * 0x10))
234 #define KSZ8863_PORTn_STAT1(port) (0x0F + ((port) * 0x10))
235 #define KSZ8863_PORTn_Q0_EG_LIMIT(port) (0x96 + ((port) * 0x04))
236 #define KSZ8863_PORTn_Q1_EG_LIMIT(port) (0x97 + ((port) * 0x04))
237 #define KSZ8863_PORTn_Q2_EG_LIMIT(port) (0x98 + ((port) * 0x04))
238 #define KSZ8863_PORTn_Q3_EG_LIMIT(port) (0x99 + ((port) * 0x04))
239 #define KSZ8863_PORTn_Q3_TXQ_SPLIT(port) (0xAB + ((port) * 0x04))
240 #define KSZ8863_PORTn_Q2_TXQ_SPLIT(port) (0xAC + ((port) * 0x04))
241 #define KSZ8863_PORTn_Q1_TXQ_SPLIT(port) (0xAD + ((port) * 0x04))
242 #define KSZ8863_PORTn_Q0_TXQ_SPLIT(port) (0xAE + ((port) * 0x04))
243 
244 //MII Basic Control register
245 #define KSZ8863_BMCR_RESET 0x8000
246 #define KSZ8863_BMCR_LOOPBACK 0x4000
247 #define KSZ8863_BMCR_FORCE_100 0x2000
248 #define KSZ8863_BMCR_AN_EN 0x1000
249 #define KSZ8863_BMCR_POWER_DOWN 0x0800
250 #define KSZ8863_BMCR_ISOLATE 0x0400
251 #define KSZ8863_BMCR_RESTART_AN 0x0200
252 #define KSZ8863_BMCR_FORCE_FULL_DUPLEX 0x0100
253 #define KSZ8863_BMCR_COL_TEST 0x0080
254 #define KSZ8863_BMCR_HP_MDIX 0x0020
255 #define KSZ8863_BMCR_FORCE_MDI 0x0010
256 #define KSZ8863_BMCR_AUTO_MDIX_DIS 0x0008
257 #define KSZ8863_BMCR_FAR_END_FAULT_DIS 0x0004
258 #define KSZ8863_BMCR_TRANSMIT_DIS 0x0002
259 #define KSZ8863_BMCR_LED_DIS 0x0001
260 
261 //MII Basic Status register
262 #define KSZ8863_BMSR_100BT4 0x8000
263 #define KSZ8863_BMSR_100BTX_FD 0x4000
264 #define KSZ8863_BMSR_100BTX_HD 0x2000
265 #define KSZ8863_BMSR_10BT_FD 0x1000
266 #define KSZ8863_BMSR_10BT_HD 0x0800
267 #define KSZ8863_BMSR_PREAMBLE_SUPPR 0x0040
268 #define KSZ8863_BMSR_AN_COMPLETE 0x0020
269 #define KSZ8863_BMSR_FAR_END_FAULT 0x0010
270 #define KSZ8863_BMSR_AN_CAPABLE 0x0008
271 #define KSZ8863_BMSR_LINK_STATUS 0x0004
272 #define KSZ8863_BMSR_JABBER_TEST 0x0002
273 #define KSZ8863_BMSR_EXTENDED_CAPABLE 0x0001
274 
275 //PHYID High register
276 #define KSZ8863_PHYID1_DEFAULT 0x0022
277 
278 //PHYID Low register
279 #define KSZ8863_PHYID2_DEFAULT 0x1430
280 
281 //Auto-Negotiation Advertisement Ability register
282 #define KSZ8863_ANAR_NEXT_PAGE 0x8000
283 #define KSZ8863_ANAR_REMOTE_FAULT 0x2000
284 #define KSZ8863_ANAR_PAUSE 0x0400
285 #define KSZ8863_ANAR_100BTX_FD 0x0100
286 #define KSZ8863_ANAR_100BTX_HD 0x0080
287 #define KSZ8863_ANAR_10BT_FD 0x0040
288 #define KSZ8863_ANAR_10BT_HD 0x0020
289 #define KSZ8863_ANAR_SELECTOR 0x001F
290 #define KSZ8863_ANAR_SELECTOR_DEFAULT 0x0001
291 
292 //Auto-Negotiation Link Partner Ability register
293 #define KSZ8863_ANLPAR_NEXT_PAGE 0x8000
294 #define KSZ8863_ANLPAR_LP_ACK 0x4000
295 #define KSZ8863_ANLPAR_REMOTE_FAULT 0x2000
296 #define KSZ8863_ANLPAR_PAUSE 0x0400
297 #define KSZ8863_ANLPAR_100BTX_FD 0x0100
298 #define KSZ8863_ANLPAR_100BTX_HD 0x0080
299 #define KSZ8863_ANLPAR_10BT_FD 0x0040
300 #define KSZ8863_ANLPAR_10BT_HD 0x0020
301 
302 //LinkMD Control/Status register
303 #define KSZ8863_LINKMD_TEST_EN 0x8000
304 #define KSZ8863_LINKMD_RESULT 0x6000
305 #define KSZ8863_LINKMD_SHORT 0x1000
306 #define KSZ8863_LINKMD_FAULT_COUNT 0x01FF
307 
308 //PHY Special Control/Status register
309 #define KSZ8863_PHYSCS_OP_MODE 0x0700
310 #define KSZ8863_PHYSCS_OP_MODE_AN 0x0100
311 #define KSZ8863_PHYSCS_OP_MODE_10BT_HD 0x0200
312 #define KSZ8863_PHYSCS_OP_MODE_100BTX_HD 0x0300
313 #define KSZ8863_PHYSCS_OP_MODE_10BT_FD 0x0500
314 #define KSZ8863_PHYSCS_OP_MODE_100BTX_FD 0x0600
315 #define KSZ8863_PHYSCS_OP_MODE_ISOLATE 0x0700
316 #define KSZ8863_PHYSCS_POLRVS 0x0020
317 #define KSZ8863_PHYSCS_MDIX_STATUS 0x0010
318 #define KSZ8863_PHYSCS_FORCE_LINK 0x0008
319 #define KSZ8863_PHYSCS_PWRSAVE 0x0004
320 #define KSZ8863_PHYSCS_REMOTE_LOOPBACK 0x0002
321 
322 //Chip ID0 register
323 #define KSZ8863_CHIP_ID0_FAMILY_ID 0xFF
324 #define KSZ8863_CHIP_ID0_FAMILY_ID_DEFAULT 0x88
325 
326 //Chip ID1 / Start Switch register
327 #define KSZ8863_CHIP_ID1_CHIP_ID 0xF0
328 #define KSZ8863_CHIP_ID1_CHIP_ID_DEFAULT 0x30
329 #define KSZ8863_CHIP_ID1_REVISION_ID 0x0E
330 #define KSZ8863_CHIP_ID1_START_SWITCH 0x01
331 
332 //Global Control 0 register
333 #define KSZ8863_GLOBAL_CTRL0_NEW_BACK_OFF_EN 0x80
334 #define KSZ8863_GLOBAL_CTRL0_FLUSH_DYNAMIC_MAC_TABLE 0x20
335 #define KSZ8863_GLOBAL_CTRL0_FLUSH_STATIC_MAC_TABLE 0x10
336 #define KSZ8863_GLOBAL_CTRL0_PASS_FLOW_CTRL_PKT 0x08
337 
338 //Global Control 1 register
339 #define KSZ8863_GLOBAL_CTRL1_PASS_ALL_FRAMES 0x80
340 #define KSZ8863_GLOBAL_CTRL1_TAIL_TAG_EN 0x40
341 #define KSZ8863_GLOBAL_CTRL1_TX_FLOW_CTRL_EN 0x20
342 #define KSZ8863_GLOBAL_CTRL1_RX_FLOW_CTRL_EN 0x10
343 #define KSZ8863_GLOBAL_CTRL1_FRAME_LEN_CHECK_EN 0x08
344 #define KSZ8863_GLOBAL_CTRL1_AGING_EN 0x04
345 #define KSZ8863_GLOBAL_CTRL1_FAST_AGE_EN 0x02
346 #define KSZ8863_GLOBAL_CTRL1_AGGRESSIVE_BACK_OFF_EN 0x01
347 
348 //Global Control 2 register
349 #define KSZ8863_GLOBAL_CTRL2_UNI_VLAN_MISMATCH_DISCARD 0x80
350 #define KSZ8863_GLOBAL_CTRL2_MCAST_STORM_PROTECT_DIS 0x40
351 #define KSZ8863_GLOBAL_CTRL2_BACK_PRESSURE_MODE 0x20
352 #define KSZ8863_GLOBAL_CTRL2_FLOW_CTRL_FAIR_MODE 0x10
353 #define KSZ8863_GLOBAL_CTRL2_NO_EXCESSIVE_COL_DROP 0x08
354 #define KSZ8863_GLOBAL_CTRL2_HUGE_PKT_SUPPORT 0x04
355 #define KSZ8863_GLOBAL_CTRL2_MAX_PKT_SIZE_CHECK_EN 0x02
356 
357 //Global Control 3 register
358 #define KSZ8863_GLOBAL_CTRL3_VLAN_EN 0x80
359 #define KSZ8863_GLOBAL_CTRL3_IGMP_SNOOP_EN 0x40
360 #define KSZ8863_GLOBAL_CTRL3_WEIGHTED_FAIR_QUEUE_EN 0x08
361 #define KSZ8863_GLOBAL_CTRL3_SNIFF_MODE_SEL 0x01
362 
363 //Global Control 4 register
364 #define KSZ8863_GLOBAL_CTRL4_SW_MII_HALF_DUPLEX_MODE 0x40
365 #define KSZ8863_GLOBAL_CTRL4_SW_MII_FLOW_CTRL_EN 0x20
366 #define KSZ8863_GLOBAL_CTRL4_SW_MII_10BT 0x10
367 #define KSZ8863_GLOBAL_CTRL4_NULL_VID_REPLACEMENT 0x08
368 #define KSZ8863_GLOBAL_CTRL4_BCAST_STORM_PROTECT_RATE_MSB 0x07
369 
370 //Global Control 5 register
371 #define KSZ8863_GLOBAL_CTRL5_BCAST_STORM_PROTECT_RATE_LSB 0xFF
372 
373 //Global Control 6 register
374 #define KSZ8863_GLOBAL_CTRL6_FACTORY_TESTING 0xFF
375 
376 //Global Control 7 register
377 #define KSZ8863_GLOBAL_CTRL7_FACTORY_TESTING 0xFF
378 
379 //Global Control 8 register
380 #define KSZ8863_GLOBAL_CTRL8_FACTORY_TESTING 0xFF
381 
382 //Global Control 9 register
383 #define KSZ8863_GLOBAL_CTRL9_CPU_IF_CLK_SEL 0xC0
384 #define KSZ8863_GLOBAL_CTRL9_CPU_IF_CLK_SEL_31_25MHZ 0x00
385 #define KSZ8863_GLOBAL_CTRL9_CPU_IF_CLK_SEL_62_5MHZ 0x40
386 #define KSZ8863_GLOBAL_CTRL9_CPU_IF_CLK_SEL_125MHZ 0x80
387 
388 //Global Control 10 register
389 #define KSZ8863_GLOBAL_CTRL10_TAG3 0xC0
390 #define KSZ8863_GLOBAL_CTRL10_TAG2 0x30
391 #define KSZ8863_GLOBAL_CTRL10_TAG1 0x0C
392 #define KSZ8863_GLOBAL_CTRL10_TAG0 0x03
393 
394 //Global Control 11 register
395 #define KSZ8863_GLOBAL_CTRL11_TAG7 0xC0
396 #define KSZ8863_GLOBAL_CTRL11_TAG6 0x30
397 #define KSZ8863_GLOBAL_CTRL11_TAG5 0x0C
398 #define KSZ8863_GLOBAL_CTRL11_TAG4 0x03
399 
400 //Global Control 12 register
401 #define KSZ8863_GLOBAL_CTRL12_UNKNOWN_PKT_DEFAULT_PORT_EN 0x80
402 #define KSZ8863_GLOBAL_CTRL12_DRIVER_STRENGTH 0x40
403 #define KSZ8863_GLOBAL_CTRL12_DRIVER_STRENGTH_8MA 0x00
404 #define KSZ8863_GLOBAL_CTRL12_DRIVER_STRENGTH_16MA 0x40
405 #define KSZ8863_GLOBAL_CTRL12_UNKNOWN_PKT_DEFAULT_PORT 0x07
406 #define KSZ8863_GLOBAL_CTRL12_UNKNOWN_PKT_DEFAULT_PORT_PORT1 0x01
407 #define KSZ8863_GLOBAL_CTRL12_UNKNOWN_PKT_DEFAULT_PORT_PORT2 0x02
408 #define KSZ8863_GLOBAL_CTRL12_UNKNOWN_PKT_DEFAULT_PORT_PORT3 0x04
409 
410 //Global Control 13 register
411 #define KSZ8863_GLOBAL_CTRL13_PHY_ADDR 0xF8
412 
413 //Port N Control 0 register
414 #define KSZ8863_PORTn_CTRL0_BCAST_STORM_PROTECT_EN 0x80
415 #define KSZ8863_PORTn_CTRL0_DIFFSERV_PRIO_CLASS_EN 0x40
416 #define KSZ8863_PORTn_CTRL0_802_1P_PRIO_CLASS_EN 0x20
417 #define KSZ8863_PORTn_CTRL0_PORT_PRIO_CLASS_EN 0x18
418 #define KSZ8863_PORTn_CTRL0_TAG_INSERTION 0x04
419 #define KSZ8863_PORTn_CTRL0_TAG_REMOVAL 0x02
420 #define KSZ8863_PORTn_CTRL0_TXQ_SPLIT_EN 0x01
421 
422 //Port N Control 1 register
423 #define KSZ8863_PORTn_CTRL1_SNIFFER_PORT 0x80
424 #define KSZ8863_PORTn_CTRL1_RECEIVE_SNIFF 0x40
425 #define KSZ8863_PORTn_CTRL1_TRANSMIT_SNIFF 0x20
426 #define KSZ8863_PORTn_CTRL1_DOUBLE_TAG 0x10
427 #define KSZ8863_PORTn_CTRL1_USER_PRIO_CEILING 0x08
428 #define KSZ8863_PORTn_CTRL1_PORT_VLAN_MEMBERSHIP 0x07
429 
430 //Port N Control 2 register
431 #define KSZ8863_PORTn_CTRL2_TWO_QUEUE_SPLIT_EN 0x80
432 #define KSZ8863_PORTn_CTRL2_INGRESS_VLAN_FILT 0x40
433 #define KSZ8863_PORTn_CTRL2_DISCARD_NON_PVID_PKT 0x20
434 #define KSZ8863_PORTn_CTRL2_FORCE_FLOW_CTRL 0x10
435 #define KSZ8863_PORTn_CTRL2_BACK_PRESSURE_EN 0x08
436 #define KSZ8863_PORTn_CTRL2_TRANSMIT_EN 0x04
437 #define KSZ8863_PORTn_CTRL2_RECEIVE_EN 0x02
438 #define KSZ8863_PORTn_CTRL2_LEARNING_DIS 0x01
439 
440 //Port N Control 3 register
441 #define KSZ8863_PORTn_CTRL3_DEFAULT_USER_PRIO 0xE0
442 #define KSZ8863_PORTn_CTRL3_DEFAULT_CFI 0x10
443 #define KSZ8863_PORTn_CTRL3_DEFAULT_VID_MSB 0x0F
444 
445 //Port N Control 4 register
446 #define KSZ8863_PORTn_CTRL4_DEFAULT_VID_LSB 0xFF
447 
448 //Port N Control 5 register
449 #define KSZ8863_PORTn_CTRL5_PORT3_MII_MODE_SEL 0x80
450 #define KSZ8863_PORTn_CTRL5_PORT3_MII_MODE_SEL_PHY 0x00
451 #define KSZ8863_PORTn_CTRL5_PORT3_MII_MODE_SEL_MAC 0x80
452 #define KSZ8863_PORTn_CTRL5_SELF_ADDR_FILTER_EN_MACA1 0x40
453 #define KSZ8863_PORTn_CTRL5_SELF_ADDR_FILTER_EN_MACA2 0x20
454 #define KSZ8863_PORTn_CTRL5_DROP_IG_TAGGED_FRAME 0x10
455 #define KSZ8863_PORTn_CTRL5_LIMIT_MODE 0x0C
456 #define KSZ8863_PORTn_CTRL5_COUNT_IFG 0x02
457 #define KSZ8863_PORTn_CTRL5_COUNT_PRE 0x01
458 
459 //Port 3 Q0 Ingress Data Rate Limit register
460 #define KSZ8863_PORTn_Q0_IG_LIMIT_RMII_REFCLK_INVERT 0x80
461 #define KSZ8863_PORTn_Q0_IG_LIMIT_Q0_IG_DATA_RATE_LIMIT 0x7F
462 
463 //Port 3 Q1 Ingress Data Rate Limit register
464 #define KSZ8863_PORTn_Q1_IG_LIMIT_Q1_IG_DATA_RATE_LIMIT 0x7F
465 
466 //Port 3 Q2 Ingress Data Rate Limit register
467 #define KSZ8863_PORTn_Q2_IG_LIMIT_Q2_IG_DATA_RATE_LIMIT 0x7F
468 
469 //Port 3 Q3 Ingress Data Rate Limit register
470 #define KSZ8863_PORTn_Q3_IG_LIMIT_Q3_IG_DATA_RATE_LIMIT 0x7F
471 
472 //Port N PHY Special Control/Status register
473 #define KSZ8863_PORTn_PSCS_VCT_10M_SHORT 0x80
474 #define KSZ8863_PORTn_PSCS_VCT_RESULT 0x60
475 #define KSZ8863_PORTn_PSCS_VCT_EN 0x10
476 #define KSZ8863_PORTn_PSCS_FORCE_LNK 0x08
477 #define KSZ8863_PORTn_PSCS_REMOTE_LOOPBACK 0x02
478 #define KSZ8863_PORTn_PSCS_VCT_FAULT_COUNT_MSB 0x01
479 
480 //Port N LinkMD Result register
481 #define KSZ8863_PORTn_LINKMD_VCT_FAULT_COUNT_LSB 0xFF
482 
483 //Port N Control 12 register
484 #define KSZ8863_PORTn_CTRL12_AN_EN 0x80
485 #define KSZ8863_PORTn_CTRL12_FORCE_SPEED 0x40
486 #define KSZ8863_PORTn_CTRL12_FORCE_DUPLEX 0x20
487 #define KSZ8863_PORTn_CTRL12_ADV_FLOW_CTRL 0x10
488 #define KSZ8863_PORTn_CTRL12_ADV_100BT_FD 0x08
489 #define KSZ8863_PORTn_CTRL12_ADV_100BT_HD 0x04
490 #define KSZ8863_PORTn_CTRL12_ADV_10BT_FD 0x02
491 #define KSZ8863_PORTn_CTRL12_ADV_10BT_HD 0x01
492 
493 //Port N Control 13 register
494 #define KSZ8863_PORTn_CTRL13_LED_OFF 0x80
495 #define KSZ8863_PORTn_CTRL13_TX_DIS 0x40
496 #define KSZ8863_PORTn_CTRL13_RESTART_AN 0x20
497 #define KSZ8863_PORTn_CTRL13_FAR_END_FAULT_DIS 0x10
498 #define KSZ8863_PORTn_CTRL13_POWER_DOWN 0x08
499 #define KSZ8863_PORTn_CTRL13_AUTO_MDIX_DIS 0x04
500 #define KSZ8863_PORTn_CTRL13_FORCE_MDI 0x02
501 #define KSZ8863_PORTn_CTRL13_LOOPBACK 0x01
502 
503 //Port N Status 0 register
504 #define KSZ8863_PORTn_STAT0_MDIX_STATUS 0x80
505 #define KSZ8863_PORTn_STAT0_AN_DONE 0x40
506 #define KSZ8863_PORTn_STAT0_LINK_GOOD 0x20
507 #define KSZ8863_PORTn_STAT0_LP_FLOW_CTRL_CAPABLE 0x10
508 #define KSZ8863_PORTn_STAT0_LP_100BTX_FD_CAPABLE 0x08
509 #define KSZ8863_PORTn_STAT0_LP_100BTX_HF_CAPABLE 0x04
510 #define KSZ8863_PORTn_STAT0_LP_10BT_FD_CAPABLE 0x02
511 #define KSZ8863_PORTn_STAT0_LP_10BT_HD_CAPABLE 0x01
512 
513 //Port N Status 1 register
514 #define KSZ8863_PORTn_STAT1_HP_MDIX 0x80
515 #define KSZ8863_PORTn_STAT1_POLRVS 0x20
516 #define KSZ8863_PORTn_STAT1_TX_FLOW_CTRL_EN 0x10
517 #define KSZ8863_PORTn_STAT1_RX_FLOW_CTRL_EN 0x08
518 #define KSZ8863_PORTn_STAT1_OP_SPEED 0x04
519 #define KSZ8863_PORTn_STAT1_OP_DUPLEX 0x02
520 #define KSZ8863_PORTn_STAT1_FAR_END_FAULT 0x01
521 
522 //Reset register
523 #define KSZ8863_RESET_SOFT_RESET 0x10
524 #define KSZ8863_RESET_PCS_RESET 0x01
525 
526 //Indirect Access Control 0 register
527 #define KSZ8863_INDIRECT_CTRL0_WRITE 0x00
528 #define KSZ8863_INDIRECT_CTRL0_READ 0x10
529 #define KSZ8863_INDIRECT_CTRL0_TABLE_SEL 0x0C
530 #define KSZ8863_INDIRECT_CTRL0_TABLE_SEL_STATIC_MAC 0x00
531 #define KSZ8863_INDIRECT_CTRL0_TABLE_SEL_VLAN 0x04
532 #define KSZ8863_INDIRECT_CTRL0_TABLE_SEL_DYNAMIC_MAC 0x08
533 #define KSZ8863_INDIRECT_CTRL0_TABLE_SEL_MIB_COUNTER 0x0C
534 #define KSZ8863_INDIRECT_CTRL0_ADDR_H 0x03
535 
536 //Indirect Access Control 1 register
537 #define KSZ8863_INDIRECT_CTRL1_ADDR_L 0xFF
538 
539 //Indirect Data 8 register
540 #define KSZ8863_INDIRECT_DATA8_CPU_READ_STATUS 0x80
541 #define KSZ8863_INDIRECT_DATA8_DATA 0x07
542 
543 //KSZ8863 Mode Indicator register
544 #define KSZ8863_MODE_INDICATOR_FLL 0x41
545 #define KSZ8863_MODE_INDICATOR_MLL 0x43
546 #define KSZ8863_MODE_INDICATOR_RLL 0x53
547 
548 //TXQ Split for Q3 in Port N register
549 #define KSZ8863_PORTn_Q3_TXQ_SPLIT_PRIORITY_SEL 0x80
550 
551 //TXQ Split for Q2 in Port N register
552 #define KSZ8863_PORTn_Q2_TXQ_SPLIT_PRIORITY_SEL 0x80
553 
554 //TXQ Split for Q1 in Port N register
555 #define KSZ8863_PORTn_Q1_TXQ_SPLIT_PRIORITY_SEL 0x80
556 
557 //TXQ Split for Q0 in Port N register
558 #define KSZ8863_PORTn_Q0_TXQ_SPLIT_PRIORITY_SEL 0x80
559 
560 //Interrupt Enable register
561 #define KSZ8863_INT_EN_P1_OR_P2_LC_INT 0x80
562 #define KSZ8863_INT_EN_P3_LC_INT 0x04
563 #define KSZ8863_INT_EN_P2_LC_INT 0x02
564 #define KSZ8863_INT_EN_P1_LC_INT 0x01
565 
566 //Link Change Interrupt register
567 #define KSZ8863_LINK_CHANGE_INT_P1_OR_P2_LC_INT 0x80
568 #define KSZ8863_LINK_CHANGE_INT_P3_LC_INT 0x04
569 #define KSZ8863_LINK_CHANGE_INT_P2_LC_INT 0x02
570 #define KSZ8863_LINK_CHANGE_INT_P1_LC_INT 0x01
571 
572 //Fiber Signal Threshold register
573 #define KSZ8863_FIBER_SIGNAL_THRESHOLD_P2_THRESHOLD 0x80
574 #define KSZ8863_FIBER_SIGNAL_THRESHOLD_P2_THRESHOLD_1_2V 0x00
575 #define KSZ8863_FIBER_SIGNAL_THRESHOLD_P2_THRESHOLD_2_0V 0x80
576 #define KSZ8863_FIBER_SIGNAL_THRESHOLD_P1_THRESHOLD 0x40
577 #define KSZ8863_FIBER_SIGNAL_THRESHOLD_P1_THRESHOLD_1_2V 0x00
578 #define KSZ8863_FIBER_SIGNAL_THRESHOLD_P1_THRESHOLD_2_0V 0x40
579 
580 //Internal 1.8V LDO Control register
581 #define KSZ8863_INTERNAL_LDO_CTRL_INTERNAL_LDO_DIS 0x40
582 
583 //Insert SRC PVID register
584 #define KSZ8863_INSERT_SRC_PVID_INSERT_SRC_P1_PVID_AT_P2 0x20
585 #define KSZ8863_INSERT_SRC_PVID_INSERT_SRC_P1_PVID_AT_P3 0x10
586 #define KSZ8863_INSERT_SRC_PVID_INSERT_SRC_P2_PVID_AT_P1 0x08
587 #define KSZ8863_INSERT_SRC_PVID_INSERT_SRC_P2_PVID_AT_P3 0x04
588 #define KSZ8863_INSERT_SRC_PVID_INSERT_SRC_P3_PVID_AT_P1 0x02
589 #define KSZ8863_INSERT_SRC_PVID_INSERT_SRC_P3_PVID_AT_P2 0x01
590 
591 //Power Management and LED Mode register
592 #define KSZ8863_PWR_MGMT_LED_MODE_CPU_IF_POWER_DOWN 0x80
593 #define KSZ8863_PWR_MGMT_LED_MODE_SWITCH_POWER_DOWN 0x40
594 #define KSZ8863_PWR_MGMT_LED_MODE_LED_MODE 0x30
595 #define KSZ8863_PWR_MGMT_LED_MODE_LED_MODE_LED0_LNK_ACT_LED1_SPD 0x00
596 #define KSZ8863_PWR_MGMT_LED_MODE_LED_MODE_LED0_LNK_LED1_ACT 0x10
597 #define KSZ8863_PWR_MGMT_LED_MODE_LED_MODE_LED0_LNK_ACT_LED1_DPLX 0x20
598 #define KSZ8863_PWR_MGMT_LED_MODE_LED_MODE_LED0_LNK_LED1_DPLX 0x30
599 #define KSZ8863_PWR_MGMT_LED_MODE_LED_OUT_MODE 0x08
600 #define KSZ8863_PWR_MGMT_LED_MODE_PLL_OFF_EN 0x04
601 #define KSZ8863_PWR_MGMT_LED_MODE_POWER_MGMT_MODE 0x03
602 
603 //Forward Invalid VID Frame and Host Mode register
604 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_FWD_INVALID_VID_FRAME 0x70
605 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_P3_RMII_CLK_SEL 0x08
606 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_P3_RMII_CLK_SEL_EXTERNAL 0x00
607 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_P3_RMII_CLK_SEL_INTERNAL 0x08
608 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_P1_RMII_CLK_SEL 0x04
609 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_P1_RMII_CLK_SEL_EXTERNAL 0x00
610 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_P1_RMII_CLK_SEL_INTERNAL 0x04
611 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_HOST_MODE 0x03
612 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_HOST_MODE_I2C_MASTER 0x00
613 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_HOST_MODE_I2C_SLAVE 0x01
614 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_HOST_MODE_SPI_SLAVE 0x02
615 #define KSZ8863_FWD_INVALID_VID_HOST_MODE_HOST_MODE_SMI 0x03
616 
617 //C++ guard
618 #ifdef __cplusplus
619 extern "C" {
620 #endif
621 
622 //CC-RX, CodeWarrior or Win32 compiler?
623 #if defined(__CCRX__)
624  #pragma pack
625 #elif defined(__CWCC__) || defined(_WIN32)
626  #pragma pack(push, 1)
627 #endif
628 
629 
630 /**
631  * @brief Static MAC table entry
632  **/
633 
634 typedef struct
635 {
636 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
637  uint8_t reserved : 6; //0
638  uint8_t fidH : 2;
639  uint8_t fidL : 2; //1
640  uint8_t useFid : 1;
641  uint8_t override : 1;
642  uint8_t valid : 1;
643  uint8_t forwardPorts : 3;
644 #else
645  uint8_t fidH : 2; //0
646  uint8_t reserved : 6;
647  uint8_t forwardPorts : 3; //1
648  uint8_t valid : 1;
649  uint8_t override : 1;
650  uint8_t useFid : 1;
651  uint8_t fidL : 2;
652 #endif
655 
656 
657 /**
658  * @brief Dynamic MAC table entry
659  **/
660 
661 typedef struct
662 {
663 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
664  uint8_t dataNotReady : 1; //0
665  uint8_t reserved : 4;
666  uint8_t macEmpty : 1;
667  uint8_t numValidEntriesH : 2;
668  uint8_t numValidEntriesL; //1
669  uint8_t timestamp : 2; //2
670  uint8_t sourcePort : 2;
671  uint8_t fid : 4;
672 #else
673  uint8_t numValidEntriesH : 2; //0
674  uint8_t macEmpty : 1;
675  uint8_t reserved : 4;
676  uint8_t dataNotReady : 1;
677  uint8_t numValidEntriesL; //1
678  uint8_t fid : 4; //2
679  uint8_t sourcePort : 2;
680  uint8_t timestamp : 2;
681 #endif
684 
685 
686 //CC-RX, CodeWarrior or Win32 compiler?
687 #if defined(__CCRX__)
688  #pragma unpack
689 #elif defined(__CWCC__) || defined(_WIN32)
690  #pragma pack(pop)
691 #endif
692 
693 //KSZ8863 Ethernet switch driver
694 extern const SwitchDriver ksz8863SwitchDriver;
695 
696 //KSZ8863 related functions
697 error_t ksz8863Init(NetInterface *interface);
698 void ksz8863InitHook(NetInterface *interface);
699 
700 void ksz8863Tick(NetInterface *interface);
701 
702 void ksz8863EnableIrq(NetInterface *interface);
703 void ksz8863DisableIrq(NetInterface *interface);
704 
705 void ksz8863EventHandler(NetInterface *interface);
706 
707 error_t ksz8863TagFrame(NetInterface *interface, NetBuffer *buffer,
708  size_t *offset, NetTxAncillary *ancillary);
709 
710 error_t ksz8863UntagFrame(NetInterface *interface, uint8_t **frame,
711  size_t *length, NetRxAncillary *ancillary);
712 
713 bool_t ksz8863GetLinkState(NetInterface *interface, uint8_t port);
714 uint32_t ksz8863GetLinkSpeed(NetInterface *interface, uint8_t port);
716 
717 void ksz8863SetPortState(NetInterface *interface, uint8_t port,
718  SwitchPortState state);
719 
721 
722 void ksz8863SetAgingTime(NetInterface *interface, uint32_t agingTime);
723 
724 void ksz8863EnableIgmpSnooping(NetInterface *interface, bool_t enable);
725 void ksz8863EnableMldSnooping(NetInterface *interface, bool_t enable);
726 void ksz8863EnableRsvdMcastTable(NetInterface *interface, bool_t enable);
727 
729  const SwitchFdbEntry *entry);
730 
732  const SwitchFdbEntry *entry);
733 
735  SwitchFdbEntry *entry);
736 
738 
740  SwitchFdbEntry *entry);
741 
742 void ksz8863FlushDynamicFdbTable(NetInterface *interface, uint8_t port);
743 
745  bool_t enable, uint32_t forwardPorts);
746 
747 void ksz8863WritePhyReg(NetInterface *interface, uint8_t port,
748  uint8_t address, uint16_t data);
749 
750 uint16_t ksz8863ReadPhyReg(NetInterface *interface, uint8_t port,
751  uint8_t address);
752 
753 void ksz8863DumpPhyReg(NetInterface *interface, uint8_t port);
754 
755 void ksz8863WriteSwitchReg(NetInterface *interface, uint8_t address,
756  uint8_t data);
757 
758 uint8_t ksz8863ReadSwitchReg(NetInterface *interface, uint8_t address);
759 
760 void ksz8863DumpSwitchReg(NetInterface *interface);
761 
762 //C++ guard
763 #ifdef __cplusplus
764 }
765 #endif
766 
767 #endif
unsigned int uint_t
Definition: compiler_port.h:50
int bool_t
Definition: compiler_port.h:53
uint16_t port
Definition: dns_common.h:267
error_t
Error codes.
Definition: error.h:43
uint8_t data[]
Definition: ethernet.h:222
MacAddr
Definition: ethernet.h:195
uint8_t reserved
Definition: ipv4.h:312
Ipv6Addr address[]
Definition: ipv6.h:316
void ksz8863DisableIrq(NetInterface *interface)
Disable interrupts.
error_t ksz8863UntagFrame(NetInterface *interface, uint8_t **frame, size_t *length, NetRxAncillary *ancillary)
Decode tail tag from incoming Ethernet frame.
void ksz8863FlushStaticFdbTable(NetInterface *interface)
Flush static MAC table.
uint32_t ksz8863GetLinkSpeed(NetInterface *interface, uint8_t port)
Get link speed.
void ksz8863SetAgingTime(NetInterface *interface, uint32_t agingTime)
Set aging time for dynamic filtering entries.
error_t ksz8863GetStaticFdbEntry(NetInterface *interface, uint_t index, SwitchFdbEntry *entry)
Read an entry from the static MAC table.
uint16_t ksz8863ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
void ksz8863SetPortState(NetInterface *interface, uint8_t port, SwitchPortState state)
Set port state.
void ksz8863EventHandler(NetInterface *interface)
KSZ8863 event handler.
void ksz8863InitHook(NetInterface *interface)
KSZ8863 custom configuration.
void ksz8863EnableRsvdMcastTable(NetInterface *interface, bool_t enable)
Enable reserved multicast table.
void ksz8863WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
error_t ksz8863DeleteStaticFdbEntry(NetInterface *interface, const SwitchFdbEntry *entry)
Remove an entry from the static MAC table.
void ksz8863EnableIgmpSnooping(NetInterface *interface, bool_t enable)
Enable IGMP snooping.
void ksz8863DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
void ksz8863WriteSwitchReg(NetInterface *interface, uint8_t address, uint8_t data)
Write switch register.
uint8_t ksz8863ReadSwitchReg(NetInterface *interface, uint8_t address)
Read switch register.
NicDuplexMode ksz8863GetDuplexMode(NetInterface *interface, uint8_t port)
Get duplex mode.
void ksz8863FlushDynamicFdbTable(NetInterface *interface, uint8_t port)
Flush dynamic MAC table.
error_t ksz8863AddStaticFdbEntry(NetInterface *interface, const SwitchFdbEntry *entry)
Add a new entry to the static MAC table.
const SwitchDriver ksz8863SwitchDriver
KSZ8863 Ethernet switch driver.
void ksz8863EnableMldSnooping(NetInterface *interface, bool_t enable)
Enable MLD snooping.
void ksz8863EnableIrq(NetInterface *interface)
Enable interrupts.
void ksz8863Tick(NetInterface *interface)
KSZ8863 timer handler.
error_t ksz8863Init(NetInterface *interface)
KSZ8863 Ethernet switch initialization.
error_t ksz8863TagFrame(NetInterface *interface, NetBuffer *buffer, size_t *offset, NetTxAncillary *ancillary)
Add tail tag to Ethernet frame.
void ksz8863SetUnknownMcastFwdPorts(NetInterface *interface, bool_t enable, uint32_t forwardPorts)
Set forward ports for unknown multicast packets.
error_t ksz8863GetDynamicFdbEntry(NetInterface *interface, uint_t index, SwitchFdbEntry *entry)
Read an entry from the dynamic MAC table.
bool_t ksz8863GetLinkState(NetInterface *interface, uint8_t port)
Get link state.
SwitchPortState ksz8863GetPortState(NetInterface *interface, uint8_t port)
Get port state.
void ksz8863DumpSwitchReg(NetInterface *interface)
Dump switch registers for debugging purpose.
#define NetInterface
Definition: net.h:36
#define NetRxAncillary
Definition: net_misc.h:40
#define NetTxAncillary
Definition: net_misc.h:36
Network interface controller abstraction layer.
NicDuplexMode
Duplex mode.
Definition: nic.h:122
SwitchPortState
Switch port state.
Definition: nic.h:134
Dynamic MAC table entry.
uint8_t numValidEntriesH
uint8_t sourcePort
MacAddr macAddr
uint8_t fid
uint8_t macEmpty
uint8_t reserved
uint8_t numValidEntriesL
uint8_t timestamp
uint8_t dataNotReady
Static MAC table entry.
uint8_t forwardPorts
MacAddr macAddr
uint8_t valid
uint8_t useFid
uint8_t fidL
uint8_t override
uint8_t fidH
uint8_t reserved
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
Ethernet switch driver.
Definition: nic.h:322
Forwarding database entry.
Definition: nic.h:149
uint8_t length
Definition: tcp.h:368