ksz9131_driver.c
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1 /**
2  * @file ksz9131_driver.c
3  * @brief KSZ9131 Gigabit Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief KSZ9131 Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief KSZ9131 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  //Debug message
63  TRACE_INFO("Initializing KSZ9131...\r\n");
64 
65  //Undefined PHY address?
66  if(interface->phyAddr >= 32)
67  {
68  //Use the default address
69  interface->phyAddr = KSZ9131_PHY_ADDR;
70  }
71 
72  //Initialize serial management interface
73  if(interface->smiDriver != NULL)
74  {
75  interface->smiDriver->init();
76  }
77 
78  //Initialize external interrupt line driver
79  if(interface->extIntDriver != NULL)
80  {
81  interface->extIntDriver->init();
82  }
83 
84  //Reset PHY transceiver
86 
87  //Wait for the reset to complete
89  {
90  }
91 
92  //Dump PHY registers for debugging purpose
93  ksz9131DumpPhyReg(interface);
94 
95  //The PHY will generate interrupts when link status changes are detected
98 
99  //Perform custom configuration
100  ksz9131InitHook(interface);
101 
102  //Force the TCP/IP stack to poll the link state at startup
103  interface->phyEvent = TRUE;
104  //Notify the TCP/IP stack of the event
106 
107  //Successful initialization
108  return NO_ERROR;
109 }
110 
111 
112 /**
113  * @brief KSZ9131 custom configuration
114  * @param[in] interface Underlying network interface
115  **/
116 
117 __weak_func void ksz9131InitHook(NetInterface *interface)
118 {
119  uint16_t value;
120 
121  //If MAC does not provide any delay for the TXC, the device may add a fixed
122  //2ns delay to the TXC input
126 }
127 
128 
129 /**
130  * @brief KSZ9131 timer handler
131  * @param[in] interface Underlying network interface
132  **/
133 
134 void ksz9131Tick(NetInterface *interface)
135 {
136  uint16_t value;
137  bool_t linkState;
138 
139  //No external interrupt line driver?
140  if(interface->extIntDriver == NULL)
141  {
142  //Read basic status register
143  value = ksz9131ReadPhyReg(interface, KSZ9131_BMSR);
144  //Retrieve current link state
145  linkState = (value & KSZ9131_BMSR_LINK_STATUS) ? TRUE : FALSE;
146 
147  //Link up event?
148  if(linkState && !interface->linkState)
149  {
150  //Set event flag
151  interface->phyEvent = TRUE;
152  //Notify the TCP/IP stack of the event
154  }
155  //Link down event?
156  else if(!linkState && interface->linkState)
157  {
158  //Set event flag
159  interface->phyEvent = TRUE;
160  //Notify the TCP/IP stack of the event
162  }
163  }
164 }
165 
166 
167 /**
168  * @brief Enable interrupts
169  * @param[in] interface Underlying network interface
170  **/
171 
173 {
174  //Enable PHY transceiver interrupts
175  if(interface->extIntDriver != NULL)
176  {
177  interface->extIntDriver->enableIrq();
178  }
179 }
180 
181 
182 /**
183  * @brief Disable interrupts
184  * @param[in] interface Underlying network interface
185  **/
186 
188 {
189  //Disable PHY transceiver interrupts
190  if(interface->extIntDriver != NULL)
191  {
192  interface->extIntDriver->disableIrq();
193  }
194 }
195 
196 
197 /**
198  * @brief KSZ9131 event handler
199  * @param[in] interface Underlying network interface
200  **/
201 
203 {
204  uint16_t value;
205 
206  //Read status register to acknowledge the interrupt
207  value = ksz9131ReadPhyReg(interface, KSZ9131_ICSR);
208 
209  //Link status change?
211  {
212  //Any link failure condition is latched in the BMSR register. Reading
213  //the register twice will always return the actual link status
214  value = ksz9131ReadPhyReg(interface, KSZ9131_BMSR);
215  value = ksz9131ReadPhyReg(interface, KSZ9131_BMSR);
216 
217  //Link is up?
218  if((value & KSZ9131_BMSR_LINK_STATUS) != 0)
219  {
220  //Read PHY control register
221  value = ksz9131ReadPhyReg(interface, KSZ9131_PHYCON);
222 
223  //Check current speed
225  {
226  //1000BASE-T
227  interface->linkSpeed = NIC_LINK_SPEED_1GBPS;
228  }
229  else if((value & KSZ9131_PHYCON_SPEED_100BTX) != 0)
230  {
231  //100BASE-TX
232  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
233  }
234  else if((value & KSZ9131_PHYCON_SPEED_10BT) != 0)
235  {
236  //10BASE-T
237  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
238  }
239  else
240  {
241  //Debug message
242  TRACE_WARNING("Invalid speed!\r\n");
243  }
244 
245  //Check current duplex mode
247  {
248  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
249  }
250  else
251  {
252  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
253  }
254 
255  //Update link state
256  interface->linkState = TRUE;
257 
258  //Adjust MAC configuration parameters for proper operation
259  interface->nicDriver->updateMacConfig(interface);
260  }
261  else
262  {
263  //Update link state
264  interface->linkState = FALSE;
265  }
266 
267  //Process link state change event
268  nicNotifyLinkChange(interface);
269  }
270 }
271 
272 
273 /**
274  * @brief Write PHY register
275  * @param[in] interface Underlying network interface
276  * @param[in] address PHY register address
277  * @param[in] data Register value
278  **/
279 
280 void ksz9131WritePhyReg(NetInterface *interface, uint8_t address,
281  uint16_t data)
282 {
283  //Write the specified PHY register
284  if(interface->smiDriver != NULL)
285  {
286  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
287  interface->phyAddr, address, data);
288  }
289  else
290  {
291  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
292  interface->phyAddr, address, data);
293  }
294 }
295 
296 
297 /**
298  * @brief Read PHY register
299  * @param[in] interface Underlying network interface
300  * @param[in] address PHY register address
301  * @return Register value
302  **/
303 
304 uint16_t ksz9131ReadPhyReg(NetInterface *interface, uint8_t address)
305 {
306  uint16_t data;
307 
308  //Read the specified PHY register
309  if(interface->smiDriver != NULL)
310  {
311  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
312  interface->phyAddr, address);
313  }
314  else
315  {
316  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
317  interface->phyAddr, address);
318  }
319 
320  //Return the value of the PHY register
321  return data;
322 }
323 
324 
325 /**
326  * @brief Dump PHY registers for debugging purpose
327  * @param[in] interface Underlying network interface
328  **/
329 
331 {
332  uint8_t i;
333 
334  //Loop through PHY registers
335  for(i = 0; i < 32; i++)
336  {
337  //Display current PHY register
338  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
339  ksz9131ReadPhyReg(interface, i));
340  }
341 
342  //Terminate with a line feed
343  TRACE_DEBUG("\r\n");
344 }
345 
346 
347 /**
348  * @brief Write MMD register
349  * @param[in] interface Underlying network interface
350  * @param[in] devAddr Device address
351  * @param[in] regAddr Register address
352  * @param[in] data MMD register value
353  **/
354 
355 void ksz9131WriteMmdReg(NetInterface *interface, uint8_t devAddr,
356  uint16_t regAddr, uint16_t data)
357 {
358  //Select register operation
361 
362  //Write MMD register address
364 
365  //Select data operation
368 
369  //Write the content of the MMD register
371 }
372 
373 
374 /**
375  * @brief Read MMD register
376  * @param[in] interface Underlying network interface
377  * @param[in] devAddr Device address
378  * @param[in] regAddr Register address
379  * @return MMD register value
380  **/
381 
382 uint16_t ksz9131ReadMmdReg(NetInterface *interface, uint8_t devAddr,
383  uint16_t regAddr)
384 {
385  //Select register operation
388 
389  //Write MMD register address
391 
392  //Select data operation
395 
396  //Read the content of the MMD register
397  return ksz9131ReadPhyReg(interface, KSZ9131_MMDAADR);
398 }
int bool_t
Definition: compiler_port.h:53
Debugging facilities.
#define TRACE_DEBUG(...)
Definition: debug.h:107
#define TRACE_WARNING(...)
Definition: debug.h:85
#define TRACE_INFO(...)
Definition: debug.h:95
error_t
Error codes.
Definition: error.h:43
@ NO_ERROR
Success.
Definition: error.h:44
uint8_t data[]
Definition: ethernet.h:222
Ipv6Addr address[]
Definition: ipv6.h:316
void ksz9131EnableIrq(NetInterface *interface)
Enable interrupts.
void ksz9131DisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t ksz9131ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void ksz9131DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
void ksz9131WriteMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr, uint16_t data)
Write MMD register.
uint16_t ksz9131ReadMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr)
Read MMD register.
const PhyDriver ksz9131PhyDriver
KSZ9131 Ethernet PHY driver.
void ksz9131EventHandler(NetInterface *interface)
KSZ9131 event handler.
__weak_func void ksz9131InitHook(NetInterface *interface)
KSZ9131 custom configuration.
void ksz9131Tick(NetInterface *interface)
KSZ9131 timer handler.
void ksz9131WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
error_t ksz9131Init(NetInterface *interface)
KSZ9131 PHY transceiver initialization.
KSZ9131 Gigabit Ethernet PHY driver.
#define KSZ9131_TX_DLL_CTRL
#define KSZ9131_ICSR
#define KSZ9131_MMDACR_DEVAD
#define KSZ9131_PHYCON_SPEED_100BTX
#define KSZ9131_MMDACR
#define KSZ9131_MMDAADR
#define KSZ9131_BMSR_LINK_STATUS
#define KSZ9131_PHYCON_SPEED_10BT
#define KSZ9131_ICSR_LINK_UP_IF
#define KSZ9131_ICSR_LINK_DOWN_IE
#define KSZ9131_ICSR_LINK_DOWN_IF
#define KSZ9131_PHY_ADDR
#define KSZ9131_BMCR_RESET
#define KSZ9131_PHYCON_SPEED_1000BT
#define KSZ9131_MMDACR_FUNC_DATA_NO_POST_INC
#define KSZ9131_TX_DLL_CTRL_BYPASS_TXDLL
#define KSZ9131_BMSR
#define KSZ9131_BMCR
#define KSZ9131_ICSR_LINK_UP_IE
#define KSZ9131_MMDACR_FUNC_ADDR
#define KSZ9131_PHYCON
#define KSZ9131_PHYCON_DUPLEX_STATUS
uint16_t regAddr
TCP/IP stack core.
#define NetInterface
Definition: net.h:36
#define netEvent
Definition: net_legacy.h:196
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:548
#define SMI_OPCODE_WRITE
Definition: nic.h:66
#define SMI_OPCODE_READ
Definition: nic.h:67
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
@ NIC_LINK_SPEED_1GBPS
Definition: nic.h:113
#define TRUE
Definition: os_port.h:50
#define FALSE
Definition: os_port.h:46
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
Ethernet PHY driver.
Definition: nic.h:308
uint8_t value[]
Definition: tcp.h:369