ksz9477_driver.h
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1 /**
2  * @file ksz9477_driver.h
3  * @brief KSZ9477 7-port Gigabit Ethernet switch
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.4
29  **/
30 
31 #ifndef _KSZ9477_DRIVER_H
32 #define _KSZ9477_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //KSZ9477 ports
38 #define KSZ9477_PORT1 1
39 #define KSZ9477_PORT2 2
40 #define KSZ9477_PORT3 3
41 #define KSZ9477_PORT4 4
42 #define KSZ9477_PORT5 5
43 
44 //SPI command byte
45 #define KSZ9477_SPI_CMD_WRITE 0x40000000
46 #define KSZ9477_SPI_CMD_READ 0x60000000
47 #define KSZ9477_SPI_CMD_ADDR 0x001FFFE0
48 
49 //KSZ9477 PHY registers
50 #define KSZ9477_BMCR 0x00
51 #define KSZ9477_BMSR 0x01
52 #define KSZ9477_PHYID1 0x02
53 #define KSZ9477_PHYID2 0x03
54 #define KSZ9477_ANAR 0x04
55 #define KSZ9477_ANLPAR 0x05
56 #define KSZ9477_ANER 0x06
57 #define KSZ9477_ANNPR 0x07
58 #define KSZ9477_ANLPNPR 0x08
59 #define KSZ9477_GBCR 0x09
60 #define KSZ9477_GBSR 0x0A
61 #define KSZ9477_MMDACR 0x0D
62 #define KSZ9477_MMDAADR 0x0E
63 #define KSZ9477_GBESR 0x0F
64 #define KSZ9477_RLB 0x11
65 #define KSZ9477_LINKMD 0x12
66 #define KSZ9477_DPMAPCSS 0x13
67 #define KSZ9477_RXERCTR 0x15
68 #define KSZ9477_ICSR 0x1B
69 #define KSZ9477_AUTOMDI 0x1C
70 #define KSZ9477_PHYCON 0x1F
71 
72 //KSZ9477 Switch registers
73 #define KSZ9477_CHIP_ID0 0x0000
74 #define KSZ9477_CHIP_ID1 0x0001
75 #define KSZ9477_CHIP_ID2 0x0002
76 #define KSZ9477_CHIP_ID3 0x0003
77 #define KSZ9477_SWITCH_OP 0x0300
78 #define KSZ9477_PORT1_INT_STATUS 0x101B
79 #define KSZ9477_PORT1_INT_MASK 0x101F
80 #define KSZ9477_PORT1_OP_CTRL0 0x1020
81 #define KSZ9477_PORT1_STATUS 0x1030
82 #define KSZ9477_PORT1_MSTP_STATE 0x1B04
83 #define KSZ9477_PORT2_INT_STATUS 0x201B
84 #define KSZ9477_PORT2_INT_MASK 0x201F
85 #define KSZ9477_PORT2_OP_CTRL0 0x2020
86 #define KSZ9477_PORT2_STATUS 0x2030
87 #define KSZ9477_PORT2_MSTP_STATE 0x2B04
88 #define KSZ9477_PORT3_INT_STATUS 0x301B
89 #define KSZ9477_PORT3_INT_MASK 0x301F
90 #define KSZ9477_PORT3_OP_CTRL0 0x3020
91 #define KSZ9477_PORT3_STATUS 0x3030
92 #define KSZ9477_PORT3_MSTP_STATE 0x3B04
93 #define KSZ9477_PORT4_INT_STATUS 0x401B
94 #define KSZ9477_PORT4_INT_MASK 0x401F
95 #define KSZ9477_PORT4_OP_CTRL0 0x4020
96 #define KSZ9477_PORT4_STATUS 0x4030
97 #define KSZ9477_PORT4_MSTP_STATE 0x4B04
98 #define KSZ9477_PORT5_INT_STATUS 0x501B
99 #define KSZ9477_PORT5_INT_MASK 0x501F
100 #define KSZ9477_PORT5_OP_CTRL0 0x5020
101 #define KSZ9477_PORT5_STATUS 0x5030
102 #define KSZ9477_PORT5_MSTP_STATE 0x5B04
103 #define KSZ9477_PORT6_INT_STATUS 0x601B
104 #define KSZ9477_PORT6_INT_MASK 0x601F
105 #define KSZ9477_PORT6_OP_CTRL0 0x6020
106 #define KSZ9477_PORT6_STATUS 0x6030
107 #define KSZ9477_PORT6_XMII_CTRL0 0x6300
108 #define KSZ9477_PORT6_XMII_CTRL1 0x6301
109 #define KSZ9477_PORT6_MSTP_STATE 0x6B04
110 #define KSZ9477_PORT7_INT_STATUS 0x701B
111 #define KSZ9477_PORT7_INT_MASK 0x701F
112 #define KSZ9477_PORT7_OP_CTRL0 0x7020
113 #define KSZ9477_PORT7_STATUS 0x7030
114 #define KSZ9477_PORT7_XMII_CTRL0 0x7300
115 #define KSZ9477_PORT7_XMII_CTRL1 0x7301
116 #define KSZ9477_PORT7_MSTP_STATE 0x7B04
117 
118 //KSZ9477 Switch register access macros
119 #define KSZ9477_PORTn_INT_STATUS(port) (0x001B + ((port) * 0x1000))
120 #define KSZ9477_PORTn_INT_MASK(port) (0x001F + ((port) * 0x1000))
121 #define KSZ9477_PORTn_OP_CTRL0(port) (0x0020 + ((port) * 0x1000))
122 #define KSZ9477_PORTn_STATUS(port) (0x0030 + ((port) * 0x1000))
123 #define KSZ9477_PORTn_XMII_CTRL0(port) (0x0300 + ((port) * 0x1000))
124 #define KSZ9477_PORTn_XMII_CTRL1(port) (0x0301 + ((port) * 0x1000))
125 #define KSZ9477_PORTn_MSTP_STATE(port) (0x0B04 + ((port) * 0x1000))
126 #define KSZ9477_PORTn_ETH_PHY_REG(port, addr) (0x0100 + ((port) * 0x1000) + ((addr) * 2))
127 
128 //PHY Basic Control register
129 #define KSZ9477_BMCR_RESET 0x8000
130 #define KSZ9477_BMCR_LOOPBACK 0x4000
131 #define KSZ9477_BMCR_SPEED_SEL_LSB 0x2000
132 #define KSZ9477_BMCR_AN_EN 0x1000
133 #define KSZ9477_BMCR_POWER_DOWN 0x0800
134 #define KSZ9477_BMCR_ISOLATE 0x0400
135 #define KSZ9477_BMCR_RESTART_AN 0x0200
136 #define KSZ9477_BMCR_DUPLEX_MODE 0x0100
137 #define KSZ9477_BMCR_COL_TEST 0x0080
138 #define KSZ9477_BMCR_SPEED_SEL_MSB 0x0040
139 
140 //PHY Basic Status register
141 #define KSZ9477_BMSR_100BT4 0x8000
142 #define KSZ9477_BMSR_100BTX_FD 0x4000
143 #define KSZ9477_BMSR_100BTX_HD 0x2000
144 #define KSZ9477_BMSR_10BT_FD 0x1000
145 #define KSZ9477_BMSR_10BT_HD 0x0800
146 #define KSZ9477_BMSR_EXTENDED_STATUS 0x0100
147 #define KSZ9477_BMSR_MF_PREAMBLE_SUPPR 0x0040
148 #define KSZ9477_BMSR_AN_COMPLETE 0x0020
149 #define KSZ9477_BMSR_REMOTE_FAULT 0x0010
150 #define KSZ9477_BMSR_AN_CAPABLE 0x0008
151 #define KSZ9477_BMSR_LINK_STATUS 0x0004
152 #define KSZ9477_BMSR_JABBER_DETECT 0x0002
153 #define KSZ9477_BMSR_EXTENDED_CAPABLE 0x0001
154 
155 //PHY ID High register
156 #define KSZ9477_PHYID1_DEFAULT 0x0022
157 
158 //PHY ID Low register
159 #define KSZ9477_PHYID2_DEFAULT 0x1631
160 
161 //PHY Auto-Negotiation Advertisement register
162 #define KSZ9477_ANAR_NEXT_PAGE 0x8000
163 #define KSZ9477_ANAR_REMOTE_FAULT 0x2000
164 #define KSZ9477_ANAR_PAUSE 0x0C00
165 #define KSZ9477_ANAR_100BT4 0x0200
166 #define KSZ9477_ANAR_100BTX_FD 0x0100
167 #define KSZ9477_ANAR_100BTX_HD 0x0080
168 #define KSZ9477_ANAR_10BT_FD 0x0040
169 #define KSZ9477_ANAR_10BT_HD 0x0020
170 #define KSZ9477_ANAR_SELECTOR 0x001F
171 #define KSZ9477_ANAR_SELECTOR_DEFAULT 0x0001
172 
173 //PHY Auto-Negotiation Link Partner Ability register
174 #define KSZ9477_ANLPAR_NEXT_PAGE 0x8000
175 #define KSZ9477_ANLPAR_ACK 0x4000
176 #define KSZ9477_ANLPAR_REMOTE_FAULT 0x2000
177 #define KSZ9477_ANLPAR_PAUSE 0x0C00
178 #define KSZ9477_ANLPAR_100BT4 0x0200
179 #define KSZ9477_ANLPAR_100BTX_FD 0x0100
180 #define KSZ9477_ANLPAR_100BTX_HD 0x0080
181 #define KSZ9477_ANLPAR_10BT_FD 0x0040
182 #define KSZ9477_ANLPAR_10BT_HD 0x0020
183 #define KSZ9477_ANLPAR_SELECTOR 0x001F
184 #define KSZ9477_ANLPAR_SELECTOR_DEFAULT 0x0001
185 
186 //PHY Auto-Negotiation Expansion Status register
187 #define KSZ9477_ANER_PAR_DETECT_FAULT 0x0010
188 #define KSZ9477_ANER_LP_NEXT_PAGE_ABLE 0x0008
189 #define KSZ9477_ANER_NEXT_PAGE_ABLE 0x0004
190 #define KSZ9477_ANER_PAGE_RECEIVED 0x0002
191 #define KSZ9477_ANER_LP_AN_ABLE 0x0001
192 
193 //PHY Auto-Negotiation Next Page register
194 #define KSZ9477_ANNPR_NEXT_PAGE 0x8000
195 #define KSZ9477_ANNPR_MSG_PAGE 0x2000
196 #define KSZ9477_ANNPR_ACK2 0x1000
197 #define KSZ9477_ANNPR_TOGGLE 0x0800
198 #define KSZ9477_ANNPR_MESSAGE 0x07FF
199 
200 //PHY Auto-Negotiation Link Partner Next Page Ability register
201 #define KSZ9477_ANLPNPR_NEXT_PAGE 0x8000
202 #define KSZ9477_ANLPNPR_ACK 0x4000
203 #define KSZ9477_ANLPNPR_MSG_PAGE 0x2000
204 #define KSZ9477_ANLPNPR_ACK2 0x1000
205 #define KSZ9477_ANLPNPR_TOGGLE 0x0800
206 #define KSZ9477_ANLPNPR_MESSAGE 0x07FF
207 
208 //PHY 1000BASE-T Control register
209 #define KSZ9477_GBCR_TEST_MODE 0xE000
210 #define KSZ9477_GBCR_MS_MAN_CONF_EN 0x1000
211 #define KSZ9477_GBCR_MS_MAN_CONF_VAL 0x0800
212 #define KSZ9477_GBCR_PORT_TYPE 0x0400
213 #define KSZ9477_GBCR_1000BT_FD 0x0200
214 #define KSZ9477_GBCR_1000BT_HD 0x0100
215 
216 //PHY 1000BASE-T Status register
217 #define KSZ9477_GBSR_MS_CONF_FAULT 0x8000
218 #define KSZ9477_GBSR_MS_CONF_RES 0x4000
219 #define KSZ9477_GBSR_LOCAL_RECEIVER_STATUS 0x2000
220 #define KSZ9477_GBSR_REMOTE_RECEIVER_STATUS 0x1000
221 #define KSZ9477_GBSR_LP_1000BT_FD 0x0800
222 #define KSZ9477_GBSR_LP_1000BT_HD 0x0400
223 #define KSZ9477_GBSR_IDLE_ERR_COUNT 0x00FF
224 
225 //PHY MMD Setup register
226 #define KSZ9477_MMDACR_FUNC 0xC000
227 #define KSZ9477_MMDACR_FUNC_ADDR 0x0000
228 #define KSZ9477_MMDACR_FUNC_DATA_NO_POST_INC 0x4000
229 #define KSZ9477_MMDACR_FUNC_DATA_POST_INC_RW 0x8000
230 #define KSZ9477_MMDACR_FUNC_DATA_POST_INC_W 0xC000
231 #define KSZ9477_MMDACR_DEVAD 0x001F
232 
233 //PHY Extended Status register
234 #define KSZ9477_GBESR_1000BX_FD 0x8000
235 #define KSZ9477_GBESR_1000BX_HD 0x4000
236 #define KSZ9477_GBESR_1000BT_FD 0x2000
237 #define KSZ9477_GBESR_1000BT_HD 0x1000
238 
239 //PHY Remote Loopback register
240 #define KSZ9477_RLB_REMOTE_LOOPBACK 0x0100
241 
242 //PHY LinkMD register
243 #define KSZ9477_LINKMD_TEST_EN 0x8000
244 #define KSZ9477_LINKMD_PAIR 0x3000
245 #define KSZ9477_LINKMD_PAIR_A 0x0000
246 #define KSZ9477_LINKMD_PAIR_B 0x1000
247 #define KSZ9477_LINKMD_PAIR_C 0x2000
248 #define KSZ9477_LINKMD_PAIR_D 0x3000
249 #define KSZ9477_LINKMD_STATUS 0x0300
250 #define KSZ9477_LINKMD_STATUS_NORMAL 0x0000
251 #define KSZ9477_LINKMD_STATUS_OPEN 0x0100
252 #define KSZ9477_LINKMD_STATUS_SHORT 0x0200
253 #define KSZ9477_LINKMD_RESULT 0x00FF
254 
255 //PHY Digital PMA/PCS Status register
256 #define KSZ9477_DPMAPCSS_1000BT_LINK_STATUS 0x0002
257 #define KSZ9477_DPMAPCSS_100BTX_LINK_STATUS 0x0001
258 
259 //Port Interrupt Control/Status register
260 #define KSZ9477_ICSR_JABBER_IE 0x8000
261 #define KSZ9477_ICSR_RECEIVE_ERROR_IE 0x4000
262 #define KSZ9477_ICSR_PAGE_RECEIVED_IE 0x2000
263 #define KSZ9477_ICSR_PAR_DETECT_FAULT_IE 0x1000
264 #define KSZ9477_ICSR_LP_ACK_IE 0x0800
265 #define KSZ9477_ICSR_LINK_DOWN_IE 0x0400
266 #define KSZ9477_ICSR_REMOTE_FAULT_IE 0x0200
267 #define KSZ9477_ICSR_LINK_UP_IE 0x0100
268 #define KSZ9477_ICSR_JABBER_IF 0x0080
269 #define KSZ9477_ICSR_RECEIVE_ERROR_IF 0x0040
270 #define KSZ9477_ICSR_PAGE_RECEIVED_IF 0x0020
271 #define KSZ9477_ICSR_PAR_DETECT_FAULT_IF 0x0010
272 #define KSZ9477_ICSR_LP_ACK_IF 0x0008
273 #define KSZ9477_ICSR_LINK_DOWN_IF 0x0004
274 #define KSZ9477_ICSR_REMOTE_FAULT_IF 0x0002
275 #define KSZ9477_ICSR_LINK_UP_IF 0x0001
276 
277 //PHY Auto MDI/MDI-X register
278 #define KSZ9477_AUTOMDI_MDI_SET 0x0080
279 #define KSZ9477_AUTOMDI_SWAP_OFF 0x0040
280 
281 //PHY Control register
282 #define KSZ9477_PHYCON_JABBER_EN 0x0200
283 #define KSZ9477_PHYCON_SPEED_1000BT 0x0040
284 #define KSZ9477_PHYCON_SPEED_100BTX 0x0020
285 #define KSZ9477_PHYCON_SPEED_10BT 0x0010
286 #define KSZ9477_PHYCON_DUPLEX_STATUS 0x0008
287 #define KSZ9477_PHYCON_1000BT_MS_STATUS 0x0004
288 
289 //Global Chip ID 0 register
290 #define KSZ9477_CHIP_ID0_DEFAULT 0x00
291 
292 //Global Chip ID 1 register
293 #define KSZ9477_CHIP_ID1_DEFAULT 0x94
294 
295 //Global Chip ID 2 register
296 #define KSZ9477_CHIP_ID2_DEFAULT 0x77
297 
298 //Global Chip ID 3 register
299 #define KSZ9477_CHIP_ID3_REVISION_ID 0xF0
300 #define KSZ9477_CHIP_ID3_GLOBAL_SOFT_RESET 0x01
301 
302 //Switch Operation register
303 #define KSZ9477_SWITCH_OP_DOUBLE_TAG_EN 0x80
304 #define KSZ9477_SWITCH_OP_SOFT_HARD_RESET 0x02
305 #define KSZ9477_SWITCH_OP_START_SWITCH 0x01
306 
307 //Port N Interrupt Status register
308 #define KSZ9477_PORTn_INT_STATUS_SGMII_AN_DONE 0x08
309 #define KSZ9477_PORTn_INT_STATUS_PTP 0x04
310 #define KSZ9477_PORTn_INT_STATUS_PHY 0x02
311 #define KSZ9477_PORTn_INT_STATUS_ACL 0x01
312 
313 //Port N Interrupt Mask register
314 #define KSZ9477_PORTn_INT_MASK_SGMII_AN_DONE 0x08
315 #define KSZ9477_PORTn_INT_MASK_PTP 0x04
316 #define KSZ9477_PORTn_INT_MASK_PHY 0x02
317 #define KSZ9477_PORTn_INT_MASK_ACL 0x01
318 
319 //Port N Operation Control 0 register
320 #define KSZ9477_PORTn_OP_CTRL0_LOCAL_LOOPBACK 0x80
321 #define KSZ9477_PORTn_OP_CTRL0_REMOTE_LOOPBACK 0x40
322 #define KSZ9477_PORTn_OP_CTRL0_TAIL_TAG_EN 0x04
323 #define KSZ9477_PORTn_OP_CTRL0_TX_QUEUE_SPLIT_EN 0x03
324 
325 //Port N Status register
326 #define KSZ9477_PORTn_STATUS_SPEED 0x18
327 #define KSZ9477_PORTn_STATUS_SPEED_10MBPS 0x00
328 #define KSZ9477_PORTn_STATUS_SPEED_100MBPS 0x08
329 #define KSZ9477_PORTn_STATUS_SPEED_1000MBPS 0x10
330 #define KSZ9477_PORTn_STATUS_DUPLEX 0x04
331 #define KSZ9477_PORTn_STATUS_TX_FLOW_CTRL_EN 0x02
332 #define KSZ9477_PORTn_STATUS_RX_FLOW_CTRL_EN 0x01
333 
334 //XMII Port N Control 0 register
335 #define KSZ9477_PORTn_XMII_CTRL0_DUPLEX 0x40
336 #define KSZ9477_PORTn_XMII_CTRL0_TX_FLOW_CTRL_EN 0x20
337 #define KSZ9477_PORTn_XMII_CTRL0_SPEED_10_100 0x10
338 #define KSZ9477_PORTn_XMII_CTRL0_RX_FLOW_CTRL_EN 0x08
339 
340 //XMII Port N Control 1 register
341 #define KSZ9477_PORTn_XMII_CTRL1_SPEED_1000 0x40
342 #define KSZ9477_PORTn_XMII_CTRL1_RGMII_ID_IG 0x10
343 #define KSZ9477_PORTn_XMII_CTRL1_RGMII_ID_EG 0x08
344 #define KSZ9477_PORTn_XMII_CTRL1_MII_RMII_MODE 0x04
345 #define KSZ9477_PORTn_XMII_CTRL1_IF_TYPE 0x03
346 #define KSZ9477_PORTn_XMII_CTRL1_IF_TYPE_RGMII 0x00
347 #define KSZ9477_PORTn_XMII_CTRL1_IF_TYPE_RMII 0x01
348 #define KSZ9477_PORTn_XMII_CTRL1_IF_TYPE_MII 0x03
349 
350 //Port N MSTP State register
351 #define KSZ9477_PORTn_MSTP_STATE_TRANSMIT_EN 0x04
352 #define KSZ9477_PORTn_MSTP_STATE_RECEIVE_EN 0x02
353 #define KSZ9477_PORTn_MSTP_STATE_LEARNING_DIS 0x01
354 
355 //Tail tag encoding
356 #define KSZ9477_TAIL_TAG_ENCODE(port) HTONS(0x0200 | (1 << (((port) - 1) & 0x0007)))
357 //Tail tag decoding
358 #define KSZ9477_TAIL_TAG_DECODE(tag) (((tag) & 0x07) + 1)
359 
360 //C++ guard
361 #ifdef __cplusplus
362  extern "C" {
363 #endif
364 
365 //KSZ9477 Ethernet switch driver
366 extern const PhyDriver ksz9477PhyDriver;
367 
368 //KSZ9477 related functions
369 error_t ksz9477Init(NetInterface *interface);
370 
371 bool_t ksz9477GetLinkState(NetInterface *interface, uint8_t port);
372 
373 void ksz9477Tick(NetInterface *interface);
374 
375 void ksz9477EnableIrq(NetInterface *interface);
376 void ksz9477DisableIrq(NetInterface *interface);
377 
378 void ksz9477EventHandler(NetInterface *interface);
379 
380 error_t ksz9477TagFrame(NetInterface *interface, NetBuffer *buffer,
381  size_t *offset, uint8_t port, uint16_t *type);
382 
383 error_t ksz9477UntagFrame(NetInterface *interface, uint8_t **frame,
384  size_t *length, uint8_t *port);
385 
386 void ksz9477WritePhyReg(NetInterface *interface, uint8_t port,
387  uint8_t address, uint16_t data);
388 
389 uint16_t ksz9477ReadPhyReg(NetInterface *interface, uint8_t port,
390  uint8_t address);
391 
392 void ksz9477DumpPhyReg(NetInterface *interface, uint8_t port);
393 
394 void ksz9477WriteSwitchReg(NetInterface *interface, uint16_t address,
395  uint8_t data);
396 
397 uint8_t ksz9477ReadSwitchReg(NetInterface *interface, uint16_t address);
398 
399 void ksz9477DumpSwitchReg(NetInterface *interface);
400 
401 //C++ guard
402 #ifdef __cplusplus
403  }
404 #endif
405 
406 #endif
bool_t ksz9477GetLinkState(NetInterface *interface, uint8_t port)
Get link state.
void ksz9477WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
error_t ksz9477Init(NetInterface *interface)
KSZ9477 Ethernet switch initialization.
void ksz9477EnableIrq(NetInterface *interface)
Enable interrupts.
uint8_t ksz9477ReadSwitchReg(NetInterface *interface, uint16_t address)
Read switch register.
char_t type
void ksz9477EventHandler(NetInterface *interface)
KSZ9477 event handler.
error_t ksz9477UntagFrame(NetInterface *interface, uint8_t **frame, size_t *length, uint8_t *port)
Decode tail tag from incoming Ethernet frame.
PHY driver.
Definition: nic.h:214
void ksz9477DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
void ksz9477DisableIrq(NetInterface *interface)
Disable interrupts.
error_t ksz9477TagFrame(NetInterface *interface, NetBuffer *buffer, size_t *offset, uint8_t port, uint16_t *type)
Add tail tag to Ethernet frame.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
uint16_t ksz9477ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
Ipv6Addr address
error_t
Error codes.
Definition: error.h:42
uint8_t data[]
Definition: dtls_misc.h:169
#define NetInterface
Definition: net.h:36
uint16_t port
Definition: dns_common.h:223
void ksz9477DumpSwitchReg(NetInterface *interface)
Dump switch registers for debugging purpose.
const PhyDriver ksz9477PhyDriver
KSZ9477 Ethernet switch driver.
void ksz9477Tick(NetInterface *interface)
KSZ9477 timer handler.
uint8_t length
Definition: dtls_misc.h:142
void ksz9477WriteSwitchReg(NetInterface *interface, uint16_t address, uint8_t data)
Write switch register.
int bool_t
Definition: compiler_port.h:49
Network interface controller abstraction layer.