ksz9477_driver.c
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1 /**
2  * @file ksz9477_driver.c
3  * @brief KSZ9477 Ethernet switch
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.2
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
36 #include "core/ethernet_misc.h"
38 #include "debug.h"
39 
40 
41 /**
42  * @brief KSZ9477 Ethernet switch driver
43  **/
44 
46 {
54 };
55 
56 
57 /**
58  * @brief Tail tag rules (host to KSZ9477)
59  **/
60 
61 const uint16_t ksz9477IngressTailTag[6] =
62 {
63  0,
69 };
70 
71 
72 /**
73  * @brief KSZ9477 Ethernet switch initialization
74  * @param[in] interface Underlying network interface
75  * @return Error code
76  **/
77 
79 {
80  uint_t port;
81  uint8_t temp;
82 
83  //Debug message
84  TRACE_INFO("Initializing KSZ9477...\r\n");
85 
86  //SPI slave mode?
87  if(interface->spiDriver != NULL)
88  {
89  //Initialize SPI
90  interface->spiDriver->init();
91 
92  //Wait for the serial interface to be ready
93  do
94  {
95  //Read CHIP_ID1 register
97 
98  //The returned data is invalid until the serial interface is ready
99  } while(temp != CHIP_ID1_CHIP_ID_MSB_DEFAULT);
100 
101 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
102  //Tail tagging mode?
103  if(interface->port != 0)
104  {
105  //Enable tail tag feature
109 
110  //Loop through ports
112  {
113  //Disable packet transmission and switch address learning
118  }
119  }
120  else
121 #endif
122  {
123  //Disable tail tag feature
125  temp &= ~PORT_OP_CTRL0_TAIL_TAG_EN;
127 
128  //Loop through ports
130  {
131  //Enable transmission, reception and switch address learning
136  }
137  }
138 
139  //Add internal delay to ingress and egress RGMII clocks
143 
144  //Start switch operation
147  }
148 
149  //Loop through ports
151  {
152  //Debug message
153  TRACE_DEBUG("Port %u:\r\n", port);
154  //Dump PHY registers for debugging purpose
155  ksz9477DumpPhyReg(interface, port);
156  }
157 
158  //Force the TCP/IP stack to poll the link state at startup
159  interface->phyEvent = TRUE;
160  //Notify the TCP/IP stack of the event
162 
163  //Successful initialization
164  return NO_ERROR;
165 }
166 
167 
168 /**
169  * @brief Get link state
170  * @param[in] interface Underlying network interface
171  * @param[in] port Port number
172  * @return Link state
173  **/
174 
176 {
177  uint16_t value;
178  bool_t linkState;
179 
180  //Check port number
181  if(port >= KSZ9477_PORT1 && port <= KSZ9477_PORT5)
182  {
183  //Get exclusive access
185 
186  //Any link failure condition is latched in the BMSR register... Reading
187  //the register twice will always return the actual link status
190 
191  //Retrieve current link state
192  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
193 
194  //Release exclusive access
196  }
197  else
198  {
199  //The specified port number is not valid
200  linkState = FALSE;
201  }
202 
203  //Return link status
204  return linkState;
205 }
206 
207 
208 /**
209  * @brief KSZ9477 timer handler
210  * @param[in] interface Underlying network interface
211  **/
212 
213 void ksz9477Tick(NetInterface *interface)
214 {
215  uint_t port;
216  uint16_t value;
217  bool_t linkState;
218 
219 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
220  //Tail tagging mode?
221  if(interface->port != 0)
222  {
223  uint_t i;
224  NetInterface *virtualInterface;
225 
226  //Loop through network interfaces
227  for(i = 0; i < NET_INTERFACE_COUNT; i++)
228  {
229  //Point to the current interface
230  virtualInterface = &netInterface[i];
231 
232  //Check whether the current virtual interface is attached to the
233  //physical interface
234  if(virtualInterface == interface || virtualInterface->parent == interface)
235  {
236  //The tail tag is used to indicate the source/destination port
237  port = virtualInterface->port;
238 
239  //Valid port?
240  if(port >= KSZ9477_PORT1 && port <= KSZ9477_PORT5)
241  {
242  //Read status register
244 
245  //Retrieve current link state
246  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
247 
248  //Link up or link down event?
249  if(linkState != virtualInterface->linkState)
250  {
251  //Set event flag
252  interface->phyEvent = TRUE;
253  //Notify the TCP/IP stack of the event
255  }
256  }
257  }
258  }
259  }
260  else
261 #endif
262  {
263  //Initialize link state
264  linkState = FALSE;
265 
266  //Loop through ports
268  {
269  //Read status register
271 
272  //Retrieve current link state
273  if(value & BMSR_LINK_STATUS)
274  linkState = TRUE;
275  }
276 
277  //Link up or link down event?
278  if(linkState != interface->linkState)
279  {
280  //Set event flag
281  interface->phyEvent = TRUE;
282  //Notify the TCP/IP stack of the event
284  }
285  }
286 }
287 
288 
289 /**
290  * @brief Enable interrupts
291  * @param[in] interface Underlying network interface
292  **/
293 
295 {
296 }
297 
298 
299 /**
300  * @brief Disable interrupts
301  * @param[in] interface Underlying network interface
302  **/
303 
305 {
306 }
307 
308 
309 /**
310  * @brief KSZ9477 event handler
311  * @param[in] interface Underlying network interface
312  **/
313 
315 {
316  uint_t port;
317  uint16_t value;
318  bool_t linkState;
319 
320 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
321  //Tail tagging mode?
322  if(interface->port != 0)
323  {
324  uint_t i;
325  NetInterface *virtualInterface;
326 
327  //Loop through network interfaces
328  for(i = 0; i < NET_INTERFACE_COUNT; i++)
329  {
330  //Point to the current interface
331  virtualInterface = &netInterface[i];
332 
333  //Check whether the current virtual interface is attached to the
334  //physical interface
335  if(virtualInterface == interface ||
336  virtualInterface->parent == interface)
337  {
338  //The tail tag is used to indicate the source/destination port
339  port = virtualInterface->port;
340 
341  //Valid port?
342  if(port >= KSZ9477_PORT1 && port <= KSZ9477_PORT5)
343  {
344  //Any link failure condition is latched in the BMSR register... Reading
345  //the register twice will always return the actual link status
348 
349  //Retrieve current link state
350  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
351 
352  //Link up event?
353  if(linkState && !virtualInterface->linkState)
354  {
355  //Adjust MAC configuration parameters for proper operation
356  interface->linkSpeed = NIC_LINK_SPEED_1GBPS;
357  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
358  interface->nicDriver->updateMacConfig(interface);
359 
360  //Read PHY control register
362 
363  //Check current speed
365  {
366  //1000BASE-T
367  virtualInterface->linkSpeed = NIC_LINK_SPEED_1GBPS;
368  }
369  else if(value & PHYCON_SPEED_100BTX)
370  {
371  //100BASE-TX
372  virtualInterface->linkSpeed = NIC_LINK_SPEED_100MBPS;
373  }
374  else if(value & PHYCON_SPEED_10BT)
375  {
376  //10BASE-T
377  virtualInterface->linkSpeed = NIC_LINK_SPEED_10MBPS;
378  }
379  else
380  {
381  //Debug message
382  TRACE_WARNING("Invalid speed!\r\n");
383  }
384 
385  //Check current duplex mode
387  virtualInterface->duplexMode = NIC_FULL_DUPLEX_MODE;
388  else
389  virtualInterface->duplexMode = NIC_HALF_DUPLEX_MODE;
390 
391  //Update link state
392  virtualInterface->linkState = TRUE;
393 
394  //Process link state change event
395  nicNotifyLinkChange(virtualInterface);
396  }
397  //Link down event
398  else if(!linkState && virtualInterface->linkState)
399  {
400  //Update link state
401  virtualInterface->linkState = FALSE;
402 
403  //Process link state change event
404  nicNotifyLinkChange(virtualInterface);
405  }
406  }
407  }
408  }
409  }
410  else
411 #endif
412  {
413  //Initialize link state
414  linkState = FALSE;
415 
416  //Loop through ports
418  {
419  //Any link failure condition is latched in the BMSR register... Reading
420  //the register twice will always return the actual link status
423 
424  //Retrieve current link state
425  if(value & BMSR_LINK_STATUS)
426  linkState = TRUE;
427  }
428 
429  //Link up event?
430  if(linkState)
431  {
432  //Adjust MAC configuration parameters for proper operation
433  interface->linkSpeed = NIC_LINK_SPEED_1GBPS;
434  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
435  interface->nicDriver->updateMacConfig(interface);
436 
437  //Update link state
438  interface->linkState = TRUE;
439  }
440  else
441  {
442  //Update link state
443  interface->linkState = FALSE;
444  }
445 
446  //Process link state change event
447  nicNotifyLinkChange(interface);
448  }
449 }
450 
451 
452 /**
453  * @brief Add tail tag to Ethernet frame
454  * @param[in] interface Underlying network interface
455  * @param[in] buffer Multi-part buffer containing the payload
456  * @param[in,out] offset Offset to the first payload byte
457  * @param[in] port Switch port identifier
458  * @param[in,out] type Ethernet type
459  * @return Error code
460  **/
461 
463  size_t *offset, uint8_t port, uint16_t *type)
464 {
465 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
466  error_t error;
467  size_t length;
468  const uint16_t *tailTag;
469 
470  //Valid port?
471  if(port >= KSZ9477_PORT1 && port <= KSZ9477_PORT5)
472  {
473  //The two-byte tail tagging is used to indicate the destination port
474  tailTag = &ksz9477IngressTailTag[port];
475 
476  //Retrieve the length of the frame
477  length = netBufferGetLength(buffer) - *offset;
478 
479  //The host controller should manually add padding to the packet before
480  //inserting the tail tag
481  error = ethPadFrame(buffer, &length);
482 
483  //Check status code
484  if(!error)
485  {
486  //The tail tag is inserted at the end of the packet, just before the CRC
487  error = netBufferAppend(buffer, tailTag, sizeof(uint16_t));
488  }
489  }
490  else
491  {
492  //Invalid port identifier
493  error = ERROR_WRONG_IDENTIFIER;
494  }
495 
496  //Return status code
497  return error;
498 #else
499  //Tail tagging mode is not implemented
500  return NO_ERROR;
501 #endif
502 }
503 
504 
505 /**
506  * @brief Decode tail tag from incoming Ethernet frame
507  * @param[in] interface Underlying network interface
508  * @param[in,out] frame Pointer to the received Ethernet frame
509  * @param[in,out] length Length of the frame, in bytes
510  * @param[out] port Switch port identifier
511  * @return Error code
512  **/
513 
514 error_t ksz9477UntagFrame(NetInterface *interface, uint8_t **frame,
515  size_t *length, uint8_t *port)
516 {
517 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
518  error_t error;
519  uint8_t *tailTag;
520 
521  //Valid Ethernet frame received?
522  if(*length >= (sizeof(EthHeader) + sizeof(uint8_t)))
523  {
524  //The tail tag is inserted at the end of the packet, just before the CRC
525  tailTag = *frame + *length - sizeof(uint8_t);
526 
527  //The one byte tail tagging is used to indicate the source port
528  *port = KSZ9477_TAIL_TAG_DECODE(*tailTag);
529 
530  //Strip tail tag from Ethernet frame
531  *length -= sizeof(uint8_t);
532 
533  //Successful processing
534  error = NO_ERROR;
535  }
536  else
537  {
538  //Drop the received frame
539  error = ERROR_INVALID_LENGTH;
540  }
541 
542  //Return status code
543  return error;
544 #else
545  //Tail tagging mode is not implemented
546  return NO_ERROR;
547 #endif
548 }
549 
550 
551 /**
552  * @brief Write PHY register
553  * @param[in] interface Underlying network interface
554  * @param[in] port Port number
555  * @param[in] address PHY register address
556  * @param[in] data Register value
557  **/
558 
559 void ksz9477WritePhyReg(NetInterface *interface, uint8_t port,
560  uint8_t address, uint16_t data)
561 {
562  uint32_t command;
563 
564  //SPI slave mode?
565  if(interface->spiDriver != NULL)
566  {
567  //Set up a write operation
568  command = KSZ9477_SPI_CMD_WRITE;
569  //Set register address
570  command |= KSZ9477_SW_REG_PORT_ETH_PHY(port, address) << 5;
571 
572  //Pull the CS pin low
573  interface->spiDriver->assertCs();
574 
575  //Write 32-bit command
576  interface->spiDriver->transfer((command >> 24) & 0xFF);
577  interface->spiDriver->transfer((command >> 16) & 0xFF);
578  interface->spiDriver->transfer((command >> 8) & 0xFF);
579  interface->spiDriver->transfer(command & 0xFF);
580 
581  //Write 16-bit data
582  interface->spiDriver->transfer(MSB(data));
583  interface->spiDriver->transfer(LSB(data));
584 
585  //Terminate the operation by raising the CS pin
586  interface->spiDriver->deassertCs();
587  }
588  else
589  {
590  //Write the specified PHY register
591  interface->nicDriver->writePhyReg(port, address, data);
592  }
593 }
594 
595 
596 /**
597  * @brief Read PHY register
598  * @param[in] interface Underlying network interface
599  * @param[in] port Port number
600  * @param[in] address PHY register address
601  * @return Register value
602  **/
603 
604 uint16_t ksz9477ReadPhyReg(NetInterface *interface, uint8_t port,
605  uint8_t address)
606 {
607  uint16_t data;
608  uint32_t command;
609 
610  //SPI slave mode?
611  if(interface->spiDriver != NULL)
612  {
613  //Set up a read operation
614  command = KSZ9477_SPI_CMD_READ;
615  //Set register address
616  command |= KSZ9477_SW_REG_PORT_ETH_PHY(port, address) << 5;
617 
618  //Pull the CS pin low
619  interface->spiDriver->assertCs();
620 
621  //Write 32-bit command
622  interface->spiDriver->transfer((command >> 24) & 0xFF);
623  interface->spiDriver->transfer((command >> 16) & 0xFF);
624  interface->spiDriver->transfer((command >> 8) & 0xFF);
625  interface->spiDriver->transfer(command & 0xFF);
626 
627  //Read 16-bit data
628  data = interface->spiDriver->transfer(0xFF) << 8;
629  data |= interface->spiDriver->transfer(0xFF);
630 
631  //Terminate the operation by raising the CS pin
632  interface->spiDriver->deassertCs();
633  }
634  else
635  {
636  //Read the specified PHY register
637  data = interface->nicDriver->readPhyReg(port, address);
638  }
639 
640  //Return register value
641  return data;
642 }
643 
644 
645 /**
646  * @brief Dump PHY registers for debugging purpose
647  * @param[in] interface Underlying network interface
648  * @param[in] port Port number
649  **/
650 
651 void ksz9477DumpPhyReg(NetInterface *interface, uint8_t port)
652 {
653  uint8_t i;
654 
655  //Loop through PHY registers
656  for(i = 0; i < 32; i++)
657  {
658  //Display current PHY register
659  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
660  ksz9477ReadPhyReg(interface, port, i));
661  }
662 
663  //Terminate with a line feed
664  TRACE_DEBUG("\r\n");
665 }
666 
667 
668 /**
669  * @brief Write switch register
670  * @param[in] interface Underlying network interface
671  * @param[in] address Switch register address
672  * @param[in] data Register value
673  **/
674 
675 void ksz9477WriteSwitchReg(NetInterface *interface, uint16_t address,
676  uint8_t data)
677 {
678  uint32_t command;
679 
680  //SPI slave mode?
681  if(interface->spiDriver != NULL)
682  {
683  //Set up a write operation
684  command = KSZ9477_SPI_CMD_WRITE;
685  //Set register address
686  command |= (address << 5) & KSZ9477_SPI_CMD_ADDR;
687 
688  //Pull the CS pin low
689  interface->spiDriver->assertCs();
690 
691  //Write 32-bit command
692  interface->spiDriver->transfer((command >> 24) & 0xFF);
693  interface->spiDriver->transfer((command >> 16) & 0xFF);
694  interface->spiDriver->transfer((command >> 8) & 0xFF);
695  interface->spiDriver->transfer(command & 0xFF);
696 
697  //Write data
698  interface->spiDriver->transfer(data);
699 
700  //Terminate the operation by raising the CS pin
701  interface->spiDriver->deassertCs();
702  }
703  else
704  {
705  //The MDC/MDIO interface does not have access to all the configuration
706  //registers. It can only access the standard MIIM registers
707  }
708 }
709 
710 
711 /**
712  * @brief Read switch register
713  * @param[in] interface Underlying network interface
714  * @param[in] address Switch register address
715  * @return Register value
716  **/
717 
718 uint8_t ksz9477ReadSwitchReg(NetInterface *interface, uint16_t address)
719 {
720  uint8_t data;
721  uint32_t command;
722 
723  //SPI slave mode?
724  if(interface->spiDriver != NULL)
725  {
726  //Set up a read operation
727  command = KSZ9477_SPI_CMD_READ;
728  //Set register address
729  command |= (address << 5) & KSZ9477_SPI_CMD_ADDR;
730 
731  //Pull the CS pin low
732  interface->spiDriver->assertCs();
733 
734  //Write 32-bit command
735  interface->spiDriver->transfer((command >> 24) & 0xFF);
736  interface->spiDriver->transfer((command >> 16) & 0xFF);
737  interface->spiDriver->transfer((command >> 8) & 0xFF);
738  interface->spiDriver->transfer(command & 0xFF);
739 
740  //Read data
741  data = interface->spiDriver->transfer(0xFF);
742 
743  //Terminate the operation by raising the CS pin
744  interface->spiDriver->deassertCs();
745  }
746  else
747  {
748  //The MDC/MDIO interface does not have access to all the configuration
749  //registers. It can only access the standard MIIM registers
750  data = 0;
751  }
752 
753  //Return register value
754  return data;
755 }
756 
757 
758 /**
759  * @brief Dump switch registers for debugging purpose
760  * @param[in] interface Underlying network interface
761  **/
762 
764 {
765  uint16_t i;
766 
767  //Loop through switch registers
768  for(i = 0; i < 256; i++)
769  {
770  //Display current switch register
771  TRACE_DEBUG("0x%02" PRIX16 " (%02" PRIu16 ") : 0x%02" PRIX8 "\r\n",
772  i, i, ksz9477ReadSwitchReg(interface, i));
773  }
774 
775  //Terminate with a line feed
776  TRACE_DEBUG("\r\n");
777 }
error_t ksz9477Init(NetInterface *interface)
KSZ9477 Ethernet switch initialization.
void ksz9477EventHandler(NetInterface *interface)
KSZ9477 event handler.
__start_packed struct @114 EthHeader
Ethernet frame header.
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:536
#define KSZ9477_TAIL_TAG_ENCODE(port)
#define KSZ9477_SW_REG_SWITCH_OP
#define MSB(x)
Definition: os_port.h:58
TCP/IP stack core.
#define KSZ9477_SPI_CMD_WRITE
Debugging facilities.
size_t netBufferGetLength(const NetBuffer *buffer)
Get the actual length of a multi-part buffer.
Definition: net_mem.c:297
error_t ksz9477UntagFrame(NetInterface *interface, uint8_t **frame, size_t *length, uint8_t *port)
Decode tail tag from incoming Ethernet frame.
#define PORT_OP_CTRL0_TAIL_TAG_EN
#define BMSR_LINK_STATUS
Definition: ar8031_driver.h:97
const uint16_t ksz9477IngressTailTag[6]
Tail tag rules (host to KSZ9477)
Helper functions for Ethernet.
#define KSZ9477_SW_REG_XMII_PORT_CTRL1(n)
#define PHYCON_SPEED_100BTX
#define KSZ9477_PHY_REG_BMSR
char_t type
#define PORT_MSTP_STATE_LEARNING_DIS
#define LSB(x)
Definition: os_port.h:54
error_t ethPadFrame(NetBuffer *buffer, size_t *length)
Ethernet frame padding.
void ksz9477DisableIrq(NetInterface *interface)
Disable interrupts.
void ksz9477WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
#define TRUE
Definition: os_port.h:50
#define XMII_PORT_CTRL1_RGMII_ID_IG
#define PHYCON_SPEED_1000BT
PHY driver.
Definition: nic.h:199
#define PORT_MSTP_STATE_RECEIVE_EN
error_t ksz9477TagFrame(NetInterface *interface, NetBuffer *buffer, size_t *offset, uint8_t port, uint16_t *type)
Add tail tag to Ethernet frame.
#define KSZ9477_SW_REG_PORT_MSTP_STATE(n)
#define XMII_PORT_CTRL1_RGMII_ID_EG
#define NET_INTERFACE_COUNT
Definition: net.h:109
KSZ9477 Ethernet switch.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
NetInterface netInterface[NET_INTERFACE_COUNT]
Definition: net.c:78
#define KSZ9477_SPI_CMD_ADDR
#define KSZ9477_SPI_CMD_READ
#define KSZ9477_SW_REG_PORT_ETH_PHY(n, a)
void ksz9477EnableIrq(NetInterface *interface)
Enable interrupts.
#define KSZ9477_SW_REG_CHIP_ID1
uint8_t ksz9477ReadSwitchReg(NetInterface *interface, uint16_t address)
Read switch register.
#define TRACE_INFO(...)
Definition: debug.h:94
#define PHYCON_SPEED_10BT
Success.
Definition: error.h:44
Ipv6Addr address
OsEvent netEvent
Definition: net.c:76
#define KSZ9477_SW_REG_PORT_OP_CTRL0(n)
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
error_t
Error codes.
Definition: error.h:42
#define TRACE_WARNING(...)
Definition: debug.h:84
const PhyDriver ksz9477PhyDriver
KSZ9477 Ethernet switch driver.
void ksz9477Tick(NetInterface *interface)
KSZ9477 timer handler.
#define PHYCON_DUPLEX_STATUS
unsigned int uint_t
Definition: compiler_port.h:45
error_t netBufferAppend(NetBuffer *dest, const void *src, size_t length)
Append data a multi-part buffer.
Definition: net_mem.c:586
void osReleaseMutex(OsMutex *mutex)
Release ownership of the specified mutex object.
uint8_t data[]
Definition: dtls_misc.h:169
#define NetInterface
Definition: net.h:36
uint8_t value[]
Definition: dtls_misc.h:143
uint16_t port
Definition: dns_common.h:223
#define CHIP_ID1_CHIP_ID_MSB_DEFAULT
void ksz9477DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
OsMutex netMutex
Definition: net.c:74
void ksz9477DumpSwitchReg(NetInterface *interface)
Dump switch registers for debugging purpose.
void ksz9477WriteSwitchReg(NetInterface *interface, uint16_t address, uint8_t data)
Write switch register.
#define KSZ9477_TAIL_TAG_DECODE(tag)
#define SWITCH_OP_START_SWITCH
#define KSZ9477_PHY_REG_PHYCON
#define KSZ9477_PORT5
uint8_t length
Definition: dtls_misc.h:142
#define PORT_MSTP_STATE_TRANSMIT_EN
#define KSZ9477_PORT1
#define FALSE
Definition: os_port.h:46
int bool_t
Definition: compiler_port.h:49
bool_t ksz9477GetLinkState(NetInterface *interface, uint8_t port)
Get link state.
void osAcquireMutex(OsMutex *mutex)
Acquire ownership of the specified mutex object.
uint16_t ksz9477ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
#define TRACE_DEBUG(...)
Definition: debug.h:106