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31 #ifndef _LAN8672_DRIVER_H
32 #define _LAN8672_DRIVER_H
38 #ifndef LAN8672_PHY_ADDR
39 #define LAN8672_PHY_ADDR 0
40 #elif (LAN8672_PHY_ADDR < 0 || LAN8672_PHY_ADDR > 31)
41 #error LAN8672_PHY_ADDR parameter is not valid
45 #ifndef LAN8672_PLCA_SUPPORT
46 #define LAN8672_PLCA_SUPPORT ENABLED
47 #elif (LAN8672_PLCA_SUPPORT != ENABLED && LAN8672_PLCA_SUPPORT != DISABLED)
48 #error LAN8672_PLCA_SUPPORT parameter is not valid
52 #ifndef LAN8672_NODE_COUNT
53 #define LAN8672_NODE_COUNT 8
54 #elif (LAN8672_NODE_COUNT < 0 || LAN8672_NODE_COUNT > 255)
55 #error LAN8672_NODE_COUNT parameter is not valid
59 #ifndef LAN8672_LOCAL_ID
60 #define LAN8672_LOCAL_ID 1
61 #elif (LAN8672_LOCAL_ID < 0 || LAN8672_LOCAL_ID > 255)
62 #error LAN8672_LOCAL_ID parameter is not valid
66 #define LAN8672_BASIC_CONTROL 0x00
67 #define LAN8672_BASIC_STATUS 0x01
68 #define LAN8672_PHY_ID0 0x02
69 #define LAN8672_PHY_ID1 0x03
70 #define LAN8672_MMDCTRL 0x0D
71 #define LAN8672_MMDAD 0x0E
72 #define LAN8672_STRAP_CTRL0 0x12
75 #define LAN8672_PMA_PMD_EXT_ABILITY 0x01, 0x0012
76 #define LAN8672_T1PMAPMDCTL 0x01, 0x0834
77 #define LAN8672_T1SPMACTL 0x01, 0x08F9
78 #define LAN8672_T1SPMASTS 0x01, 0x08FA
79 #define LAN8672_T1STSTCTL 0x01, 0x08FB
80 #define LAN8672_T1SPCSCTL 0x02, 0x08F3
81 #define LAN8672_T1SPCSSTS 0x02, 0x08F4
82 #define LAN8672_T1SPCSDIAG1 0x02, 0x08F5
83 #define LAN8672_T1SPCSDIAG2 0x02, 0x08F6
84 #define LAN8672_CTRL1 0x1F, 0x0010
85 #define LAN8672_STS1 0x1F, 0x0018
86 #define LAN8672_STS2 0x1F, 0x0019
87 #define LAN8672_STS3 0x1F, 0x001A
88 #define LAN8672_IMSK1 0x1F, 0x001C
89 #define LAN8672_IMSK2 0x1F, 0x001D
90 #define LAN8672_CTRCTRL 0x1F, 0x0020
91 #define LAN8672_TOCNTH 0x1F, 0x0024
92 #define LAN8672_TOCNTL 0x1F, 0x0025
93 #define LAN8672_BCNCNTH 0x1F, 0x0026
94 #define LAN8672_BCNCNTL 0x1F, 0x0027
95 #define LAN8672_PADCTRL3 0x1F, 0x00CB
96 #define LAN8672_MIDVER 0x1F, 0xCA00
97 #define LAN8672_PLCA_CTRL0 0x1F, 0xCA01
98 #define LAN8672_PLCA_CTRL1 0x1F, 0xCA02
99 #define LAN8672_PLCA_STS 0x1F, 0xCA03
100 #define LAN8672_PLCA_TOTMR 0x1F, 0xCA04
101 #define LAN8672_PLCA_BURST 0x1F, 0xCA05
104 #define LAN8672_BASIC_CONTROL_SW_RESET 0x8000
105 #define LAN8672_BASIC_CONTROL_LOOPBACK 0x4000
106 #define LAN8672_BASIC_CONTROL_SPD_SEL_LSB 0x2000
107 #define LAN8672_BASIC_CONTROL_AUTO_NEG_EN 0x1000
108 #define LAN8672_BASIC_CONTROL_PD 0x0800
109 #define LAN8672_BASIC_CONTROL_ISOLATE 0x0400
110 #define LAN8672_BASIC_CONTROL_RE_AUTO_NEG 0x0200
111 #define LAN8672_BASIC_CONTROL_DUPLEX_MODE 0x0100
112 #define LAN8672_BASIC_CONTROL_COL_TEST 0x0080
113 #define LAN8672_BASIC_CONTROL_SPD_SEL_MSB 0x0040
116 #define LAN8672_BASIC_STATUS_100BT4 0x8000
117 #define LAN8672_BASIC_STATUS_100BTX_FD 0x4000
118 #define LAN8672_BASIC_STATUS_100BTX_HD 0x2000
119 #define LAN8672_BASIC_STATUS_10BT_FD 0x1000
120 #define LAN8672_BASIC_STATUS_10BT_HD 0x0800
121 #define LAN8672_BASIC_STATUS_100BT2_FD 0x0400
122 #define LAN8672_BASIC_STATUS_100BT2_HD 0x0200
123 #define LAN8672_BASIC_STATUS_EXT_STAT 0x0100
124 #define LAN8672_BASIC_STATUS_MF_PRE_SUP 0x0040
125 #define LAN8672_BASIC_STATUS_AUTO_NEG_COMP 0x0020
126 #define LAN8672_BASIC_STATUS_RMT_FAULT 0x0010
127 #define LAN8672_BASIC_STATUS_AUTO_NEG 0x0008
128 #define LAN8672_BASIC_STATUS_LINK_STAT 0x0004
129 #define LAN8672_BASIC_STATUS_JAB_DET 0x0002
130 #define LAN8672_BASIC_STATUS_EXT_CAP 0x0001
133 #define LAN8672_PHY_ID0_OUI_2_9 0xFF00
134 #define LAN8672_PHY_ID0_OUI_2_9_DEFAULT 0x0000
135 #define LAN8672_PHY_ID0_OUI_10_17 0x00FF
136 #define LAN8672_PHY_ID0_OUI_10_17_DEFAULT 0x0007
139 #define LAN8672_PHY_ID1_OUI_18_23 0xFC00
140 #define LAN8672_PHY_ID1_OUI_18_23_DEFAULT 0xC000
141 #define LAN8672_PHY_ID1_MODEL 0x03F0
142 #define LAN8672_PHY_ID1_MODEL_DEFAULT 0x0160
143 #define LAN8672_PHY_ID1_REV 0x000F
144 #define LAN8672_PHY_ID1_REV_0 0x0000
145 #define LAN8672_PHY_ID1_REV_2 0x0002
148 #define LAN8672_MMDCTRL_FNCTN 0xC000
149 #define LAN8672_MMDCTRL_FNCTN_ADDR 0x0000
150 #define LAN8672_MMDCTRL_FNCTN_DATA_NO_POST_INC 0x4000
151 #define LAN8672_MMDCTRL_FNCTN_DATA_POST_INC_RW 0x8000
152 #define LAN8672_MMDCTRL_FNCTN_DATA_POST_INC_W 0xC000
153 #define LAN8672_MMDCTRL_DEVAD 0x001F
154 #define LAN8672_MMDCTRL_DEVAD_PMA_PMD 0x0001
155 #define LAN8672_MMDCTRL_DEVAD_PCS 0x0002
156 #define LAN8672_MMDCTRL_DEVAD_VENDOR_SPECIFIC_2 0x001F
159 #define LAN8672_MMDAD_ADR_DATA 0xFFFF
162 #define LAN8672_STRAP_CTRL0_MITYP 0x0180
163 #define LAN8672_STRAP_CTRL0_MITYP_RMII 0x0080
164 #define LAN8672_STRAP_CTRL0_MITYP_MII 0x0100
165 #define LAN8672_STRAP_CTRL0_PKGTYP 0x0060
166 #define LAN8672_STRAP_CTRL0_PKGTYP_32_PIN 0x0020
167 #define LAN8672_STRAP_CTRL0_PKGTYP_24_PIN 0x0040
168 #define LAN8672_STRAP_CTRL0_PKGTYP_36_PIN 0x0060
169 #define LAN8672_STRAP_CTRL0_SMIADR 0x001F
172 #define LAN8672_PMA_PMD_EXT_ABILITY_T1SABL 0x0008
173 #define LAN8672_PMA_PMD_EXT_ABILITY_T1LABL 0x0004
176 #define LAN8672_T1PMAPMDCTL_TYPSEL 0x000F
177 #define LAN8672_T1PMAPMDCTL_TYPSEL_100BASE_T1 0x0000
178 #define LAN8672_T1PMAPMDCTL_TYPSEL_1000BASE_T1 0x0001
179 #define LAN8672_T1PMAPMDCTL_TYPSEL_10BASE_T1L 0x0002
180 #define LAN8672_T1PMAPMDCTL_TYPSEL_10BASE_T1S 0x0003
183 #define LAN8672_T1SPMACTL_RST 0x8000
184 #define LAN8672_T1SPMACTL_TXD 0x4000
185 #define LAN8672_T1SPMACTL_LPE 0x0800
186 #define LAN8672_T1SPMACTL_MDE 0x0400
187 #define LAN8672_T1SPMACTL_LBE 0x0001
190 #define LAN8672_T1SPMASTS_LBA 0x2000
191 #define LAN8672_T1SPMASTS_LPA 0x0800
192 #define LAN8672_T1SPMASTS_MDA 0x0400
193 #define LAN8672_T1SPMASTS_RXFA 0x0200
194 #define LAN8672_T1SPMASTS_RXFD 0x0002
197 #define LAN8672_T1STSTCTL_TSTCTL 0xE000
198 #define LAN8672_T1STSTCTL_TSTCTL_NORMAL 0x0000
199 #define LAN8672_T1STSTCTL_TSTCTL_TEST_MODE_1 0x2000
200 #define LAN8672_T1STSTCTL_TSTCTL_TEST_MODE_2 0x4000
201 #define LAN8672_T1STSTCTL_TSTCTL_TEST_MODE_3 0x6000
202 #define LAN8672_T1STSTCTL_TSTCTL_TEST_MODE_4 0x8000
205 #define LAN8672_T1SPCSCTL_RST 0x8000
206 #define LAN8672_T1SPCSCTL_LBE 0x4000
207 #define LAN8672_T1SPCSCTL_DUPLEX 0x0100
210 #define LAN8672_T1SPCSSTS_FAULT 0x0080
213 #define LAN8672_T1SPCSDIAG1_RMTJABCNT 0xFFFF
216 #define LAN8672_T1SPCSDIAG2_CORTXCNT 0xFFFF
219 #define LAN8672_CTRL1_DIGLBE 0x0002
222 #define LAN8672_STS1_TXCOL 0x0400
223 #define LAN8672_STS1_TXJAB 0x0200
224 #define LAN8672_STS1_EMPCYC 0x0080
225 #define LAN8672_STS1_RXINTO 0x0040
226 #define LAN8672_STS1_UNEXPB 0x0020
227 #define LAN8672_STS1_BCNBFTO 0x0010
228 #define LAN8672_STS1_PLCASYM 0x0004
229 #define LAN8672_STS1_ESDERR 0x0002
230 #define LAN8672_STS1_DEC5B 0x0001
233 #define LAN8672_STS2_RESETC 0x0800
236 #define LAN8672_STS3_ERRTOID 0x0080
239 #define LAN8672_IMSK1_TXCOLM 0x0400
240 #define LAN8672_IMSK1_TXJABM 0x0200
241 #define LAN8672_IMSK1_EMPCYCM 0x0080
242 #define LAN8672_IMSK1_RXINTOM 0x0040
243 #define LAN8672_IMSK1_UNEXPBM 0x0020
244 #define LAN8672_IMSK1_BCNBFTOM 0x0010
245 #define LAN8672_IMSK1_PLCASYMM 0x0004
246 #define LAN8672_IMSK1_ESDERRM 0x0002
247 #define LAN8672_IMSK1_DEC5BM 0x0001
250 #define LAN8672_IMSK2_RESETCM 0x0800
253 #define LAN8672_CTRCTRL_TOCTRE 0x0002
254 #define LAN8672_CTRCTRL_BCNCTRE 0x0001
257 #define LAN8672_TOCNTH_TOCNT_31_16 0xFFFF
260 #define LAN8672_TOCNTL_TOCNT_15_0 0xFFFF
263 #define LAN8672_BCNCNTH_BCNCNT_31_16 0xFFFF
266 #define LAN8672_BCNCNTL_BCNCNT_15_0 0xFFFF
269 #define LAN8672_PADCTRL3_PDRV4 0xC000
270 #define LAN8672_PADCTRL3_PDRV4_LOW 0x0000
271 #define LAN8672_PADCTRL3_PDRV4_MEDIUM_LOW 0x4000
272 #define LAN8672_PADCTRL3_PDRV4_MEDIUM_HIGH 0x8000
273 #define LAN8672_PADCTRL3_PDRV4_HIGH 0xC000
274 #define LAN8672_PADCTRL3_PDRV3 0x3000
275 #define LAN8672_PADCTRL3_PDRV3_LOW 0x0000
276 #define LAN8672_PADCTRL3_PDRV3_MEDIUM_LOW 0x1000
277 #define LAN8672_PADCTRL3_PDRV3_MEDIUM_HIGH 0x2000
278 #define LAN8672_PADCTRL3_PDRV3_HIGH 0x3000
279 #define LAN8672_PADCTRL3_PDRV2 0x0C00
280 #define LAN8672_PADCTRL3_PDRV2_LOW 0x0000
281 #define LAN8672_PADCTRL3_PDRV2_MEDIUM_LOW 0x0400
282 #define LAN8672_PADCTRL3_PDRV2_MEDIUM_HIGH 0x0800
283 #define LAN8672_PADCTRL3_PDRV2_HIGH 0x0C00
284 #define LAN8672_PADCTRL3_PDRV1 0x0300
285 #define LAN8672_PADCTRL3_PDRV1_LOW 0x0000
286 #define LAN8672_PADCTRL3_PDRV1_MEDIUM_LOW 0x0100
287 #define LAN8672_PADCTRL3_PDRV1_MEDIUM_HIGH 0x0200
288 #define LAN8672_PADCTRL3_PDRV1_HIGH 0x0300
291 #define LAN8672_MIDVER_IDM 0xFF00
292 #define LAN8672_MIDVER_IDM_DEFAULT 0x0A00
293 #define LAN8672_MIDVER_VER 0x00FF
294 #define LAN8672_MIDVER_VER_DEFAULT 0x0010
297 #define LAN8672_PLCA_CTRL0_EN 0x8000
298 #define LAN8672_PLCA_CTRL0_RST 0x4000
301 #define LAN8672_PLCA_CTRL1_NCNT 0xFF00
302 #define LAN8672_PLCA_CTRL1_NCNT_DEFAULT 0x0800
303 #define LAN8672_PLCA_CTRL1_ID 0x00FF
304 #define LAN8672_PLCA_CTRL1_ID_PLCA_COORDINATOR 0x0000
305 #define LAN8672_PLCA_CTRL1_ID_PLCA_DISABLED 0x00FF
308 #define LAN8672_PLCA_STS_PST 0x8000
311 #define LAN8672_PLCA_TOTMR_TOTMR 0x00FF
312 #define LAN8672_PLCA_TOTMR_TOTMR_DEFAULT 0x0020
315 #define LAN8672_PLCA_BURST_MAXBC 0xFF00
316 #define LAN8672_PLCA_BURST_MAXBC_DISABLED 0x0000
317 #define LAN8672_PLCA_BURST_BTMR 0x00FF
318 #define LAN8672_PLCA_BURST_BTMR_DEFAULT 0x0080
void lan8672ModifyMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr, uint16_t mask, uint16_t data)
Modify MMD register.
void lan8672Tick(NetInterface *interface)
LAN8672 timer handler.
void lan8672EnableIrq(NetInterface *interface)
Enable interrupts.
void lan8672EventHandler(NetInterface *interface)
LAN8672 event handler.
const PhyDriver lan8672PhyDriver
LAN8672 Ethernet PHY driver.
void lan8672InitHook(NetInterface *interface)
LAN8672 custom configuration.
error_t lan8672Init(NetInterface *interface)
LAN8672 PHY transceiver initialization.
void lan8672WriteMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr, uint16_t data)
Write MMD register.
void lan8672WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
Network interface controller abstraction layer.
uint16_t lan8672ReadMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr)
Read MMD register.
void lan8672DisableIrq(NetInterface *interface)
Disable interrupts.
void lan8672DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
uint16_t lan8672ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.