mv88e1512_driver.c
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1 /**
2  * @file mv88e1512_driver.c
3  * @brief 88E1512 Gigabit Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.4
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief 88E1512 Ethernet PHY driver
42  **/
43 
45 {
51  NULL,
52  NULL
53 };
54 
55 
56 /**
57  * @brief 88E1512 PHY transceiver initialization
58  * @param[in] interface Underlying network interface
59  * @return Error code
60  **/
61 
63 {
64  //Debug message
65  TRACE_INFO("Initializing 88E1512...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = MV88E1512_PHY_ADDR;
72  }
73 
74  //Reset PHY transceiver
76 
77  //Wait for the reset to complete
79  {
80  }
81 
82  //Dump PHY registers for debugging purpose
83  mv88e1512DumpPhyReg(interface);
84 
85  //Force the TCP/IP stack to poll the link state at startup
86  interface->phyEvent = TRUE;
87  //Notify the TCP/IP stack of the event
89 
90  //Successful initialization
91  return NO_ERROR;
92 }
93 
94 
95 /**
96  * @brief 88E1512 timer handler
97  * @param[in] interface Underlying network interface
98  **/
99 
100 void mv88e1512Tick(NetInterface *interface)
101 {
102  uint16_t value;
103  bool_t linkState;
104 
105  //Read basic status register
107  //Retrieve current link state
108  linkState = (value & MV88E1512_BMSR_LINK_STATUS) ? TRUE : FALSE;
109 
110  //Link up event?
111  if(linkState && !interface->linkState)
112  {
113  //Set event flag
114  interface->phyEvent = TRUE;
115  //Notify the TCP/IP stack of the event
117  }
118  //Link down event?
119  else if(!linkState && interface->linkState)
120  {
121  //Set event flag
122  interface->phyEvent = TRUE;
123  //Notify the TCP/IP stack of the event
125  }
126 }
127 
128 
129 /**
130  * @brief Enable interrupts
131  * @param[in] interface Underlying network interface
132  **/
133 
135 {
136 }
137 
138 
139 /**
140  * @brief Disable interrupts
141  * @param[in] interface Underlying network interface
142  **/
143 
145 {
146 }
147 
148 
149 /**
150  * @brief 88E1512 event handler
151  * @param[in] interface Underlying network interface
152  **/
153 
155 {
156  uint16_t status;
157 
158  //Read status register
159  status = mv88e1512ReadPhyReg(interface, MV88E1512_SSR1);
160 
161  //Link is up?
162  if(status & MV88E1512_SSR1_LINK)
163  {
164  //Check current speed
165  switch(status & MV88E1512_SSR1_SPEED)
166  {
167  //10BASE-T
169  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
170  break;
171  //100BASE-TX
173  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
174  break;
175  //1000BASE-T
177  interface->linkSpeed = NIC_LINK_SPEED_1GBPS;
178  break;
179  //Unknown speed
180  default:
181  //Debug message
182  TRACE_WARNING("Invalid speed\r\n");
183  break;
184  }
185 
186  //Check current duplex mode
187  if(status & MV88E1512_SSR1_DUPLEX)
188  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
189  else
190  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
191 
192  //Update link state
193  interface->linkState = TRUE;
194 
195  //Adjust MAC configuration parameters for proper operation
196  interface->nicDriver->updateMacConfig(interface);
197  }
198  else
199  {
200  //Update link state
201  interface->linkState = FALSE;
202  }
203 
204  //Process link state change event
205  nicNotifyLinkChange(interface);
206 }
207 
208 
209 /**
210  * @brief Write PHY register
211  * @param[in] interface Underlying network interface
212  * @param[in] address PHY register address
213  * @param[in] data Register value
214  **/
215 
216 void mv88e1512WritePhyReg(NetInterface *interface, uint8_t address,
217  uint16_t data)
218 {
219  //Write the specified PHY register
220  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
221  interface->phyAddr, address, data);
222 }
223 
224 
225 /**
226  * @brief Read PHY register
227  * @param[in] interface Underlying network interface
228  * @param[in] address PHY register address
229  * @return Register value
230  **/
231 
232 uint16_t mv88e1512ReadPhyReg(NetInterface *interface, uint8_t address)
233 {
234  //Read the specified PHY register
235  return interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
236  interface->phyAddr, address);
237 }
238 
239 
240 /**
241  * @brief Dump PHY registers for debugging purpose
242  * @param[in] interface Underlying network interface
243  **/
244 
246 {
247  uint8_t i;
248 
249  //Loop through PHY registers
250  for(i = 0; i < 32; i++)
251  {
252  //Display current PHY register
253  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
254  mv88e1512ReadPhyReg(interface, i));
255  }
256 
257  //Terminate with a line feed
258  TRACE_DEBUG("\r\n");
259 }
#define MV88E1512_SSR1_SPEED_1000MBPS
uint16_t mv88e1512ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:536
TCP/IP stack core.
Debugging facilities.
const PhyDriver mv88e1512PhyDriver
88E1512 Ethernet PHY driver
#define MV88E1512_SSR1_DUPLEX
#define MV88E1512_BMSR_LINK_STATUS
void mv88e1512DisableIrq(NetInterface *interface)
Disable interrupts.
#define SMI_OPCODE_READ
Definition: nic.h:63
#define TRUE
Definition: os_port.h:50
88E1512 Gigabit Ethernet PHY transceiver
#define SMI_OPCODE_WRITE
Definition: nic.h:62
void mv88e1512DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define MV88E1512_PHY_ADDR
PHY driver.
Definition: nic.h:214
void mv88e1512WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define MV88E1512_SSR1_SPEED_10MBPS
#define MV88E1512_SSR1_SPEED
void mv88e1512Tick(NetInterface *interface)
88E1512 timer handler
#define MV88E1512_SSR1_SPEED_100MBPS
#define MV88E1512_SSR1_LINK
#define MV88E1512_BMCR
#define MV88E1512_BMCR_RESET
#define TRACE_INFO(...)
Definition: debug.h:94
#define MV88E1512_SSR1
Success.
Definition: error.h:44
Ipv6Addr address
OsEvent netEvent
Definition: net.c:74
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
error_t
Error codes.
Definition: error.h:42
#define TRACE_WARNING(...)
Definition: debug.h:84
error_t mv88e1512Init(NetInterface *interface)
88E1512 PHY transceiver initialization
uint8_t data[]
Definition: dtls_misc.h:169
#define NetInterface
Definition: net.h:36
uint8_t value[]
Definition: dtls_misc.h:143
void mv88e1512EventHandler(NetInterface *interface)
88E1512 event handler
#define FALSE
Definition: os_port.h:46
int bool_t
Definition: compiler_port.h:49
#define MV88E1512_BMSR
void mv88e1512EnableIrq(NetInterface *interface)
Enable interrupts.
#define TRACE_DEBUG(...)
Definition: debug.h:106