Data Structures | Macros | Functions | Variables
pic32cz_eth_driver.h File Reference

PIC32CZ CA70/CA80/CA90 Gigabit Ethernet MAC driver. More...

Go to the source code of this file.

Data Structures

struct  Pic32czTxBufferDesc
 Transmit buffer descriptor. More...
 
struct  Pic32czRxBufferDesc
 Receive buffer descriptor. More...
 

Macros

#define PIC32CZ_ETH_TX_BUFFER_COUNT   8
 
#define PIC32CZ_ETH_TX_BUFFER_SIZE   1536
 
#define PIC32CZ_ETH_RX_BUFFER_COUNT   96
 
#define PIC32CZ_ETH_RX_BUFFER_SIZE   128
 
#define PIC32CZ_ETH_DUMMY_BUFFER_COUNT   2
 
#define PIC32CZ_ETH_DUMMY_BUFFER_SIZE   128
 
#define PIC32CZ_ETH_IRQ_PRIORITY_GROUPING   4
 
#define PIC32CZ_ETH_IRQ_GROUP_PRIORITY   6
 
#define PIC32CZ_ETH_IRQ_SUB_PRIORITY   0
 
#define PIC32CZ_ETH_RAM_SECTION   ".ram_no_cache"
 
#define GMAC_TX_USED   0x80000000
 
#define GMAC_TX_WRAP   0x40000000
 
#define GMAC_TX_RLE_ERROR   0x20000000
 
#define GMAC_TX_UNDERRUN_ERROR   0x10000000
 
#define GMAC_TX_AHB_ERROR   0x08000000
 
#define GMAC_TX_LATE_COL_ERROR   0x04000000
 
#define GMAC_TX_CHECKSUM_ERROR   0x00700000
 
#define GMAC_TX_NO_CRC   0x00010000
 
#define GMAC_TX_LAST   0x00008000
 
#define GMAC_TX_LENGTH   0x00003FFF
 
#define GMAC_RX_ADDRESS   0xFFFFFFFC
 
#define GMAC_RX_WRAP   0x00000002
 
#define GMAC_RX_OWNERSHIP   0x00000001
 
#define GMAC_RX_BROADCAST   0x80000000
 
#define GMAC_RX_MULTICAST_HASH   0x40000000
 
#define GMAC_RX_UNICAST_HASH   0x20000000
 
#define GMAC_RX_SAR   0x08000000
 
#define GMAC_RX_SAR_MASK   0x06000000
 
#define GMAC_RX_TYPE_ID   0x01000000
 
#define GMAC_RX_SNAP   0x01000000
 
#define GMAC_RX_TYPE_ID_MASK   0x00C00000
 
#define GMAC_RX_CHECKSUM_VALID   0x00C00000
 
#define GMAC_RX_VLAN_TAG   0x00200000
 
#define GMAC_RX_PRIORITY_TAG   0x00100000
 
#define GMAC_RX_VLAN_PRIORITY   0x000E0000
 
#define GMAC_RX_CFI   0x00010000
 
#define GMAC_RX_EOF   0x00008000
 
#define GMAC_RX_SOF   0x00004000
 
#define GMAC_RX_LENGTH_MSB   0x00002000
 
#define GMAC_RX_BAD_FCS   0x00002000
 
#define GMAC_RX_LENGTH   0x00001FFF
 
#define GMAC_IRQn   ETH_PRI_Q_0_IRQn
 
#define GMAC_Handler   ETH_PRI_Q_0_Handler
 
#define GMAC_REGS   ETH_REGS
 
#define GMAC_NCR   ETH_NCR
 
#define GMAC_NCFGR   ETH_NCFGR
 
#define GMAC_NSR   ETH_NSR
 
#define GMAC_DCFGR   ETH_DCFGR
 
#define GMAC_TSR   ETH_TSR
 
#define GMAC_RBQB   ETH_RBQB
 
#define GMAC_TBQB   ETH_TBQB
 
#define GMAC_RSR   ETH_RSR
 
#define GMAC_ISR   ETH_ISR
 
#define GMAC_IER   ETH_IER
 
#define GMAC_IDR   ETH_IDR
 
#define GMAC_MAN   ETH_MAN
 
#define GMAC_HRB   ETH_HRB
 
#define GMAC_HRT   ETH_HRT
 
#define GMAC_SA   SA
 
#define GMAC_SAB   ETH_SAB
 
#define GMAC_SAT   ETH_SAT
 
#define GMAC_ISRPQ   ETH_ISRQ
 
#define GMAC_TBQBAPQ   ETH_TBPQB
 
#define GMAC_RBQBAPQ   ETH_RBPQB
 
#define GMAC_RBSRPQ   ETH_RBQSZ
 
#define GMAC_IDRPQ   ETH_IDRQ
 
#define GMAC_NCR_TSTART_Msk   ETH_NCR_TSTART_Msk
 
#define GMAC_NCR_MPE_Msk   ETH_NCR_MPE_Msk
 
#define GMAC_NCR_TXEN_Msk   ETH_NCR_TXEN_Msk
 
#define GMAC_NCR_RXEN_Msk   ETH_NCR_RXEN_Msk
 
#define GMAC_NCFGR_DBW   ETH_NCFGR_DBW
 
#define GMAC_NCFGR_CLK   ETH_NCFGR_CLK
 
#define GMAC_NCFGR_GIGE_Msk   ETH_NCFGR_GIGE_Msk
 
#define GMAC_NCFGR_MAXFS_Msk   ETH_NCFGR_MAXFS_Msk
 
#define GMAC_NCFGR_UNIHEN_Msk   ETH_NCFGR_UNIHEN_Msk
 
#define GMAC_NCFGR_MTIHEN_Msk   ETH_NCFGR_MTIHEN_Msk
 
#define GMAC_NCFGR_FD_Msk   ETH_NCFGR_FD_Msk
 
#define GMAC_NCFGR_SPD_Msk   ETH_NCFGR_SPD_Msk
 
#define GMAC_NSR_IDLE_Msk   ETH_NSR_IDLE_Msk
 
#define GMAC_DCFGR_DRBS   ETH_DCFGR_DRBS
 
#define GMAC_DCFGR_TXPBMS_Msk   ETH_DCFGR_TXPBMS_Msk
 
#define GMAC_DCFGR_RXBMS   ETH_DCFGR_RXBMS
 
#define GMAC_DCFGR_FBLDO   ETH_DCFGR_FBLDO
 
#define GMAC_TSR_HRESP_Msk   ETH_TSR_HRESP_Msk
 
#define GMAC_TSR_UND_Msk   ETH_TSR_UND_Msk
 
#define GMAC_TSR_TXCOMP_Msk   ETH_TSR_TXCOMP_Msk
 
#define GMAC_TSR_TFC_Msk   ETH_TSR_TFC_Msk
 
#define GMAC_TSR_TXGO_Msk   ETH_TSR_TXGO_Msk
 
#define GMAC_TSR_RLE_Msk   ETH_TSR_RLE_Msk
 
#define GMAC_TSR_COL_Msk   ETH_TSR_COL_Msk
 
#define GMAC_TSR_UBR_Msk   ETH_TSR_UBR_Msk
 
#define GMAC_RSR_HNO_Msk   ETH_RSR_HNO_Msk
 
#define GMAC_RSR_RXOVR_Msk   ETH_RSR_RXOVR_Msk
 
#define GMAC_RSR_REC_Msk   ETH_RSR_REC_Msk
 
#define GMAC_RSR_BNA_Msk   ETH_RSR_BNA_Msk
 
#define GMAC_IER_HRESP_Msk   ETH_IER_HRESP_Msk
 
#define GMAC_IER_ROVR_Msk   ETH_IER_ROVR_Msk
 
#define GMAC_IER_TCOMP_Msk   ETH_IER_TCOMP_Msk
 
#define GMAC_IER_TFC_Msk   ETH_IER_TFC_Msk
 
#define GMAC_IER_RLEX_Msk   ETH_IER_RLEX_Msk
 
#define GMAC_IER_TUR_Msk   ETH_IER_TUR_Msk
 
#define GMAC_IER_RXUBR_Msk   ETH_IER_RXUBR_Msk
 
#define GMAC_IER_RCOMP_Msk   ETH_IER_RCOMP_Msk
 
#define GMAC_MAN_CLTTO_Msk   ETH_MAN_CLTTO_Msk
 
#define GMAC_MAN_OP   ETH_MAN_OP
 
#define GMAC_MAN_PHYA   ETH_MAN_PHYA
 
#define GMAC_MAN_REGA   ETH_MAN_REGA
 
#define GMAC_MAN_WTN   ETH_MAN_WTN
 
#define GMAC_MAN_DATA   ETH_MAN_DATA
 
#define GMAC_MAN_DATA_Msk   ETH_MAN_DATA_Msk
 
#define GMAC_RBSRPQ_RBS   ETH_RBQSZ_RXBUFSZ
 

Functions

error_t pic32czEthInit (NetInterface *interface)
 PIC32CZ Ethernet MAC initialization. More...
 
void pic32czEthInitGpio (NetInterface *interface)
 GPIO configuration. More...
 
void pic32czEthInitBufferDesc (NetInterface *interface)
 Initialize buffer descriptors. More...
 
void pic32czEthTick (NetInterface *interface)
 PIC32CZ Ethernet MAC timer handler. More...
 
void pic32czEthEnableIrq (NetInterface *interface)
 Enable interrupts. More...
 
void pic32czEthDisableIrq (NetInterface *interface)
 Disable interrupts. More...
 
void pic32czEthEventHandler (NetInterface *interface)
 PIC32CZ Ethernet MAC event handler. More...
 
error_t pic32czEthSendPacket (NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
 Send a packet. More...
 
error_t pic32czEthReceivePacket (NetInterface *interface)
 Receive a packet. More...
 
error_t pic32czEthUpdateMacAddrFilter (NetInterface *interface)
 Configure MAC address filtering. More...
 
error_t pic32czEthUpdateMacConfig (NetInterface *interface)
 Adjust MAC configuration parameters for proper operation. More...
 
void pic32czEthWritePhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
 Write PHY register. More...
 
uint16_t pic32czEthReadPhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
 Read PHY register. More...
 

Variables

const NicDriver pic32czEthDriver
 PIC32CZ Ethernet MAC driver. More...
 

Detailed Description

PIC32CZ CA70/CA80/CA90 Gigabit Ethernet MAC driver.

License

SPDX-License-Identifier: GPL-2.0-or-later

Copyright (C) 2010-2025 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author
Oryx Embedded SARL (www.oryx-embedded.com)
Version
2.5.0

Definition in file pic32cz_eth_driver.h.

Macro Definition Documentation

◆ GMAC_DCFGR

#define GMAC_DCFGR   ETH_DCFGR

Definition at line 154 of file pic32cz_eth_driver.h.

◆ GMAC_DCFGR_DRBS

#define GMAC_DCFGR_DRBS   ETH_DCFGR_DRBS

Definition at line 194 of file pic32cz_eth_driver.h.

◆ GMAC_DCFGR_FBLDO

#define GMAC_DCFGR_FBLDO   ETH_DCFGR_FBLDO

Definition at line 197 of file pic32cz_eth_driver.h.

◆ GMAC_DCFGR_RXBMS

#define GMAC_DCFGR_RXBMS   ETH_DCFGR_RXBMS

Definition at line 196 of file pic32cz_eth_driver.h.

◆ GMAC_DCFGR_TXPBMS_Msk

#define GMAC_DCFGR_TXPBMS_Msk   ETH_DCFGR_TXPBMS_Msk

Definition at line 195 of file pic32cz_eth_driver.h.

◆ GMAC_Handler

#define GMAC_Handler (   void)    ETH_PRI_Q_0_Handler

Definition at line 145 of file pic32cz_eth_driver.h.

◆ GMAC_HRB

#define GMAC_HRB   ETH_HRB

Definition at line 163 of file pic32cz_eth_driver.h.

◆ GMAC_HRT

#define GMAC_HRT   ETH_HRT

Definition at line 164 of file pic32cz_eth_driver.h.

◆ GMAC_IDR

#define GMAC_IDR   ETH_IDR

Definition at line 161 of file pic32cz_eth_driver.h.

◆ GMAC_IDRPQ

#define GMAC_IDRPQ   ETH_IDRQ

Definition at line 172 of file pic32cz_eth_driver.h.

◆ GMAC_IER

#define GMAC_IER   ETH_IER

Definition at line 160 of file pic32cz_eth_driver.h.

◆ GMAC_IER_HRESP_Msk

#define GMAC_IER_HRESP_Msk   ETH_IER_HRESP_Msk

Definition at line 216 of file pic32cz_eth_driver.h.

◆ GMAC_IER_RCOMP_Msk

#define GMAC_IER_RCOMP_Msk   ETH_IER_RCOMP_Msk

Definition at line 223 of file pic32cz_eth_driver.h.

◆ GMAC_IER_RLEX_Msk

#define GMAC_IER_RLEX_Msk   ETH_IER_RLEX_Msk

Definition at line 220 of file pic32cz_eth_driver.h.

◆ GMAC_IER_ROVR_Msk

#define GMAC_IER_ROVR_Msk   ETH_IER_ROVR_Msk

Definition at line 217 of file pic32cz_eth_driver.h.

◆ GMAC_IER_RXUBR_Msk

#define GMAC_IER_RXUBR_Msk   ETH_IER_RXUBR_Msk

Definition at line 222 of file pic32cz_eth_driver.h.

◆ GMAC_IER_TCOMP_Msk

#define GMAC_IER_TCOMP_Msk   ETH_IER_TCOMP_Msk

Definition at line 218 of file pic32cz_eth_driver.h.

◆ GMAC_IER_TFC_Msk

#define GMAC_IER_TFC_Msk   ETH_IER_TFC_Msk

Definition at line 219 of file pic32cz_eth_driver.h.

◆ GMAC_IER_TUR_Msk

#define GMAC_IER_TUR_Msk   ETH_IER_TUR_Msk

Definition at line 221 of file pic32cz_eth_driver.h.

◆ GMAC_IRQn

#define GMAC_IRQn   ETH_PRI_Q_0_IRQn

Definition at line 144 of file pic32cz_eth_driver.h.

◆ GMAC_ISR

#define GMAC_ISR   ETH_ISR

Definition at line 159 of file pic32cz_eth_driver.h.

◆ GMAC_ISRPQ

#define GMAC_ISRPQ   ETH_ISRQ

Definition at line 168 of file pic32cz_eth_driver.h.

◆ GMAC_MAN

#define GMAC_MAN   ETH_MAN

Definition at line 162 of file pic32cz_eth_driver.h.

◆ GMAC_MAN_CLTTO_Msk

#define GMAC_MAN_CLTTO_Msk   ETH_MAN_CLTTO_Msk

Definition at line 226 of file pic32cz_eth_driver.h.

◆ GMAC_MAN_DATA

#define GMAC_MAN_DATA   ETH_MAN_DATA

Definition at line 231 of file pic32cz_eth_driver.h.

◆ GMAC_MAN_DATA_Msk

#define GMAC_MAN_DATA_Msk   ETH_MAN_DATA_Msk

Definition at line 232 of file pic32cz_eth_driver.h.

◆ GMAC_MAN_OP

#define GMAC_MAN_OP   ETH_MAN_OP

Definition at line 227 of file pic32cz_eth_driver.h.

◆ GMAC_MAN_PHYA

#define GMAC_MAN_PHYA   ETH_MAN_PHYA

Definition at line 228 of file pic32cz_eth_driver.h.

◆ GMAC_MAN_REGA

#define GMAC_MAN_REGA   ETH_MAN_REGA

Definition at line 229 of file pic32cz_eth_driver.h.

◆ GMAC_MAN_WTN

#define GMAC_MAN_WTN   ETH_MAN_WTN

Definition at line 230 of file pic32cz_eth_driver.h.

◆ GMAC_NCFGR

#define GMAC_NCFGR   ETH_NCFGR

Definition at line 152 of file pic32cz_eth_driver.h.

◆ GMAC_NCFGR_CLK

#define GMAC_NCFGR_CLK   ETH_NCFGR_CLK

Definition at line 182 of file pic32cz_eth_driver.h.

◆ GMAC_NCFGR_DBW

#define GMAC_NCFGR_DBW   ETH_NCFGR_DBW

Definition at line 181 of file pic32cz_eth_driver.h.

◆ GMAC_NCFGR_FD_Msk

#define GMAC_NCFGR_FD_Msk   ETH_NCFGR_FD_Msk

Definition at line 187 of file pic32cz_eth_driver.h.

◆ GMAC_NCFGR_GIGE_Msk

#define GMAC_NCFGR_GIGE_Msk   ETH_NCFGR_GIGE_Msk

Definition at line 183 of file pic32cz_eth_driver.h.

◆ GMAC_NCFGR_MAXFS_Msk

#define GMAC_NCFGR_MAXFS_Msk   ETH_NCFGR_MAXFS_Msk

Definition at line 184 of file pic32cz_eth_driver.h.

◆ GMAC_NCFGR_MTIHEN_Msk

#define GMAC_NCFGR_MTIHEN_Msk   ETH_NCFGR_MTIHEN_Msk

Definition at line 186 of file pic32cz_eth_driver.h.

◆ GMAC_NCFGR_SPD_Msk

#define GMAC_NCFGR_SPD_Msk   ETH_NCFGR_SPD_Msk

Definition at line 188 of file pic32cz_eth_driver.h.

◆ GMAC_NCFGR_UNIHEN_Msk

#define GMAC_NCFGR_UNIHEN_Msk   ETH_NCFGR_UNIHEN_Msk

Definition at line 185 of file pic32cz_eth_driver.h.

◆ GMAC_NCR

#define GMAC_NCR   ETH_NCR

Definition at line 151 of file pic32cz_eth_driver.h.

◆ GMAC_NCR_MPE_Msk

#define GMAC_NCR_MPE_Msk   ETH_NCR_MPE_Msk

Definition at line 176 of file pic32cz_eth_driver.h.

◆ GMAC_NCR_RXEN_Msk

#define GMAC_NCR_RXEN_Msk   ETH_NCR_RXEN_Msk

Definition at line 178 of file pic32cz_eth_driver.h.

◆ GMAC_NCR_TSTART_Msk

#define GMAC_NCR_TSTART_Msk   ETH_NCR_TSTART_Msk

Definition at line 175 of file pic32cz_eth_driver.h.

◆ GMAC_NCR_TXEN_Msk

#define GMAC_NCR_TXEN_Msk   ETH_NCR_TXEN_Msk

Definition at line 177 of file pic32cz_eth_driver.h.

◆ GMAC_NSR

#define GMAC_NSR   ETH_NSR

Definition at line 153 of file pic32cz_eth_driver.h.

◆ GMAC_NSR_IDLE_Msk

#define GMAC_NSR_IDLE_Msk   ETH_NSR_IDLE_Msk

Definition at line 191 of file pic32cz_eth_driver.h.

◆ GMAC_RBQB

#define GMAC_RBQB   ETH_RBQB

Definition at line 156 of file pic32cz_eth_driver.h.

◆ GMAC_RBQBAPQ

#define GMAC_RBQBAPQ   ETH_RBPQB

Definition at line 170 of file pic32cz_eth_driver.h.

◆ GMAC_RBSRPQ

#define GMAC_RBSRPQ   ETH_RBQSZ

Definition at line 171 of file pic32cz_eth_driver.h.

◆ GMAC_RBSRPQ_RBS

#define GMAC_RBSRPQ_RBS   ETH_RBQSZ_RXBUFSZ

Definition at line 235 of file pic32cz_eth_driver.h.

◆ GMAC_REGS

#define GMAC_REGS   ETH_REGS

Definition at line 148 of file pic32cz_eth_driver.h.

◆ GMAC_RSR

#define GMAC_RSR   ETH_RSR

Definition at line 158 of file pic32cz_eth_driver.h.

◆ GMAC_RSR_BNA_Msk

#define GMAC_RSR_BNA_Msk   ETH_RSR_BNA_Msk

Definition at line 213 of file pic32cz_eth_driver.h.

◆ GMAC_RSR_HNO_Msk

#define GMAC_RSR_HNO_Msk   ETH_RSR_HNO_Msk

Definition at line 210 of file pic32cz_eth_driver.h.

◆ GMAC_RSR_REC_Msk

#define GMAC_RSR_REC_Msk   ETH_RSR_REC_Msk

Definition at line 212 of file pic32cz_eth_driver.h.

◆ GMAC_RSR_RXOVR_Msk

#define GMAC_RSR_RXOVR_Msk   ETH_RSR_RXOVR_Msk

Definition at line 211 of file pic32cz_eth_driver.h.

◆ GMAC_RX_ADDRESS

#define GMAC_RX_ADDRESS   0xFFFFFFFC

Definition at line 115 of file pic32cz_eth_driver.h.

◆ GMAC_RX_BAD_FCS

#define GMAC_RX_BAD_FCS   0x00002000

Definition at line 134 of file pic32cz_eth_driver.h.

◆ GMAC_RX_BROADCAST

#define GMAC_RX_BROADCAST   0x80000000

Definition at line 118 of file pic32cz_eth_driver.h.

◆ GMAC_RX_CFI

#define GMAC_RX_CFI   0x00010000

Definition at line 130 of file pic32cz_eth_driver.h.

◆ GMAC_RX_CHECKSUM_VALID

#define GMAC_RX_CHECKSUM_VALID   0x00C00000

Definition at line 126 of file pic32cz_eth_driver.h.

◆ GMAC_RX_EOF

#define GMAC_RX_EOF   0x00008000

Definition at line 131 of file pic32cz_eth_driver.h.

◆ GMAC_RX_LENGTH

#define GMAC_RX_LENGTH   0x00001FFF

Definition at line 135 of file pic32cz_eth_driver.h.

◆ GMAC_RX_LENGTH_MSB

#define GMAC_RX_LENGTH_MSB   0x00002000

Definition at line 133 of file pic32cz_eth_driver.h.

◆ GMAC_RX_MULTICAST_HASH

#define GMAC_RX_MULTICAST_HASH   0x40000000

Definition at line 119 of file pic32cz_eth_driver.h.

◆ GMAC_RX_OWNERSHIP

#define GMAC_RX_OWNERSHIP   0x00000001

Definition at line 117 of file pic32cz_eth_driver.h.

◆ GMAC_RX_PRIORITY_TAG

#define GMAC_RX_PRIORITY_TAG   0x00100000

Definition at line 128 of file pic32cz_eth_driver.h.

◆ GMAC_RX_SAR

#define GMAC_RX_SAR   0x08000000

Definition at line 121 of file pic32cz_eth_driver.h.

◆ GMAC_RX_SAR_MASK

#define GMAC_RX_SAR_MASK   0x06000000

Definition at line 122 of file pic32cz_eth_driver.h.

◆ GMAC_RX_SNAP

#define GMAC_RX_SNAP   0x01000000

Definition at line 124 of file pic32cz_eth_driver.h.

◆ GMAC_RX_SOF

#define GMAC_RX_SOF   0x00004000

Definition at line 132 of file pic32cz_eth_driver.h.

◆ GMAC_RX_TYPE_ID

#define GMAC_RX_TYPE_ID   0x01000000

Definition at line 123 of file pic32cz_eth_driver.h.

◆ GMAC_RX_TYPE_ID_MASK

#define GMAC_RX_TYPE_ID_MASK   0x00C00000

Definition at line 125 of file pic32cz_eth_driver.h.

◆ GMAC_RX_UNICAST_HASH

#define GMAC_RX_UNICAST_HASH   0x20000000

Definition at line 120 of file pic32cz_eth_driver.h.

◆ GMAC_RX_VLAN_PRIORITY

#define GMAC_RX_VLAN_PRIORITY   0x000E0000

Definition at line 129 of file pic32cz_eth_driver.h.

◆ GMAC_RX_VLAN_TAG

#define GMAC_RX_VLAN_TAG   0x00200000

Definition at line 127 of file pic32cz_eth_driver.h.

◆ GMAC_RX_WRAP

#define GMAC_RX_WRAP   0x00000002

Definition at line 116 of file pic32cz_eth_driver.h.

◆ GMAC_SA

#define GMAC_SA   SA

Definition at line 165 of file pic32cz_eth_driver.h.

◆ GMAC_SAB

#define GMAC_SAB   ETH_SAB

Definition at line 166 of file pic32cz_eth_driver.h.

◆ GMAC_SAT

#define GMAC_SAT   ETH_SAT

Definition at line 167 of file pic32cz_eth_driver.h.

◆ GMAC_TBQB

#define GMAC_TBQB   ETH_TBQB

Definition at line 157 of file pic32cz_eth_driver.h.

◆ GMAC_TBQBAPQ

#define GMAC_TBQBAPQ   ETH_TBPQB

Definition at line 169 of file pic32cz_eth_driver.h.

◆ GMAC_TSR

#define GMAC_TSR   ETH_TSR

Definition at line 155 of file pic32cz_eth_driver.h.

◆ GMAC_TSR_COL_Msk

#define GMAC_TSR_COL_Msk   ETH_TSR_COL_Msk

Definition at line 206 of file pic32cz_eth_driver.h.

◆ GMAC_TSR_HRESP_Msk

#define GMAC_TSR_HRESP_Msk   ETH_TSR_HRESP_Msk

Definition at line 200 of file pic32cz_eth_driver.h.

◆ GMAC_TSR_RLE_Msk

#define GMAC_TSR_RLE_Msk   ETH_TSR_RLE_Msk

Definition at line 205 of file pic32cz_eth_driver.h.

◆ GMAC_TSR_TFC_Msk

#define GMAC_TSR_TFC_Msk   ETH_TSR_TFC_Msk

Definition at line 203 of file pic32cz_eth_driver.h.

◆ GMAC_TSR_TXCOMP_Msk

#define GMAC_TSR_TXCOMP_Msk   ETH_TSR_TXCOMP_Msk

Definition at line 202 of file pic32cz_eth_driver.h.

◆ GMAC_TSR_TXGO_Msk

#define GMAC_TSR_TXGO_Msk   ETH_TSR_TXGO_Msk

Definition at line 204 of file pic32cz_eth_driver.h.

◆ GMAC_TSR_UBR_Msk

#define GMAC_TSR_UBR_Msk   ETH_TSR_UBR_Msk

Definition at line 207 of file pic32cz_eth_driver.h.

◆ GMAC_TSR_UND_Msk

#define GMAC_TSR_UND_Msk   ETH_TSR_UND_Msk

Definition at line 201 of file pic32cz_eth_driver.h.

◆ GMAC_TX_AHB_ERROR

#define GMAC_TX_AHB_ERROR   0x08000000

Definition at line 107 of file pic32cz_eth_driver.h.

◆ GMAC_TX_CHECKSUM_ERROR

#define GMAC_TX_CHECKSUM_ERROR   0x00700000

Definition at line 109 of file pic32cz_eth_driver.h.

◆ GMAC_TX_LAST

#define GMAC_TX_LAST   0x00008000

Definition at line 111 of file pic32cz_eth_driver.h.

◆ GMAC_TX_LATE_COL_ERROR

#define GMAC_TX_LATE_COL_ERROR   0x04000000

Definition at line 108 of file pic32cz_eth_driver.h.

◆ GMAC_TX_LENGTH

#define GMAC_TX_LENGTH   0x00003FFF

Definition at line 112 of file pic32cz_eth_driver.h.

◆ GMAC_TX_NO_CRC

#define GMAC_TX_NO_CRC   0x00010000

Definition at line 110 of file pic32cz_eth_driver.h.

◆ GMAC_TX_RLE_ERROR

#define GMAC_TX_RLE_ERROR   0x20000000

Definition at line 105 of file pic32cz_eth_driver.h.

◆ GMAC_TX_UNDERRUN_ERROR

#define GMAC_TX_UNDERRUN_ERROR   0x10000000

Definition at line 106 of file pic32cz_eth_driver.h.

◆ GMAC_TX_USED

#define GMAC_TX_USED   0x80000000

Definition at line 103 of file pic32cz_eth_driver.h.

◆ GMAC_TX_WRAP

#define GMAC_TX_WRAP   0x40000000

Definition at line 104 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_DUMMY_BUFFER_COUNT

#define PIC32CZ_ETH_DUMMY_BUFFER_COUNT   2

Definition at line 64 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_DUMMY_BUFFER_SIZE

#define PIC32CZ_ETH_DUMMY_BUFFER_SIZE   128

Definition at line 71 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_IRQ_GROUP_PRIORITY

#define PIC32CZ_ETH_IRQ_GROUP_PRIORITY   6

Definition at line 85 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_IRQ_PRIORITY_GROUPING

#define PIC32CZ_ETH_IRQ_PRIORITY_GROUPING   4

Definition at line 78 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_IRQ_SUB_PRIORITY

#define PIC32CZ_ETH_IRQ_SUB_PRIORITY   0

Definition at line 92 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_RAM_SECTION

#define PIC32CZ_ETH_RAM_SECTION   ".ram_no_cache"

Definition at line 99 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_RX_BUFFER_COUNT

#define PIC32CZ_ETH_RX_BUFFER_COUNT   96

Definition at line 50 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_RX_BUFFER_SIZE

#define PIC32CZ_ETH_RX_BUFFER_SIZE   128

Definition at line 57 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_TX_BUFFER_COUNT

#define PIC32CZ_ETH_TX_BUFFER_COUNT   8

Definition at line 36 of file pic32cz_eth_driver.h.

◆ PIC32CZ_ETH_TX_BUFFER_SIZE

#define PIC32CZ_ETH_TX_BUFFER_SIZE   1536

Definition at line 43 of file pic32cz_eth_driver.h.

Function Documentation

◆ pic32czEthDisableIrq()

void pic32czEthDisableIrq ( NetInterface *  interface)

Disable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 689 of file pic32cz_eth_driver.c.

◆ pic32czEthEnableIrq()

void pic32czEthEnableIrq ( NetInterface *  interface)

Enable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 661 of file pic32cz_eth_driver.c.

◆ pic32czEthEventHandler()

void pic32czEthEventHandler ( NetInterface *  interface)

PIC32CZ Ethernet MAC event handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 789 of file pic32cz_eth_driver.c.

◆ pic32czEthInit()

error_t pic32czEthInit ( NetInterface *  interface)

PIC32CZ Ethernet MAC initialization.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 149 of file pic32cz_eth_driver.c.

◆ pic32czEthInitBufferDesc()

void pic32czEthInitBufferDesc ( NetInterface *  interface)

Initialize buffer descriptors.

Parameters
[in]interfaceUnderlying network interface

Definition at line 544 of file pic32cz_eth_driver.c.

◆ pic32czEthInitGpio()

void pic32czEthInitGpio ( NetInterface *  interface)

GPIO configuration.

Parameters
[in]interfaceUnderlying network interface

Definition at line 313 of file pic32cz_eth_driver.c.

◆ pic32czEthReadPhyReg()

uint16_t pic32czEthReadPhyReg ( uint8_t  opcode,
uint8_t  phyAddr,
uint8_t  regAddr 
)

Read PHY register.

Parameters
[in]opcodeAccess type (2 bits)
[in]phyAddrPHY address (5 bits)
[in]regAddrRegister address (5 bits)
Returns
Register value

Definition at line 1290 of file pic32cz_eth_driver.c.

◆ pic32czEthReceivePacket()

error_t pic32czEthReceivePacket ( NetInterface *  interface)

Receive a packet.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 896 of file pic32cz_eth_driver.c.

◆ pic32czEthSendPacket()

error_t pic32czEthSendPacket ( NetInterface *  interface,
const NetBuffer *  buffer,
size_t  offset,
NetTxAncillary *  ancillary 
)

Send a packet.

Parameters
[in]interfaceUnderlying network interface
[in]bufferMulti-part buffer containing the data to send
[in]offsetOffset to the first data byte
[in]ancillaryAdditional options passed to the stack along with the packet
Returns
Error code

Definition at line 826 of file pic32cz_eth_driver.c.

◆ pic32czEthTick()

void pic32czEthTick ( NetInterface *  interface)

PIC32CZ Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters
[in]interfaceUnderlying network interface

Definition at line 636 of file pic32cz_eth_driver.c.

◆ pic32czEthUpdateMacAddrFilter()

error_t pic32czEthUpdateMacAddrFilter ( NetInterface *  interface)

Configure MAC address filtering.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 1028 of file pic32cz_eth_driver.c.

◆ pic32czEthUpdateMacConfig()

error_t pic32czEthUpdateMacConfig ( NetInterface *  interface)

Adjust MAC configuration parameters for proper operation.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 1186 of file pic32cz_eth_driver.c.

◆ pic32czEthWritePhyReg()

void pic32czEthWritePhyReg ( uint8_t  opcode,
uint8_t  phyAddr,
uint8_t  regAddr,
uint16_t  data 
)

Write PHY register.

Parameters
[in]opcodeAccess type (2 bits)
[in]phyAddrPHY address (5 bits)
[in]regAddrRegister address (5 bits)
[in]dataRegister value

Definition at line 1251 of file pic32cz_eth_driver.c.

Variable Documentation

◆ pic32czEthDriver

const NicDriver pic32czEthDriver
extern

PIC32CZ Ethernet MAC driver.

Definition at line 122 of file pic32cz_eth_driver.c.