s7g2_eth1_driver.c File Reference

Renesas Synergy S7G2 Ethernet MAC driver (ETHERC0 instance) More...

#include "bsp_irq_cfg.h"
#include "s7g2.h"
#include "core/net.h"
#include "drivers/mac/s7g2_eth1_driver.h"
#include "debug.h"

Go to the source code of this file.

Macros

#define TRACE_LEVEL   NIC_TRACE_LEVEL
 

Functions

error_t s7g2Eth1Init (NetInterface *interface)
 S7G2 Ethernet MAC initialization. More...
 
__weak_func void s7g2Eth1InitGpio (NetInterface *interface)
 GPIO configuration. More...
 
void s7g2Eth1InitDmaDesc (NetInterface *interface)
 Initialize DMA descriptor lists. More...
 
void s7g2Eth1Tick (NetInterface *interface)
 S7G2 Ethernet MAC timer handler. More...
 
void s7g2Eth1EnableIrq (NetInterface *interface)
 Enable interrupts. More...
 
void s7g2Eth1DisableIrq (NetInterface *interface)
 Disable interrupts. More...
 
void EDMAC0_EINT_IRQHandler (void)
 S7G2 Ethernet MAC interrupt service routine. More...
 
void s7g2Eth1EventHandler (NetInterface *interface)
 S7G2 Ethernet MAC event handler. More...
 
error_t s7g2Eth1SendPacket (NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
 Send a packet. More...
 
error_t s7g2Eth1ReceivePacket (NetInterface *interface)
 Receive a packet. More...
 
error_t s7g2Eth1UpdateMacAddrFilter (NetInterface *interface)
 Configure MAC address filtering. More...
 
error_t s7g2Eth1UpdateMacConfig (NetInterface *interface)
 Adjust MAC configuration parameters for proper operation. More...
 
void s7g2Eth1WritePhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
 Write PHY register. More...
 
uint16_t s7g2Eth1ReadPhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
 Read PHY register. More...
 
void s7g2Eth1WriteSmi (uint32_t data, uint_t length)
 SMI write operation. More...
 
uint32_t s7g2Eth1ReadSmi (uint_t length)
 SMI read operation. More...
 

Variables

const NicDriver s7g2Eth1Driver
 S7G2 Ethernet MAC driver (ETHERC0 instance) More...
 

Detailed Description

Renesas Synergy S7G2 Ethernet MAC driver (ETHERC0 instance)

License

SPDX-License-Identifier: GPL-2.0-or-later

Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author
Oryx Embedded SARL (www.oryx-embedded.com)
Version
2.4.4

Definition in file s7g2_eth1_driver.c.

Macro Definition Documentation

◆ TRACE_LEVEL

#define TRACE_LEVEL   NIC_TRACE_LEVEL

Definition at line 32 of file s7g2_eth1_driver.c.

Function Documentation

◆ EDMAC0_EINT_IRQHandler()

void EDMAC0_EINT_IRQHandler ( void  )

S7G2 Ethernet MAC interrupt service routine.

Definition at line 438 of file s7g2_eth1_driver.c.

◆ s7g2Eth1DisableIrq()

void s7g2Eth1DisableIrq ( NetInterface interface)

Disable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 411 of file s7g2_eth1_driver.c.

◆ s7g2Eth1EnableIrq()

void s7g2Eth1EnableIrq ( NetInterface interface)

Enable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 383 of file s7g2_eth1_driver.c.

◆ s7g2Eth1EventHandler()

void s7g2Eth1EventHandler ( NetInterface interface)

S7G2 Ethernet MAC event handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 491 of file s7g2_eth1_driver.c.

◆ s7g2Eth1Init()

error_t s7g2Eth1Init ( NetInterface interface)

S7G2 Ethernet MAC initialization.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 115 of file s7g2_eth1_driver.c.

◆ s7g2Eth1InitDmaDesc()

void s7g2Eth1InitDmaDesc ( NetInterface interface)

Initialize DMA descriptor lists.

Parameters
[in]interfaceUnderlying network interface

Definition at line 302 of file s7g2_eth1_driver.c.

◆ s7g2Eth1InitGpio()

__weak_func void s7g2Eth1InitGpio ( NetInterface interface)

GPIO configuration.

Parameters
[in]interfaceUnderlying network interface

Definition at line 220 of file s7g2_eth1_driver.c.

◆ s7g2Eth1ReadPhyReg()

uint16_t s7g2Eth1ReadPhyReg ( uint8_t  opcode,
uint8_t  phyAddr,
uint8_t  regAddr 
)

Read PHY register.

Parameters
[in]opcodeAccess type (2 bits)
[in]phyAddrPHY address (5 bits)
[in]regAddrRegister address (5 bits)
Returns
Register value

Definition at line 800 of file s7g2_eth1_driver.c.

◆ s7g2Eth1ReadSmi()

uint32_t s7g2Eth1ReadSmi ( uint_t  length)

SMI read operation.

Parameters
[in]lengthNumber of bits to be read
Returns
Data resulting from the MDIO read operation

Definition at line 873 of file s7g2_eth1_driver.c.

◆ s7g2Eth1ReceivePacket()

error_t s7g2Eth1ReceivePacket ( NetInterface interface)

Receive a packet.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 584 of file s7g2_eth1_driver.c.

◆ s7g2Eth1SendPacket()

error_t s7g2Eth1SendPacket ( NetInterface interface,
const NetBuffer buffer,
size_t  offset,
NetTxAncillary ancillary 
)

Send a packet.

Parameters
[in]interfaceUnderlying network interface
[in]bufferMulti-part buffer containing the data to send
[in]offsetOffset to the first data byte
[in]ancillaryAdditional options passed to the stack along with the packet
Returns
Error code

Definition at line 516 of file s7g2_eth1_driver.c.

◆ s7g2Eth1Tick()

void s7g2Eth1Tick ( NetInterface interface)

S7G2 Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters
[in]interfaceUnderlying network interface

Definition at line 358 of file s7g2_eth1_driver.c.

◆ s7g2Eth1UpdateMacAddrFilter()

error_t s7g2Eth1UpdateMacAddrFilter ( NetInterface interface)

Configure MAC address filtering.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 662 of file s7g2_eth1_driver.c.

◆ s7g2Eth1UpdateMacConfig()

error_t s7g2Eth1UpdateMacConfig ( NetInterface interface)

Adjust MAC configuration parameters for proper operation.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 727 of file s7g2_eth1_driver.c.

◆ s7g2Eth1WritePhyReg()

void s7g2Eth1WritePhyReg ( uint8_t  opcode,
uint8_t  phyAddr,
uint8_t  regAddr,
uint16_t  data 
)

Write PHY register.

Parameters
[in]opcodeAccess type (2 bits)
[in]phyAddrPHY address (5 bits)
[in]regAddrRegister address (5 bits)
[in]dataRegister value

Definition at line 770 of file s7g2_eth1_driver.c.

◆ s7g2Eth1WriteSmi()

void s7g2Eth1WriteSmi ( uint32_t  data,
uint_t  length 
)

SMI write operation.

Parameters
[in]dataRaw data to be written
[in]lengthNumber of bits to be written

Definition at line 833 of file s7g2_eth1_driver.c.

Variable Documentation

◆ s7g2Eth1Driver

void s7g2Eth1EventHandler(NetInterface *interface)
S7G2 Ethernet MAC event handler.
#define TRUE
Definition: os_port.h:50
error_t s7g2Eth1UpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
void s7g2Eth1WritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
void s7g2Eth1Tick(NetInterface *interface)
S7G2 Ethernet MAC timer handler.
error_t s7g2Eth1UpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
#define ETH_MTU
Definition: ethernet.h:116
void s7g2Eth1DisableIrq(NetInterface *interface)
Disable interrupts.
error_t s7g2Eth1Init(NetInterface *interface)
S7G2 Ethernet MAC initialization.
error_t s7g2Eth1SendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
uint16_t s7g2Eth1ReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void s7g2Eth1EnableIrq(NetInterface *interface)
Enable interrupts.
@ NIC_TYPE_ETHERNET
Ethernet interface.
Definition: nic.h:83