st802rt1a_driver.h
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1 /**
2  * @file st802rt1a_driver.h
3  * @brief ST802RT1A Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 #ifndef _ST802RT1A_DRIVER_H
32 #define _ST802RT1A_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //PHY address
38 #define ST802RT1A_PHY_ADDR 1
39 
40 //ST802RT1A PHY registers
41 #define ST802RT1A_CNTRL 0x00
42 #define ST802RT1A_STATS 0x01
43 #define ST802RT1A_PHYID1 0x02
44 #define ST802RT1A_PHYID2 0x03
45 #define ST802RT1A_LDADV 0x04
46 #define ST802RT1A_LPADV 0x05
47 #define ST802RT1A_ANEGX 0x06
48 #define ST802RT1A_LDNPG 0x07
49 #define ST802RT1A_LPNPG 0x08
50 #define ST802RT1A_XCNTL 0x10
51 #define ST802RT1A_XSTAT 0x11
52 #define ST802RT1A_XRCNT 0x12
53 #define ST802RT1A_XCCNT 0x13
54 #define ST802RT1A_XDCNT 0x14
55 #define ST802RT1A_AUXCS 0x18
56 #define ST802RT1A_AUXSS 0x19
57 #define ST802RT1A_AUXM2 0x1B
58 #define ST802RT1A_TSTAT 0x1C
59 #define ST802RT1A_AMPHY 0x1E
60 #define ST802RT1A_BTEST 0x1F
61 
62 //Control register
63 #define ST802RT1A_CNTRL_RESET 0x8000
64 #define ST802RT1A_CNTRL_LOOPBACK 0x4000
65 #define ST802RT1A_CNTRL_SPEED_SEL 0x2000
66 #define ST802RT1A_CNTRL_AN_EN 0x1000
67 #define ST802RT1A_CNTRL_POWER_DOWN 0x0800
68 #define ST802RT1A_CNTRL_ISOLATE 0x0400
69 #define ST802RT1A_CNTRL_RESTART_AN 0x0200
70 #define ST802RT1A_CNTRL_DUPLEX_MODE 0x0100
71 #define ST802RT1A_CNTRL_COL_TEST 0x0080
72 
73 //Status register
74 #define ST802RT1A_STATS_100BT4 0x8000
75 #define ST802RT1A_STATS_100BTX_FD 0x4000
76 #define ST802RT1A_STATS_100BTX_HD 0x2000
77 #define ST802RT1A_STATS_10BT_FD 0x1000
78 #define ST802RT1A_STATS_10BT_HD 0x0800
79 #define ST802RT1A_STATS_MF_PREAMBLE_SUPPR 0x0040
80 #define ST802RT1A_STATS_AN_COMPLETE 0x0020
81 #define ST802RT1A_STATS_REMOTE_FAULT 0x0010
82 #define ST802RT1A_STATS_AN_CAPABLE 0x0008
83 #define ST802RT1A_STATS_LINK_STATUS 0x0004
84 #define ST802RT1A_STATS_JABBER_DETECT 0x0002
85 #define ST802RT1A_STATS_EXTENDED_CAPABLE 0x0001
86 
87 //PHY identifier Hi register
88 #define ST802RT1A_PHYID1_OUI_MSB 0xFFFF
89 #define ST802RT1A_PHYID1_OUI_MSB_DEFAULT 0x0203
90 
91 //PHY identifier Lo register
92 #define ST802RT1A_PHYID2_OUI_LSB 0xFC00
93 #define ST802RT1A_PHYID2_OUI_LSB_DEFAULT 0x8400
94 #define ST802RT1A_PHYID2_MODEL_NUM 0x03F0
95 #define ST802RT1A_PHYID2_MODEL_NUM_DEFAULT 0x0060
96 #define ST802RT1A_PHYID2_REVISION_NUM 0x000F
97 
98 //Auto-negotiation advertisement register
99 #define ST802RT1A_LDADV_NEXT_PAGE 0x8000
100 #define ST802RT1A_LDADV_REMOTE_FAULT 0x2000
101 #define ST802RT1A_LDADV_ASYM_PAUSE 0x0800
102 #define ST802RT1A_LDADV_PAUSE 0x0400
103 #define ST802RT1A_LDADV_100BT4 0x0200
104 #define ST802RT1A_LDADV_100BTX_FD 0x0100
105 #define ST802RT1A_LDADV_100BTX_HD 0x0080
106 #define ST802RT1A_LDADV_10BT_FD 0x0040
107 #define ST802RT1A_LDADV_10BT_HD 0x0020
108 #define ST802RT1A_LDADV_SELECTOR 0x001F
109 #define ST802RT1A_LDADV_SELECTOR_DEFAULT 0x0001
110 
111 //Auto-negotiation link partner ability register
112 #define ST802RT1A_LPADV_NEXT_PAGE 0x8000
113 #define ST802RT1A_LPADV_ACK 0x4000
114 #define ST802RT1A_LPADV_REMOTE_FAULT 0x2000
115 #define ST802RT1A_LPADV_ASYM_PAUSE 0x0800
116 #define ST802RT1A_LPADV_PAUSE 0x0400
117 #define ST802RT1A_LPADV_100BT4 0x0200
118 #define ST802RT1A_LPADV_100BTX_FD 0x0100
119 #define ST802RT1A_LPADV_100BTX_HD 0x0080
120 #define ST802RT1A_LPADV_10BT_FD 0x0040
121 #define ST802RT1A_LPADV_10BT_HD 0x0020
122 #define ST802RT1A_LPADV_SELECTOR 0x001F
123 #define ST802RT1A_LPADV_SELECTOR_DEFAULT 0x0001
124 
125 //Auto-negotiation expansion register
126 #define ST802RT1A_ANEGX_PAR_DETECT_FAULT 0x0010
127 #define ST802RT1A_ANEGX_LP_NEXT_PAGE_ABLE 0x0008
128 #define ST802RT1A_ANEGX_NEXT_PAGE_ABLE 0x0004
129 #define ST802RT1A_ANEGX_PAGE_RECEIVED 0x0002
130 #define ST802RT1A_ANEGX_LP_AN_ABLE 0x0001
131 
132 //Auto-negotiation next page transmit register
133 #define ST802RT1A_LDNPG_NEXT_PAGE 0x8000
134 #define ST802RT1A_LDNPG_MSG_PAGE 0x2000
135 #define ST802RT1A_LDNPG_ACK2 0x1000
136 #define ST802RT1A_LDNPG_TOGGLE 0x0800
137 #define ST802RT1A_LDNPG_MESSAGE 0x07FF
138 
139 //Auto-negotiation link partner received next page register
140 #define ST802RT1A_LPNPG_NEXT_PAGE 0x8000
141 #define ST802RT1A_LPNPG_ACK 0x4000
142 #define ST802RT1A_LPNPG_MSG_PAGE 0x2000
143 #define ST802RT1A_LPNPG_ACK2 0x1000
144 #define ST802RT1A_LPNPG_TOGGLE 0x0800
145 #define ST802RT1A_LPNPG_MESSAGE 0x07FF
146 
147 //RMII-TEST control register
148 #define ST802RT1A_XCNTL_MII_EN 0x0200
149 #define ST802RT1A_XCNTL_FEF_EN 0x0020
150 #define ST802RT1A_XCNTL_FIFO_EXTENDED 0x0004
151 #define ST802RT1A_XCNTL_RMII_OOBS 0x0002
152 
153 //Receiver configuration information and interrupt status register
154 #define ST802RT1A_XSTAT_FX_MODE 0x0400
155 #define ST802RT1A_XSTAT_SPEED 0x0200
156 #define ST802RT1A_XSTAT_DUPLEX 0x0100
157 #define ST802RT1A_XSTAT_PAUSE 0x0080
158 #define ST802RT1A_XSTAT_AN_CMPL_INT 0x0040
159 #define ST802RT1A_XSTAT_REM_FLT_DET_INT 0x0020
160 #define ST802RT1A_XSTAT_LK_DWN_INT 0x0010
161 #define ST802RT1A_XSTAT_AN_ACK_DET_INT 0x0008
162 #define ST802RT1A_XSTAT_PD_FLT_INT 0x0004
163 #define ST802RT1A_XSTAT_PG_RCVD_INT 0x0002
164 #define ST802RT1A_XSTAT_RX_FULL_INT 0x0001
165 
166 //Receiver event interrupts register
167 #define ST802RT1A_XRCNT_INT_OE_N 0x0100
168 #define ST802RT1A_XRCNT_INT_EN 0x0080
169 #define ST802RT1A_XRCNT_AN_CMPL_EN 0x0040
170 #define ST802RT1A_XRCNT_REM_FLT_DET_EN 0x0020
171 #define ST802RT1A_XRCNT_LK_DWN_EN 0x0010
172 #define ST802RT1A_XRCNT_AN_ACK_DET_EN 0x0008
173 #define ST802RT1A_XRCNT_PD_FLT_EN 0x0004
174 #define ST802RT1A_XRCNT_PG_RCVD_EN 0x0002
175 #define ST802RT1A_XRCNT_RX_FULL_EN 0x0001
176 
177 //100Base-TX control register
178 #define ST802RT1A_XCCNT_RX_ERR_COUNTER_DIS 0x2000
179 #define ST802RT1A_XCCNT_AN_COMPLETE 0x1000
180 #define ST802RT1A_XCCNT_DC_REST_EN 0x0100
181 #define ST802RT1A_XCCNT_NRZ_CONV_EN 0x0080
182 #define ST802RT1A_XCCNT_TX_ISOLATE 0x0020
183 #define ST802RT1A_XCCNT_CMODE 0x001C
184 #define ST802RT1A_XCCNT_CMODE_AN 0x0000
185 #define ST802RT1A_XCCNT_CMODE_10BT_HD 0x0004
186 #define ST802RT1A_XCCNT_CMODE_100BTX_HD 0x0008
187 #define ST802RT1A_XCCNT_CMODE_10BT_FD 0x0014
188 #define ST802RT1A_XCCNT_CMODE_100BTX_FD 0x0018
189 #define ST802RT1A_XCCNT_CMODE_ISOLATE 0x001C
190 #define ST802RT1A_XCCNT_MLT3_DIS 0x0002
191 #define ST802RT1A_XCCNT_SCRAMBLER_DIS 0x0001
192 
193 //Receiver mode control register
194 #define ST802RT1A_XDCNT_PHY_ADDR 0x00F8
195 #define ST802RT1A_XDCNT_PREAMBLE_SUPPR 0x0002
196 
197 //Auxiliary control register
198 #define ST802RT1A_AUXCS_JABBER_DIS 0x8000
199 #define ST802RT1A_AUXCS_MDIO_POWER_SAVING 0x0010
200 
201 //Auxiliary status register
202 #define ST802RT1A_AUXSS_AN_COMPLETE 0x8000
203 #define ST802RT1A_AUXSS_AN_ACK 0x4000
204 #define ST802RT1A_AUXSS_AN_DETECT 0x2000
205 #define ST802RT1A_AUXSS_LP_AN_ABLE_DETECT 0x1000
206 #define ST802RT1A_AUXSS_AN_PAUSE 0x0800
207 #define ST802RT1A_AUXSS_AN_HCD 0x0700
208 #define ST802RT1A_AUXSS_PAR_DET_FAULT 0x0080
209 #define ST802RT1A_AUXSS_REMOTE_FAULT 0x0040
210 #define ST802RT1A_AUXSS_PAGE_RECEIVED 0x0020
211 #define ST802RT1A_AUXSS_LP_AN_ABLE 0x0010
212 #define ST802RT1A_AUXSS_SP100 0x0008
213 #define ST802RT1A_AUXSS_LINK_STATUS 0x0004
214 #define ST802RT1A_AUXSS_AN_EN 0x0002
215 #define ST802RT1A_AUXSS_JABBER_DETECT 0x0001
216 
217 //Auxiliary mode 2 register
218 #define ST802RT1A_AUXM2_LED_MODE 0x0200
219 #define ST802RT1A_AUXM2_10BT_ECHO_DIS 0x0080
220 #define ST802RT1A_AUXM2_MI_SQE_DIS 0x0008
221 
222 //10Base-T error and general status register
223 #define ST802RT1A_TSTAT_MDIX_STATUS 0x2000
224 #define ST802RT1A_TSTAT_MDIX_SWAP 0x1000
225 #define ST802RT1A_TSTAT_MDIX_DIS 0x0800
226 #define ST802RT1A_TSTAT_JABBER_DETECT 0x0200
227 #define ST802RT1A_TSTAT_POLARITY_CHANGED 0x0100
228 
229 //Auxiliary PHY register
230 #define ST802RT1A_AMPHY_HCD_100BTX_FD 0x8000
231 #define ST802RT1A_AMPHY_HCD_100BT4 0x4000
232 #define ST802RT1A_AMPHY_HCD_100BTX_HD 0x2000
233 #define ST802RT1A_AMPHY_HCD_10BT_FD 0x1000
234 #define ST802RT1A_AMPHY_HCD_10BT_HD 0x0800
235 #define ST802RT1A_AMPHY_AN_RESTART 0x0100
236 #define ST802RT1A_AMPHY_AN_COMPLETE 0x0080
237 #define ST802RT1A_AMPHY_AN_ACK_COMPLETE 0x0040
238 #define ST802RT1A_AMPHY_AN_ACK 0x0020
239 #define ST802RT1A_AMPHY_AN_ABLE 0x0010
240 #define ST802RT1A_AMPHY_SUPER_ISOLATE 0x0008
241 
242 //Shadow Registers enable register
243 #define ST802RT1A_BTEST_SHADOW_REG_EN 0x0080
244 
245 //C++ guard
246 #ifdef __cplusplus
247 extern "C" {
248 #endif
249 
250 //ST802RT1A Ethernet PHY driver
251 extern const PhyDriver st802rt1aPhyDriver;
252 
253 //ST802RT1A related functions
255 
256 void st802rt1aTick(NetInterface *interface);
257 
258 void st802rt1aEnableIrq(NetInterface *interface);
259 void st802rt1aDisableIrq(NetInterface *interface);
260 
261 void st802rt1aEventHandler(NetInterface *interface);
262 
263 void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address,
264  uint16_t data);
265 
266 uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address);
267 
268 void st802rt1aDumpPhyReg(NetInterface *interface);
269 
270 //C++ guard
271 #ifdef __cplusplus
272 }
273 #endif
274 
275 #endif
PHY driver.
Definition: nic.h:214
void st802rt1aTick(NetInterface *interface)
ST802RT1A timer handler.
uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
error_t
Error codes.
Definition: error.h:42
void st802rt1aEventHandler(NetInterface *interface)
ST802RT1A event handler.
#define NetInterface
Definition: net.h:36
void st802rt1aEnableIrq(NetInterface *interface)
Enable interrupts.
void st802rt1aDumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
void st802rt1aDisableIrq(NetInterface *interface)
Disable interrupts.
error_t st802rt1aInit(NetInterface *interface)
ST802RT1A PHY transceiver initialization.
Network interface controller abstraction layer.
const PhyDriver st802rt1aPhyDriver
ST802RT1A Ethernet PHY driver.
Ipv6Addr address
uint8_t data[]
Definition: dtls_misc.h:176