st802rt1a_driver.h
Go to the documentation of this file.
1 /**
2  * @file st802rt1a_driver.h
3  * @brief ST802RT1A Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _ST802RT1A_DRIVER_H
30 #define _ST802RT1A_DRIVER_H
31 
32 //Dependencies
33 #include "core/nic.h"
34 
35 //PHY address
36 #define ST802RT1A_PHY_ADDR 1
37 
38 //ST802RT1A registers
39 #define ST802RT1A_PHY_REG_RN00 0x00
40 #define ST802RT1A_PHY_REG_RN01 0x01
41 #define ST802RT1A_PHY_REG_RN02 0x02
42 #define ST802RT1A_PHY_REG_RN03 0x03
43 #define ST802RT1A_PHY_REG_RN04 0x04
44 #define ST802RT1A_PHY_REG_RN05 0x05
45 #define ST802RT1A_PHY_REG_RN06 0x06
46 #define ST802RT1A_PHY_REG_RN07 0x07
47 #define ST802RT1A_PHY_REG_RN08 0x08
48 #define ST802RT1A_PHY_REG_RN10 0x10
49 #define ST802RT1A_PHY_REG_RN11 0x11
50 #define ST802RT1A_PHY_REG_RN12 0x12
51 #define ST802RT1A_PHY_REG_RN13 0x13
52 #define ST802RT1A_PHY_REG_RN14 0x14
53 #define ST802RT1A_PHY_REG_RN18 0x18
54 #define ST802RT1A_PHY_REG_RN19 0x19
55 #define ST802RT1A_PHY_REG_RN1B 0x1B
56 #define ST802RT1A_PHY_REG_RN1C 0x1C
57 #define ST802RT1A_PHY_REG_RN1E 0x1E
58 #define ST802RT1A_PHY_REG_RN1F 0x1F
59 #define ST802RT1A_PHY_REG_RS1B 0x1B
60 
61 //RN00 register
62 #define RN00_SOFT_RESET (1 << 15)
63 #define RN00_LOCAL_LOOPBACK (1 << 14)
64 #define RN00_SPEED_SEL (1 << 13)
65 #define RN00_AN_EN (1 << 12)
66 #define RN00_POWER_DOWN (1 << 11)
67 #define RN00_ISOLATE (1 << 10)
68 #define RN00_RESTART_AN (1 << 9)
69 #define RN00_DUPLEX_MODE (1 << 8)
70 #define RN00_COL_TEST (1 << 7)
71 
72 //RN01 register
73 #define RN01_100BT4 (1 << 15)
74 #define RN01_100BTX_FD (1 << 14)
75 #define RN01_100BTX (1 << 13)
76 #define RN01_10BT_FD (1 << 12)
77 #define RN01_10BT (1 << 11)
78 #define RN01_NO_PREAMBLE (1 << 6)
79 #define RN01_AN_COMPLETE (1 << 5)
80 #define RN01_REMOTE_FAULT (1 << 4)
81 #define RN01_AN_ABLE (1 << 3)
82 #define RN01_LINK_STATUS (1 << 2)
83 #define RN01_JABBER_DETECT (1 << 1)
84 #define RN01_EXTENDED_CAP (1 << 0)
85 
86 //RN04 register
87 #define RN04_NP (1 << 15)
88 #define RN04_RF (1 << 13)
89 #define RN04_ASYM_PAUSE (1 << 11)
90 #define RN04_PAUSE (1 << 10)
91 #define RN04_100BT4 (1 << 9)
92 #define RN04_100BTX_FD (1 << 8)
93 #define RN04100BTX (1 << 7)
94 #define RN04_10BT_FD (1 << 6)
95 #define RN04_10BT (1 << 5)
96 #define RN04_SELECTOR4 (1 << 4)
97 #define RN04_SELECTOR3 (1 << 3)
98 #define RN04_SELECTOR2 (1 << 2)
99 #define RN04_SELECTOR1 (1 << 1)
100 #define RN04_SELECTOR0 (1 << 0)
101 
102 //RN05 register
103 #define RN05_NP (1 << 15)
104 #define RN05_ACK (1 << 14)
105 #define RN05_RF (1 << 13)
106 #define RN05_ASYM_PAUSE (1 << 11)
107 #define RN05_PAUSE (1 << 10)
108 #define RN05_100BT4 (1 << 9)
109 #define RN05_100BTX_FD (1 << 8)
110 #define RN05_100BTX (1 << 7)
111 #define RN05_10BT_FD (1 << 6)
112 #define RN05_10BT (1 << 5)
113 #define RN05_SELECTOR4 (1 << 4)
114 #define RN05_SELECTOR3 (1 << 3)
115 #define RN05_SELECTOR2 (1 << 2)
116 #define RN05_SELECTOR1 (1 << 1)
117 #define RN05_SELECTOR0 (1 << 0)
118 
119 //RN06 register
120 #define RN06_PD_FAULT (1 << 4)
121 #define RN06_LP_NP_ABLE (1 << 3)
122 #define RN06_NP_ABLE (1 << 2)
123 #define RN06_PAGE_RCVD (1 << 1)
124 #define RN06_LP_AN_ABLE (1 << 0)
125 
126 //RN07 register
127 #define RN07_NP (1 << 15)
128 #define RN07_MP (1 << 13)
129 #define RN07_ACK2 (1 << 12)
130 #define RN07_TOGGLE (1 << 11)
131 #define RN07_CODE10 (1 << 10)
132 #define RN07_CODE9 (1 << 9)
133 #define RN07_CODE8 (1 << 8)
134 #define RN07_CODE7 (1 << 7)
135 #define RN07_CODE6 (1 << 6)
136 #define RN07_CODE5 (1 << 5)
137 #define RN07_CODE4 (1 << 4)
138 #define RN07_CODE3 (1 << 3)
139 #define RN07_CODE2 (1 << 2)
140 #define RN07_CODE1 (1 << 1)
141 #define RN07_CODE0 (1 << 0)
142 
143 //RN08 register
144 #define RN08_NP (1 << 15)
145 #define RN08_ACK (1 << 14)
146 #define RN08_MP (1 << 13)
147 #define RN08_ACK2 (1 << 12)
148 #define RN08_TOGGLE (1 << 11)
149 #define RN08_CODE10 (1 << 10)
150 #define RN08_CODE9 (1 << 9)
151 #define RN08_CODE8 (1 << 8)
152 #define RN08_CODE7 (1 << 7)
153 #define RN08_CODE6 (1 << 6)
154 #define RN08_CODE5 (1 << 5)
155 #define RN08_CODE4 (1 << 4)
156 #define RN08_CODE3 (1 << 3)
157 #define RN08_CODE2 (1 << 2)
158 #define RN08_CODE1 (1 << 1)
159 #define RN08_CODE0 (1 << 0)
160 
161 //RN10 register
162 #define RN10_MII_EN (1 << 9)
163 #define RN10_FEF_EN (1 << 5)
164 #define RN10_FIFO_EXT (1 << 2)
165 #define RN10_RMII_OOBS (1 << 1)
166 
167 //RN11 register
168 #define RN11_FX_MODE (1 << 10)
169 #define RN11_SPEED (1 << 9)
170 #define RN11_DUPLEX (1 << 8)
171 #define RN11_PAUSE (1 << 7)
172 #define RN11_AN_COMPLETE_INT (1 << 6)
173 #define RN11_REMOTE_FAULT_INT (1 << 5)
174 #define RN11_LINK_DOWN_INT (1 << 4)
175 #define RN11_AN_LCW_RCVD_INT (1 << 3)
176 #define RN11_PD_FAULT_INT (1 << 2)
177 #define RN11_PG_RCVD_INT (1 << 1)
178 #define RN11_RX_FUL_INT (1 << 0)
179 
180 //RN12 register
181 #define RN12_INT_OE_N (1 << 8)
182 #define RN12_INT_EN (1 << 7)
183 #define RN12_AN_COMPLETE_EN (1 << 6)
184 #define RN12_REMOTE_FAULT_EN (1 << 5)
185 #define RN12_LINK_DOWN_EN (1 << 4)
186 #define RN12_AN_LCW_RCVD_EN (1 << 3)
187 #define RN12_PD_FAULT_EN (1 << 2)
188 #define RN12_PG_RCVD_EN (1 << 1)
189 #define RN12_RX_FULL_EN (1 << 0)
190 
191 //RN13 register
192 #define RN13_RX_ERR_COUNTER_DIS (1 << 13)
193 #define RN13_AN_COMPLETE (1 << 12)
194 #define RN13_DC_REST_EN (1 << 8)
195 #define RN13_NRZ_CONV_EN (1 << 7)
196 #define RN13_TX_ISOLATE (1 << 5)
197 #define RN13_CMODE2 (1 << 4)
198 #define RN13_CMODE1 (1 << 3)
199 #define RN13_CMODE0 (1 << 2)
200 #define RN13_MLT3_DIS (1 << 1)
201 #define RN13_SCRAMBLER_DIS (1 << 0)
202 
203 #define RN13_CMODE_MASK (7 << 2)
204 #define RN13_CMODE_AN (0 << 2)
205 #define RN13_CMODE_10BT (1 << 2)
206 #define RN13_CMODE_100BTX (2 << 2)
207 #define RN13_CMODE_10BT_FD (5 << 2)
208 #define RN13_CMODE_100BTX_FD (6 << 2)
209 #define RN13_CMODE_TX_ISOLATE (7 << 2)
210 
211 //RN14 register
212 #define RN14_PHY_ADDR4 (1 << 7)
213 #define RN14_PHY_ADDR3 (1 << 6)
214 #define RN14_PHY_ADDR2 (1 << 5)
215 #define RN14_PHY_ADDR1 (1 << 4)
216 #define RN14_PHY_ADDR0 (1 << 3)
217 #define RN14_NO_PREAMBLE (1 << 1)
218 
219 //RN18 register
220 #define RN18_JABBER_DIS (1 << 15)
221 #define RN18_MDIO_PS (1 << 4)
222 
223 //RN19 register
224 #define RN19_AN_COMPLETE (1 << 15)
225 #define RN19_AN_ACK (1 << 14)
226 #define RN19_AN_DETECT (1 << 13)
227 #define RN19_LP_AN_ABLE_DETECT (1 << 12)
228 #define RN19_AN_PAUSE (1 << 11)
229 #define RN19_AN_HCD2 (1 << 10)
230 #define RN19_AN_HCD1 (1 << 9)
231 #define RN19_AN_HCD0 (1 << 8)
232 #define RN19_PD_FAULT (1 << 7)
233 #define RN19_REMOTE_FAULT (1 << 6)
234 #define RN19_PAGE_RCVD (1 << 5)
235 #define RN19_LP_AN_ABLE (1 << 4)
236 #define RN19_SP100 (1 << 3)
237 #define RN19_LINK_STATUS (1 << 2)
238 #define RN19_AN_EN (1 << 1)
239 #define RN19_JABBER_DETECT (1 << 0)
240 
241 //RN1B register
242 #define RN1B_LED_MODE (1 << 9)
243 #define RN1B_10BT_ECHO_DIS (1 << 7)
244 #define RN1B_MI_SQE_DIS (1 << 3)
245 
246 //RN1C register
247 #define RN1C_MDIX_STATUS (1 << 13)
248 #define RN1C_MDIX_SWAP (1 << 12)
249 #define RN1C_MDIX_DIS (1 << 11)
250 #define RN1C_JABBER_DETECT (1 << 9)
251 #define RN1C_POLARITY_CHANGED (1 << 8)
252 
253 //RN1E
254 #define RN1E_HCD_100BTX_FD (1 << 15)
255 #define RN1E_HCD_100BT4 (1 << 14)
256 #define RN1E_HCD_100BTX (1 << 13)
257 #define RN1E_HCD_10BT_FD (1 << 12)
258 #define RN1E_HCD_10BT (1 << 11)
259 #define RN1E_AN_RESTART (1 << 8)
260 #define RN1E_AN_COMPLETE (1 << 7)
261 #define RN1E_AN_ACK_COMPLETE (1 << 6)
262 #define RN1E_AN_ACK (1 << 5)
263 #define RN1E_AN_ABLE (1 << 4)
264 #define RN1E_SUPER_ISOLATE (1 << 3)
265 
266 //RN1F register
267 #define RN1F_SHADOW_REG_EN (1 << 7)
268 
269 //RS1B
270 #define RS1B_MLT3_DETECT (1 << 15)
271 #define RS1B_TX_CABLE_LEN2 (1 << 14)
272 #define RS1B_TX_CABLE_LEN1 (1 << 13)
273 #define RS1B_TX_CABLE_LEN0 (1 << 12)
274 #define RS1B_LED_TEST_CTRL (1 << 10)
275 #define RS1B_DESCRAMBLER_LOCKED (1 << 9)
276 #define RS1B_FALSE_CARRIER_DETECT (1 << 8)
277 #define RS1B_BAD_ESD_DETECT (1 << 7)
278 #define RS1B_RX_ERROR_DETECT (1 << 6)
279 #define RS1B_LOCK_ERROR_DETECT (1 << 4)
280 #define RS1B_MLT3_ERROR_DETECT (1 << 3)
281 
282 //C++ guard
283 #ifdef __cplusplus
284  extern "C" {
285 #endif
286 
287 //ST802RT1A Ethernet PHY driver
288 extern const PhyDriver st802rt1aPhyDriver;
289 
290 //ST802RT1A related functions
292 
293 void st802rt1aTick(NetInterface *interface);
294 
295 void st802rt1aEnableIrq(NetInterface *interface);
296 void st802rt1aDisableIrq(NetInterface *interface);
297 
298 void st802rt1aEventHandler(NetInterface *interface);
299 
300 void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address, uint16_t data);
301 uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address);
302 
303 void st802rt1aDumpPhyReg(NetInterface *interface);
304 
305 //C++ guard
306 #ifdef __cplusplus
307  }
308 #endif
309 
310 #endif
void st802rt1aDisableIrq(NetInterface *interface)
Disable interrupts.
error_t st802rt1aInit(NetInterface *interface)
ST802RT1A PHY transceiver initialization.
void st802rt1aEnableIrq(NetInterface *interface)
Enable interrupts.
void st802rt1aDumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
PHY driver.
Definition: nic.h:196
void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
Ipv6Addr address
error_t
Error codes.
Definition: error.h:40
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
void st802rt1aTick(NetInterface *interface)
ST802RT1A timer handler.
void st802rt1aEventHandler(NetInterface *interface)
ST802RT1A event handler.
const PhyDriver st802rt1aPhyDriver
ST802RT1A Ethernet PHY driver.
uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
Network interface controller abstraction layer.