st802rt1a_driver.c
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1 /**
2  * @file st802rt1a_driver.c
3  * @brief ST802RT1A Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief ST802RT1A Ethernet PHY driver
42  **/
43 
45 {
51  NULL,
52  NULL
53 };
54 
55 
56 /**
57  * @brief ST802RT1A PHY transceiver initialization
58  * @param[in] interface Underlying network interface
59  * @return Error code
60  **/
61 
63 {
64  //Debug message
65  TRACE_INFO("Initializing ST802RT1A...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = ST802RT1A_PHY_ADDR;
72  }
73 
74  //Reset PHY transceiver
76 
77  //Wait for the reset to complete
79  {
80  }
81 
82  //Dump PHY registers for debugging purpose
83  st802rt1aDumpPhyReg(interface);
84 
85  //Force the TCP/IP stack to poll the link state at startup
86  interface->phyEvent = TRUE;
87  //Notify the TCP/IP stack of the event
89 
90  //Successful initialization
91  return NO_ERROR;
92 }
93 
94 
95 /**
96  * @brief ST802RT1A timer handler
97  * @param[in] interface Underlying network interface
98  **/
99 
100 void st802rt1aTick(NetInterface *interface)
101 {
102  uint16_t value;
103  bool_t linkState;
104 
105  //Read status register
107  //Retrieve current link state
108  linkState = (value & ST802RT1A_STATS_LINK_STATUS) ? TRUE : FALSE;
109 
110  //Link up event?
111  if(linkState && !interface->linkState)
112  {
113  //Set event flag
114  interface->phyEvent = TRUE;
115  //Notify the TCP/IP stack of the event
117  }
118  //Link down event?
119  else if(!linkState && interface->linkState)
120  {
121  //Set event flag
122  interface->phyEvent = TRUE;
123  //Notify the TCP/IP stack of the event
125  }
126 }
127 
128 
129 /**
130  * @brief Enable interrupts
131  * @param[in] interface Underlying network interface
132  **/
133 
135 {
136 }
137 
138 
139 /**
140  * @brief Disable interrupts
141  * @param[in] interface Underlying network interface
142  **/
143 
145 {
146 }
147 
148 
149 /**
150  * @brief ST802RT1A event handler
151  * @param[in] interface Underlying network interface
152  **/
153 
155 {
156  uint16_t value;
157  bool_t linkState;
158 
159  //Read status register
161  //Retrieve current link state
162  linkState = (value & ST802RT1A_STATS_LINK_STATUS) ? TRUE : FALSE;
163 
164  //Link is up?
165  if(linkState && !interface->linkState)
166  {
167  //Read RN13 register
169 
170  //Check current operation mode
171  switch(value & ST802RT1A_XCCNT_CMODE)
172  {
173  //10BASE-T half-duplex
175  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
176  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
177  break;
178  //10BASE-T full-duplex
180  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
181  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
182  break;
183  //100BASE-TX half-duplex
185  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
186  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
187  break;
188  //100BASE-TX full-duplex
190  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
191  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
192  break;
193  //Unknown operation mode
194  default:
195  //Debug message
196  TRACE_WARNING("Invalid operation mode!\r\n");
197  break;
198  }
199 
200  //Update link state
201  interface->linkState = TRUE;
202 
203  //Adjust MAC configuration parameters for proper operation
204  interface->nicDriver->updateMacConfig(interface);
205 
206  //Process link state change event
207  nicNotifyLinkChange(interface);
208  }
209  //Link is down?
210  else if(!linkState && interface->linkState)
211  {
212  //Update link state
213  interface->linkState = FALSE;
214 
215  //Process link state change event
216  nicNotifyLinkChange(interface);
217  }
218 }
219 
220 
221 /**
222  * @brief Write PHY register
223  * @param[in] interface Underlying network interface
224  * @param[in] address PHY register Register address
225  * @param[in] data Register value
226  **/
227 
228 void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address,
229  uint16_t data)
230 {
231  //Write the specified PHY register
232  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
233  interface->phyAddr, address, data);
234 }
235 
236 
237 /**
238  * @brief Read PHY register
239  * @param[in] interface Underlying network interface
240  * @param[in] address PHY register address
241  * @return Register value
242  **/
243 
244 uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address)
245 {
246  //Read the specified PHY register
247  return interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
248  interface->phyAddr, address);
249 }
250 
251 
252 /**
253  * @brief Dump PHY registers for debugging purpose
254  * @param[in] interface Underlying network interface
255  **/
256 
258 {
259  uint8_t i;
260 
261  //Loop through PHY registers
262  for(i = 0; i < 32; i++)
263  {
264  //Display current PHY register
265  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
266  st802rt1aReadPhyReg(interface, i));
267  }
268 
269  //Terminate with a line feed
270  TRACE_DEBUG("\r\n");
271 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:525
#define ST802RT1A_XCCNT_CMODE_100BTX_FD
int bool_t
Definition: compiler_port.h:49
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:119
#define ST802RT1A_XCCNT_CMODE_10BT_FD
#define ST802RT1A_XCCNT_CMODE
#define ST802RT1A_XCCNT_CMODE_100BTX_HD
#define TRUE
Definition: os_port.h:50
PHY driver.
Definition: nic.h:214
#define ST802RT1A_CNTRL_RESET
uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
error_t st802rt1aInit(NetInterface *interface)
ST802RT1A PHY transceiver initialization.
#define SMI_OPCODE_WRITE
Definition: nic.h:62
#define FALSE
Definition: os_port.h:46
#define ST802RT1A_XCCNT
error_t
Error codes.
Definition: error.h:42
#define ST802RT1A_STATS_LINK_STATUS
void st802rt1aEventHandler(NetInterface *interface)
ST802RT1A event handler.
void st802rt1aDumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:105
#define ST802RT1A_CNTRL
void st802rt1aEnableIrq(NetInterface *interface)
Enable interrupts.
OsEvent netEvent
Definition: net.c:77
#define SMI_OPCODE_READ
Definition: nic.h:63
#define TRACE_INFO(...)
Definition: debug.h:94
const PhyDriver st802rt1aPhyDriver
ST802RT1A Ethernet PHY driver.
void st802rt1aTick(NetInterface *interface)
ST802RT1A timer handler.
void st802rt1aDisableIrq(NetInterface *interface)
Disable interrupts.
#define TRACE_WARNING(...)
Definition: debug.h:84
#define TRACE_DEBUG(...)
Definition: debug.h:106
void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:118
#define ST802RT1A_XCCNT_CMODE_10BT_HD
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
ST802RT1A Ethernet PHY transceiver.
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:106
uint8_t value[]
Definition: dtls_misc.h:150
TCP/IP stack core.
uint8_t data[]
Definition: dtls_misc.h:176
#define ST802RT1A_STATS
#define ST802RT1A_PHY_ADDR
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.