st802rt1a_driver.c
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1 /**
2  * @file st802rt1a_driver.c
3  * @brief ST802RT1A Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.4
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief ST802RT1A Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief ST802RT1A PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  //Debug message
63  TRACE_INFO("Initializing ST802RT1A...\r\n");
64 
65  //Undefined PHY address?
66  if(interface->phyAddr >= 32)
67  {
68  //Use the default address
69  interface->phyAddr = ST802RT1A_PHY_ADDR;
70  }
71 
72  //Initialize serial management interface
73  if(interface->smiDriver != NULL)
74  {
75  interface->smiDriver->init();
76  }
77 
78  //Reset PHY transceiver
80 
81  //Wait for the reset to complete
83  {
84  }
85 
86  //Dump PHY registers for debugging purpose
87  st802rt1aDumpPhyReg(interface);
88 
89  //Perform custom configuration
90  st802rt1aInitHook(interface);
91 
92  //Force the TCP/IP stack to poll the link state at startup
93  interface->phyEvent = TRUE;
94  //Notify the TCP/IP stack of the event
96 
97  //Successful initialization
98  return NO_ERROR;
99 }
100 
101 
102 /**
103  * @brief ST802RT1A custom configuration
104  * @param[in] interface Underlying network interface
105  **/
106 
107 __weak_func void st802rt1aInitHook(NetInterface *interface)
108 {
109 }
110 
111 
112 /**
113  * @brief ST802RT1A timer handler
114  * @param[in] interface Underlying network interface
115  **/
116 
117 void st802rt1aTick(NetInterface *interface)
118 {
119  uint16_t value;
120  bool_t linkState;
121 
122  //Read status register
124  //Retrieve current link state
125  linkState = (value & ST802RT1A_STATS_LINK_STATUS) ? TRUE : FALSE;
126 
127  //Link up event?
128  if(linkState && !interface->linkState)
129  {
130  //Set event flag
131  interface->phyEvent = TRUE;
132  //Notify the TCP/IP stack of the event
134  }
135  //Link down event?
136  else if(!linkState && interface->linkState)
137  {
138  //Set event flag
139  interface->phyEvent = TRUE;
140  //Notify the TCP/IP stack of the event
142  }
143 }
144 
145 
146 /**
147  * @brief Enable interrupts
148  * @param[in] interface Underlying network interface
149  **/
150 
152 {
153 }
154 
155 
156 /**
157  * @brief Disable interrupts
158  * @param[in] interface Underlying network interface
159  **/
160 
162 {
163 }
164 
165 
166 /**
167  * @brief ST802RT1A event handler
168  * @param[in] interface Underlying network interface
169  **/
170 
172 {
173  uint16_t value;
174  bool_t linkState;
175 
176  //Read status register
178  //Retrieve current link state
179  linkState = (value & ST802RT1A_STATS_LINK_STATUS) ? TRUE : FALSE;
180 
181  //Link is up?
182  if(linkState && !interface->linkState)
183  {
184  //Read RN13 register
186 
187  //Check current operation mode
188  switch(value & ST802RT1A_XCCNT_CMODE)
189  {
190  //10BASE-T half-duplex
192  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
193  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
194  break;
195 
196  //10BASE-T full-duplex
198  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
199  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
200  break;
201 
202  //100BASE-TX half-duplex
204  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
205  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
206  break;
207 
208  //100BASE-TX full-duplex
210  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
211  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
212  break;
213 
214  //Unknown operation mode
215  default:
216  //Debug message
217  TRACE_WARNING("Invalid operation mode!\r\n");
218  break;
219  }
220 
221  //Update link state
222  interface->linkState = TRUE;
223 
224  //Adjust MAC configuration parameters for proper operation
225  interface->nicDriver->updateMacConfig(interface);
226 
227  //Process link state change event
228  nicNotifyLinkChange(interface);
229  }
230  //Link is down?
231  else if(!linkState && interface->linkState)
232  {
233  //Update link state
234  interface->linkState = FALSE;
235 
236  //Process link state change event
237  nicNotifyLinkChange(interface);
238  }
239 }
240 
241 
242 /**
243  * @brief Write PHY register
244  * @param[in] interface Underlying network interface
245  * @param[in] address PHY register Register address
246  * @param[in] data Register value
247  **/
248 
249 void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address,
250  uint16_t data)
251 {
252  //Write the specified PHY register
253  if(interface->smiDriver != NULL)
254  {
255  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
256  interface->phyAddr, address, data);
257  }
258  else
259  {
260  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
261  interface->phyAddr, address, data);
262  }
263 }
264 
265 
266 /**
267  * @brief Read PHY register
268  * @param[in] interface Underlying network interface
269  * @param[in] address PHY register address
270  * @return Register value
271  **/
272 
273 uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address)
274 {
275  uint16_t data;
276 
277  //Read the specified PHY register
278  if(interface->smiDriver != NULL)
279  {
280  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
281  interface->phyAddr, address);
282  }
283  else
284  {
285  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
286  interface->phyAddr, address);
287  }
288 
289  //Return the value of the PHY register
290  return data;
291 }
292 
293 
294 /**
295  * @brief Dump PHY registers for debugging purpose
296  * @param[in] interface Underlying network interface
297  **/
298 
300 {
301  uint8_t i;
302 
303  //Loop through PHY registers
304  for(i = 0; i < 32; i++)
305  {
306  //Display current PHY register
307  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
308  st802rt1aReadPhyReg(interface, i));
309  }
310 
311  //Terminate with a line feed
312  TRACE_DEBUG("\r\n");
313 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:559
#define ST802RT1A_XCCNT_CMODE_100BTX_FD
int bool_t
Definition: compiler_port.h:53
#define netEvent
Definition: net_legacy.h:196
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
#define ST802RT1A_XCCNT_CMODE_10BT_FD
#define ST802RT1A_XCCNT_CMODE
#define ST802RT1A_XCCNT_CMODE_100BTX_HD
#define TRUE
Definition: os_port.h:50
Ethernet PHY driver.
Definition: nic.h:311
uint8_t data[]
Definition: ethernet.h:222
#define ST802RT1A_CNTRL_RESET
uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
error_t st802rt1aInit(NetInterface *interface)
ST802RT1A PHY transceiver initialization.
#define SMI_OPCODE_WRITE
Definition: nic.h:66
__weak_func void st802rt1aInitHook(NetInterface *interface)
ST802RT1A custom configuration.
#define FALSE
Definition: os_port.h:46
#define ST802RT1A_XCCNT
error_t
Error codes.
Definition: error.h:43
#define ST802RT1A_STATS_LINK_STATUS
void st802rt1aEventHandler(NetInterface *interface)
ST802RT1A event handler.
void st802rt1aDumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
#define ST802RT1A_CNTRL
void st802rt1aEnableIrq(NetInterface *interface)
Enable interrupts.
#define SMI_OPCODE_READ
Definition: nic.h:67
#define TRACE_INFO(...)
Definition: debug.h:95
const PhyDriver st802rt1aPhyDriver
ST802RT1A Ethernet PHY driver.
void st802rt1aTick(NetInterface *interface)
ST802RT1A timer handler.
void st802rt1aDisableIrq(NetInterface *interface)
Disable interrupts.
#define TRACE_WARNING(...)
Definition: debug.h:85
#define TRACE_DEBUG(...)
Definition: debug.h:107
void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
Ipv6Addr address[]
Definition: ipv6.h:325
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
#define ST802RT1A_XCCNT_CMODE_10BT_HD
uint8_t value[]
Definition: tcp.h:369
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
ST802RT1A Ethernet PHY driver.
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
TCP/IP stack core.
#define ST802RT1A_STATS
#define ST802RT1A_PHY_ADDR
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.