st802rt1a_driver.c
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1 /**
2  * @file st802rt1a_driver.c
3  * @brief ST802RT1A Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2020 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.8
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief ST802RT1A Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief ST802RT1A PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  //Debug message
63  TRACE_INFO("Initializing ST802RT1A...\r\n");
64 
65  //Undefined PHY address?
66  if(interface->phyAddr >= 32)
67  {
68  //Use the default address
69  interface->phyAddr = ST802RT1A_PHY_ADDR;
70  }
71 
72  //Initialize serial management interface
73  if(interface->smiDriver != NULL)
74  {
75  interface->smiDriver->init();
76  }
77 
78  //Reset PHY transceiver
80 
81  //Wait for the reset to complete
83  {
84  }
85 
86  //Dump PHY registers for debugging purpose
87  st802rt1aDumpPhyReg(interface);
88 
89  //Force the TCP/IP stack to poll the link state at startup
90  interface->phyEvent = TRUE;
91  //Notify the TCP/IP stack of the event
93 
94  //Successful initialization
95  return NO_ERROR;
96 }
97 
98 
99 /**
100  * @brief ST802RT1A timer handler
101  * @param[in] interface Underlying network interface
102  **/
103 
104 void st802rt1aTick(NetInterface *interface)
105 {
106  uint16_t value;
107  bool_t linkState;
108 
109  //Read status register
111  //Retrieve current link state
112  linkState = (value & ST802RT1A_STATS_LINK_STATUS) ? TRUE : FALSE;
113 
114  //Link up event?
115  if(linkState && !interface->linkState)
116  {
117  //Set event flag
118  interface->phyEvent = TRUE;
119  //Notify the TCP/IP stack of the event
121  }
122  //Link down event?
123  else if(!linkState && interface->linkState)
124  {
125  //Set event flag
126  interface->phyEvent = TRUE;
127  //Notify the TCP/IP stack of the event
129  }
130 }
131 
132 
133 /**
134  * @brief Enable interrupts
135  * @param[in] interface Underlying network interface
136  **/
137 
139 {
140 }
141 
142 
143 /**
144  * @brief Disable interrupts
145  * @param[in] interface Underlying network interface
146  **/
147 
149 {
150 }
151 
152 
153 /**
154  * @brief ST802RT1A event handler
155  * @param[in] interface Underlying network interface
156  **/
157 
159 {
160  uint16_t value;
161  bool_t linkState;
162 
163  //Read status register
165  //Retrieve current link state
166  linkState = (value & ST802RT1A_STATS_LINK_STATUS) ? TRUE : FALSE;
167 
168  //Link is up?
169  if(linkState && !interface->linkState)
170  {
171  //Read RN13 register
173 
174  //Check current operation mode
175  switch(value & ST802RT1A_XCCNT_CMODE)
176  {
177  //10BASE-T half-duplex
179  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
180  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
181  break;
182  //10BASE-T full-duplex
184  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
185  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
186  break;
187  //100BASE-TX half-duplex
189  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
190  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
191  break;
192  //100BASE-TX full-duplex
194  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
195  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
196  break;
197  //Unknown operation mode
198  default:
199  //Debug message
200  TRACE_WARNING("Invalid operation mode!\r\n");
201  break;
202  }
203 
204  //Update link state
205  interface->linkState = TRUE;
206 
207  //Adjust MAC configuration parameters for proper operation
208  interface->nicDriver->updateMacConfig(interface);
209 
210  //Process link state change event
211  nicNotifyLinkChange(interface);
212  }
213  //Link is down?
214  else if(!linkState && interface->linkState)
215  {
216  //Update link state
217  interface->linkState = FALSE;
218 
219  //Process link state change event
220  nicNotifyLinkChange(interface);
221  }
222 }
223 
224 
225 /**
226  * @brief Write PHY register
227  * @param[in] interface Underlying network interface
228  * @param[in] address PHY register Register address
229  * @param[in] data Register value
230  **/
231 
232 void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address,
233  uint16_t data)
234 {
235  //Write the specified PHY register
236  if(interface->smiDriver != NULL)
237  {
238  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
239  interface->phyAddr, address, data);
240  }
241  else
242  {
243  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
244  interface->phyAddr, address, data);
245  }
246 }
247 
248 
249 /**
250  * @brief Read PHY register
251  * @param[in] interface Underlying network interface
252  * @param[in] address PHY register address
253  * @return Register value
254  **/
255 
256 uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address)
257 {
258  uint16_t data;
259 
260  //Read the specified PHY register
261  if(interface->smiDriver != NULL)
262  {
263  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
264  interface->phyAddr, address);
265  }
266  else
267  {
268  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
269  interface->phyAddr, address);
270  }
271 
272  //Return the value of the PHY register
273  return data;
274 }
275 
276 
277 /**
278  * @brief Dump PHY registers for debugging purpose
279  * @param[in] interface Underlying network interface
280  **/
281 
283 {
284  uint8_t i;
285 
286  //Loop through PHY registers
287  for(i = 0; i < 32; i++)
288  {
289  //Display current PHY register
290  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
291  st802rt1aReadPhyReg(interface, i));
292  }
293 
294  //Terminate with a line feed
295  TRACE_DEBUG("\r\n");
296 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:532
#define ST802RT1A_XCCNT_CMODE_100BTX_FD
int bool_t
Definition: compiler_port.h:49
#define netEvent
Definition: net_legacy.h:267
uint8_t data[]
Definition: ethernet.h:209
#define ST802RT1A_XCCNT_CMODE_10BT_FD
#define ST802RT1A_XCCNT_CMODE
#define ST802RT1A_XCCNT_CMODE_100BTX_HD
#define TRUE
Definition: os_port.h:50
Ethernet PHY driver.
Definition: nic.h:292
#define ST802RT1A_CNTRL_RESET
uint16_t st802rt1aReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
error_t st802rt1aInit(NetInterface *interface)
ST802RT1A PHY transceiver initialization.
#define SMI_OPCODE_WRITE
Definition: nic.h:65
#define FALSE
Definition: os_port.h:46
#define ST802RT1A_XCCNT
error_t
Error codes.
Definition: error.h:42
#define ST802RT1A_STATS_LINK_STATUS
uint8_t value[]
Definition: tcp.h:332
void st802rt1aEventHandler(NetInterface *interface)
ST802RT1A event handler.
void st802rt1aDumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define NetInterface
Definition: net.h:36
#define ST802RT1A_CNTRL
void st802rt1aEnableIrq(NetInterface *interface)
Enable interrupts.
#define SMI_OPCODE_READ
Definition: nic.h:66
#define TRACE_INFO(...)
Definition: debug.h:95
const PhyDriver st802rt1aPhyDriver
ST802RT1A Ethernet PHY driver.
void st802rt1aTick(NetInterface *interface)
ST802RT1A timer handler.
void st802rt1aDisableIrq(NetInterface *interface)
Disable interrupts.
#define TRACE_WARNING(...)
Definition: debug.h:85
#define TRACE_DEBUG(...)
Definition: debug.h:107
void st802rt1aWritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define ST802RT1A_XCCNT_CMODE_10BT_HD
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
ST802RT1A Ethernet PHY driver.
TCP/IP stack core.
#define ST802RT1A_STATS
#define ST802RT1A_PHY_ADDR
Success.
Definition: error.h:44
Debugging facilities.