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31 #ifndef _STM32F4XX_ETH_DRIVER_H
32 #define _STM32F4XX_ETH_DRIVER_H
38 #ifndef STM32F4XX_ETH_TX_BUFFER_COUNT
39 #define STM32F4XX_ETH_TX_BUFFER_COUNT 3
40 #elif (STM32F4XX_ETH_TX_BUFFER_COUNT < 1)
41 #error STM32F4XX_ETH_TX_BUFFER_COUNT parameter is not valid
45 #ifndef STM32F4XX_ETH_TX_BUFFER_SIZE
46 #define STM32F4XX_ETH_TX_BUFFER_SIZE 1536
47 #elif (STM32F4XX_ETH_TX_BUFFER_SIZE != 1536)
48 #error STM32F4XX_ETH_TX_BUFFER_SIZE parameter is not valid
52 #ifndef STM32F4XX_ETH_RX_BUFFER_COUNT
53 #define STM32F4XX_ETH_RX_BUFFER_COUNT 6
54 #elif (STM32F4XX_ETH_RX_BUFFER_COUNT < 1)
55 #error STM32F4XX_ETH_RX_BUFFER_COUNT parameter is not valid
59 #ifndef STM32F4XX_ETH_RX_BUFFER_SIZE
60 #define STM32F4XX_ETH_RX_BUFFER_SIZE 1536
61 #elif (STM32F4XX_ETH_RX_BUFFER_SIZE != 1536)
62 #error STM32F4XX_ETH_RX_BUFFER_SIZE parameter is not valid
66 #ifndef STM32F4XX_ETH_IRQ_PRIORITY_GROUPING
67 #define STM32F4XX_ETH_IRQ_PRIORITY_GROUPING 3
68 #elif (STM32F4XX_ETH_IRQ_PRIORITY_GROUPING < 0)
69 #error STM32F4XX_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
73 #ifndef STM32F4XX_ETH_IRQ_GROUP_PRIORITY
74 #define STM32F4XX_ETH_IRQ_GROUP_PRIORITY 12
75 #elif (STM32F4XX_ETH_IRQ_GROUP_PRIORITY < 0)
76 #error STM32F4XX_ETH_IRQ_GROUP_PRIORITY parameter is not valid
80 #ifndef STM32F4XX_ETH_IRQ_SUB_PRIORITY
81 #define STM32F4XX_ETH_IRQ_SUB_PRIORITY 0
82 #elif (STM32F4XX_ETH_IRQ_SUB_PRIORITY < 0)
83 #error STM32F4XX_ETH_IRQ_SUB_PRIORITY parameter is not valid
87 #define ETH_MACCR_RESERVED15 0x00008000
90 #define ETH_TDES0_OWN 0x80000000
91 #define ETH_TDES0_IC 0x40000000
92 #define ETH_TDES0_LS 0x20000000
93 #define ETH_TDES0_FS 0x10000000
94 #define ETH_TDES0_DC 0x08000000
95 #define ETH_TDES0_DP 0x04000000
96 #define ETH_TDES0_TTSE 0x02000000
97 #define ETH_TDES0_CIC 0x00C00000
98 #define ETH_TDES0_TER 0x00200000
99 #define ETH_TDES0_TCH 0x00100000
100 #define ETH_TDES0_TTSS 0x00020000
101 #define ETH_TDES0_IHE 0x00010000
102 #define ETH_TDES0_ES 0x00008000
103 #define ETH_TDES0_JT 0x00004000
104 #define ETH_TDES0_FF 0x00002000
105 #define ETH_TDES0_IPE 0x00001000
106 #define ETH_TDES0_LCA 0x00000800
107 #define ETH_TDES0_NC 0x00000400
108 #define ETH_TDES0_LCO 0x00000200
109 #define ETH_TDES0_EC 0x00000100
110 #define ETH_TDES0_VF 0x00000080
111 #define ETH_TDES0_CC 0x00000078
112 #define ETH_TDES0_ED 0x00000004
113 #define ETH_TDES0_UF 0x00000002
114 #define ETH_TDES0_DB 0x00000001
115 #define ETH_TDES1_TBS2 0x1FFF0000
116 #define ETH_TDES1_TBS1 0x00001FFF
117 #define ETH_TDES2_TBAP1 0xFFFFFFFF
118 #define ETH_TDES3_TBAP2 0xFFFFFFFF
119 #define ETH_TDES6_TTSL 0xFFFFFFFF
120 #define ETH_TDES7_TTSH 0xFFFFFFFF
123 #define ETH_RDES0_OWN 0x80000000
124 #define ETH_RDES0_AFM 0x40000000
125 #define ETH_RDES0_FL 0x3FFF0000
126 #define ETH_RDES0_ES 0x00008000
127 #define ETH_RDES0_DE 0x00004000
128 #define ETH_RDES0_SAF 0x00002000
129 #define ETH_RDES0_LE 0x00001000
130 #define ETH_RDES0_OE 0x00000800
131 #define ETH_RDES0_VLAN 0x00000400
132 #define ETH_RDES0_FS 0x00000200
133 #define ETH_RDES0_LS 0x00000100
134 #define ETH_RDES0_IPHCE_TSV 0x00000080
135 #define ETH_RDES0_LCO 0x00000040
136 #define ETH_RDES0_FT 0x00000020
137 #define ETH_RDES0_RWT 0x00000010
138 #define ETH_RDES0_RE 0x00000008
139 #define ETH_RDES0_DBE 0x00000004
140 #define ETH_RDES0_CE 0x00000002
141 #define ETH_RDES0_PCE_ESA 0x00000001
142 #define ETH_RDES1_DIC 0x80000000
143 #define ETH_RDES1_RBS2 0x1FFF0000
144 #define ETH_RDES1_RER 0x00008000
145 #define ETH_RDES1_RCH 0x00004000
146 #define ETH_RDES1_RBS1 0x00001FFF
147 #define ETH_RDES2_RBAP1 0xFFFFFFFF
148 #define ETH_RDES3_RBAP2 0xFFFFFFFF
149 #define ETH_RDES4_PV 0x00002000
150 #define ETH_RDES4_PFT 0x00001000
151 #define ETH_RDES4_PMT 0x00000F00
152 #define ETH_RDES4_IPV6PR 0x00000080
153 #define ETH_RDES4_IPV4PR 0x00000040
154 #define ETH_RDES4_IPCB 0x00000020
155 #define ETH_RDES4_IPPE 0x00000010
156 #define ETH_RDES4_IPHE 0x00000008
157 #define ETH_RDES4_IPPT 0x00000007
158 #define ETH_RDES6_RTSL 0xFFFFFFFF
159 #define ETH_RDES7_RTSH 0xFFFFFFFF
const NicDriver stm32f4xxEthDriver
STM32F4 Ethernet MAC driver.
void stm32f4xxEthTick(NetInterface *interface)
STM32F4 Ethernet MAC timer handler.
Structure describing a buffer that spans multiple chunks.
error_t stm32f4xxEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
void stm32f4xxEthInitDmaDesc(NetInterface *interface)
Initialize DMA descriptor lists.
void stm32f4xxEthDisableIrq(NetInterface *interface)
Disable interrupts.
void stm32f4xxEthEnableIrq(NetInterface *interface)
Enable interrupts.
uint32_t stm32f4xxEthCalcCrc(const void *data, size_t length)
CRC calculation.
error_t stm32f4xxEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
void stm32f4xxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
error_t stm32f4xxEthInit(NetInterface *interface)
STM32F4 Ethernet MAC initialization.
uint16_t stm32f4xxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void stm32f4xxEthEventHandler(NetInterface *interface)
STM32F4 Ethernet MAC event handler.
Enhanced TX DMA descriptor.
error_t stm32f4xxEthReceivePacket(NetInterface *interface)
Receive a packet.
void stm32f4xxEthInitGpio(NetInterface *interface)
GPIO configuration.
Network interface controller abstraction layer.
error_t stm32f4xxEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
Enhanced RX DMA descriptor.