vsc8662_driver.c
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1 /**
2  * @file vsc8662_driver.c
3  * @brief VSC8662 Gigabit Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.4
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief VSC8662 Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief VSC8662 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  //Debug message
63  TRACE_INFO("Initializing VSC8662...\r\n");
64 
65  //Undefined PHY address?
66  if(interface->phyAddr >= 32)
67  {
68  //Use the default address
69  interface->phyAddr = VSC8662_PHY_ADDR;
70  }
71 
72  //Initialize serial management interface
73  if(interface->smiDriver != NULL)
74  {
75  interface->smiDriver->init();
76  }
77 
78  //Reset PHY transceiver
80 
81  //Wait for the reset to complete
83  {
84  }
85 
86  //Dump PHY registers for debugging purpose
87  vsc8662DumpPhyReg(interface);
88 
89  //Perform custom configuration
90  vsc8662InitHook(interface);
91 
92  //Force the TCP/IP stack to poll the link state at startup
93  interface->phyEvent = TRUE;
94  //Notify the TCP/IP stack of the event
96 
97  //Successful initialization
98  return NO_ERROR;
99 }
100 
101 
102 /**
103  * @brief VSC8662 custom configuration
104  * @param[in] interface Underlying network interface
105  **/
106 
107 __weak_func void vsc8662InitHook(NetInterface *interface)
108 {
109 }
110 
111 
112 /**
113  * @brief VSC8662 timer handler
114  * @param[in] interface Underlying network interface
115  **/
116 
117 void vsc8662Tick(NetInterface *interface)
118 {
119  uint16_t value;
120  bool_t linkState;
121 
122  //Read basic status register
123  value = vsc8662ReadPhyReg(interface, VSC8662_BMSR);
124  //Retrieve current link state
125  linkState = (value & VSC8662_BMSR_LINK_STATUS) ? TRUE : FALSE;
126 
127  //Link up event?
128  if(linkState && !interface->linkState)
129  {
130  //Set event flag
131  interface->phyEvent = TRUE;
132  //Notify the TCP/IP stack of the event
134  }
135  //Link down event?
136  else if(!linkState && interface->linkState)
137  {
138  //Set event flag
139  interface->phyEvent = TRUE;
140  //Notify the TCP/IP stack of the event
142  }
143 }
144 
145 
146 /**
147  * @brief Enable interrupts
148  * @param[in] interface Underlying network interface
149  **/
150 
152 {
153 }
154 
155 
156 /**
157  * @brief Disable interrupts
158  * @param[in] interface Underlying network interface
159  **/
160 
162 {
163 }
164 
165 
166 /**
167  * @brief VSC8662 event handler
168  * @param[in] interface Underlying network interface
169  **/
170 
172 {
173  uint16_t status;
174 
175  //Read basic status register
176  status = vsc8662ReadPhyReg(interface, VSC8662_BMSR);
177 
178  //Link is up?
179  if((status & VSC8662_BMSR_LINK_STATUS) != 0)
180  {
181  //Read auxiliary control and status register
182  status = vsc8662ReadPhyReg(interface, VSC8662_AUX_CTRL_STAT);
183 
184  //Check current speed
185  switch(status & VSC8662_AUX_CTRL_STAT_SPEED_STATUS)
186  {
187  //10BASE-T
189  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
190  break;
191  //100BASE-TX
193  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
194  break;
195  //1000BASE-T
197  interface->linkSpeed = NIC_LINK_SPEED_1GBPS;
198  break;
199  //Unknown speed
200  default:
201  //Debug message
202  TRACE_WARNING("Invalid speed\r\n");
203  break;
204  }
205 
206  //Check current duplex mode
207  if((status & VSC8662_AUX_CTRL_STAT_FDX_STATUS) != 0)
208  {
209  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
210  }
211  else
212  {
213  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
214  }
215 
216  //Update link state
217  interface->linkState = TRUE;
218 
219  //Adjust MAC configuration parameters for proper operation
220  interface->nicDriver->updateMacConfig(interface);
221  }
222  else
223  {
224  //Update link state
225  interface->linkState = FALSE;
226  }
227 
228  //Process link state change event
229  nicNotifyLinkChange(interface);
230 }
231 
232 
233 /**
234  * @brief Write PHY register
235  * @param[in] interface Underlying network interface
236  * @param[in] address PHY register address
237  * @param[in] data Register value
238  **/
239 
240 void vsc8662WritePhyReg(NetInterface *interface, uint8_t address,
241  uint16_t data)
242 {
243  //Write the specified PHY register
244  if(interface->smiDriver != NULL)
245  {
246  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
247  interface->phyAddr, address, data);
248  }
249  else
250  {
251  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
252  interface->phyAddr, address, data);
253  }
254 }
255 
256 
257 /**
258  * @brief Read PHY register
259  * @param[in] interface Underlying network interface
260  * @param[in] address PHY register address
261  * @return Register value
262  **/
263 
264 uint16_t vsc8662ReadPhyReg(NetInterface *interface, uint8_t address)
265 {
266  uint16_t data;
267 
268  //Read the specified PHY register
269  if(interface->smiDriver != NULL)
270  {
271  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
272  interface->phyAddr, address);
273  }
274  else
275  {
276  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
277  interface->phyAddr, address);
278  }
279 
280  //Return the value of the PHY register
281  return data;
282 }
283 
284 
285 /**
286  * @brief Dump PHY registers for debugging purpose
287  * @param[in] interface Underlying network interface
288  **/
289 
291 {
292  uint8_t i;
293 
294  //Loop through PHY registers
295  for(i = 0; i < 32; i++)
296  {
297  //Display current PHY register
298  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
299  vsc8662ReadPhyReg(interface, i));
300  }
301 
302  //Terminate with a line feed
303  TRACE_DEBUG("\r\n");
304 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:559
@ NIC_LINK_SPEED_1GBPS
Definition: nic.h:113
#define VSC8662_BMSR
int bool_t
Definition: compiler_port.h:53
#define netEvent
Definition: net_legacy.h:196
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
void vsc8662EventHandler(NetInterface *interface)
VSC8662 event handler.
#define TRUE
Definition: os_port.h:50
Ethernet PHY driver.
Definition: nic.h:311
uint8_t data[]
Definition: ethernet.h:222
#define VSC8662_AUX_CTRL_STAT_SPEED_STATUS
#define VSC8662_AUX_CTRL_STAT_SPEED_STATUS_10
void vsc8662DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define VSC8662_BMCR
uint16_t vsc8662ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
#define SMI_OPCODE_WRITE
Definition: nic.h:66
VSC8662 Gigabit Ethernet PHY driver.
#define FALSE
Definition: os_port.h:46
#define VSC8662_BMSR_LINK_STATUS
error_t
Error codes.
Definition: error.h:43
#define VSC8662_AUX_CTRL_STAT
#define VSC8662_BMCR_RESET
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
__weak_func void vsc8662InitHook(NetInterface *interface)
VSC8662 custom configuration.
void vsc8662Tick(NetInterface *interface)
VSC8662 timer handler.
#define SMI_OPCODE_READ
Definition: nic.h:67
#define TRACE_INFO(...)
Definition: debug.h:95
#define VSC8662_AUX_CTRL_STAT_FDX_STATUS
#define VSC8662_AUX_CTRL_STAT_SPEED_STATUS_100
#define TRACE_WARNING(...)
Definition: debug.h:85
#define TRACE_DEBUG(...)
Definition: debug.h:107
error_t vsc8662Init(NetInterface *interface)
VSC8662 PHY transceiver initialization.
#define VSC8662_AUX_CTRL_STAT_SPEED_STATUS_1000
Ipv6Addr address[]
Definition: ipv6.h:325
void vsc8662EnableIrq(NetInterface *interface)
Enable interrupts.
void vsc8662DisableIrq(NetInterface *interface)
Disable interrupts.
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
uint8_t value[]
Definition: tcp.h:369
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
void vsc8662WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
#define VSC8662_PHY_ADDR
TCP/IP stack core.
const PhyDriver vsc8662PhyDriver
VSC8662 Ethernet PHY driver.
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.