a2fxxxm3_eth_driver.h
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1 /**
2  * @file a2fxxxm3_eth_driver.h
3  * @brief SmartFusion (A2FxxxM3) Ethernet MAC driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2020 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.8
29  **/
30 
31 #ifndef _A2FXXXM3_ETH_DRIVER_H
32 #define _A2FXXXM3_ETH_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Number of TX buffers
38 #ifndef A2FXXXM3_ETH_TX_BUFFER_COUNT
39  #define A2FXXXM3_ETH_TX_BUFFER_COUNT 2
40 #elif (A2FXXXM3_ETH_TX_BUFFER_COUNT < 1)
41  #error A2FXXXM3_ETH_TX_BUFFER_COUNT parameter is not valid
42 #endif
43 
44 //TX buffer size
45 #ifndef A2FXXXM3_ETH_TX_BUFFER_SIZE
46  #define A2FXXXM3_ETH_TX_BUFFER_SIZE 1536
47 #elif (A2FXXXM3_ETH_TX_BUFFER_SIZE != 1536)
48  #error A2FXXXM3_ETH_TX_BUFFER_SIZE parameter is not valid
49 #endif
50 
51 //Number of RX buffers
52 #ifndef A2FXXXM3_ETH_RX_BUFFER_COUNT
53  #define A2FXXXM3_ETH_RX_BUFFER_COUNT 4
54 #elif (A2FXXXM3_ETH_RX_BUFFER_COUNT < 1)
55  #error A2FXXXM3_ETH_RX_BUFFER_COUNT parameter is not valid
56 #endif
57 
58 //RX buffer size
59 #ifndef A2FXXXM3_ETH_RX_BUFFER_SIZE
60  #define A2FXXXM3_ETH_RX_BUFFER_SIZE 1536
61 #elif (A2FXXXM3_ETH_RX_BUFFER_SIZE != 1536)
62  #error A2FXXXM3_ETH_RX_BUFFER_SIZE parameter is not valid
63 #endif
64 
65 //Interrupt priority grouping
66 #ifndef A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING
67  #define A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING 2
68 #elif (A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING < 0)
69  #error A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
70 #endif
71 
72 //Ethernet interrupt group priority
73 #ifndef A2FXXXM3_ETH_IRQ_GROUP_PRIORITY
74  #define A2FXXXM3_ETH_IRQ_GROUP_PRIORITY 24
75 #elif (A2FXXXM3_ETH_IRQ_GROUP_PRIORITY < 0)
76  #error A2FXXXM3_ETH_IRQ_GROUP_PRIORITY parameter is not valid
77 #endif
78 
79 //Ethernet interrupt subpriority
80 #ifndef A2FXXXM3_ETH_IRQ_SUB_PRIORITY
81  #define A2FXXXM3_ETH_IRQ_SUB_PRIORITY 0
82 #elif (A2FXXXM3_ETH_IRQ_SUB_PRIORITY < 0)
83  #error A2FXXXM3_ETH_IRQ_SUB_PRIORITY parameter is not valid
84 #endif
85 
86 //MDEN bit definition
87 #ifndef CSR9_MDEN_MASK
88  #define CSR9_MDEN_MASK CSR9_MII_MASK
89 #endif
90 
91 //C++ guard
92 #ifdef __cplusplus
93 extern "C" {
94 #endif
95 
96 
97 /**
98  * @brief Transmit DMA descriptor
99  **/
100 
101 typedef struct
102 {
103  uint32_t tdes0;
104  uint32_t tdes1;
105  uint32_t tdes2;
106  uint32_t tdes3;
108 
109 
110 /**
111  * @brief Receive DMA descriptor
112  **/
113 
114 typedef struct
115 {
116  uint32_t rdes0;
117  uint32_t rdes1;
118  uint32_t rdes2;
119  uint32_t rdes3;
121 
122 
123 /**
124  * @brief Hash table setup frame
125  **/
126 
127 typedef struct
128 {
129  uint32_t hashFilter[32]; //0-127
130  uint32_t reserved1[7]; //128-155
131  uint32_t physicalAddr[3]; //156-167
132  uint32_t reserved2[6]; //168-191
134 
135 
136 //A2FxxxM3 Ethernet MAC driver
137 extern const NicDriver a2fxxxm3EthDriver;
138 
139 //A2FxxxM3 Ethernet MAC related functions
141 void a2fxxxm3EthInitDmaDesc(NetInterface *interface);
142 
143 void a2fxxxm3EthTick(NetInterface *interface);
144 
145 void a2fxxxm3EthEnableIrq(NetInterface *interface);
146 void a2fxxxm3EthDisableIrq(NetInterface *interface);
147 void a2fxxxm3EthEventHandler(NetInterface *interface);
148 
150 
152  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
153 
155 
158 
159 void a2fxxxm3EthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
160  uint8_t regAddr, uint16_t data);
161 
162 uint16_t a2fxxxm3EthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
163  uint8_t regAddr);
164 
165 void a2fxxxm3EthWriteSmi(uint32_t data, uint_t length);
167 
168 uint32_t a2fxxxm3EthCalcCrc(const void *data, size_t length);
169 
170 //C++ guard
171 #ifdef __cplusplus
172 }
173 #endif
174 
175 #endif
uint8_t length
Definition: coap_common.h:190
uint8_t opcode
Definition: dns_common.h:172
uint32_t a2fxxxm3EthCalcCrc(const void *data, size_t length)
CRC calculation.
error_t a2fxxxm3EthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
uint8_t data[]
Definition: ethernet.h:209
error_t a2fxxxm3EthInit(NetInterface *interface)
A2FxxxM3 Ethernet MAC initialization.
void a2fxxxm3EthEnableIrq(NetInterface *interface)
Enable interrupts.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
error_t a2fxxxm3EthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
void a2fxxxm3EthInitDmaDesc(NetInterface *interface)
Initialize DMA descriptor lists.
error_t a2fxxxm3EthReceivePacket(NetInterface *interface)
Receive a packet.
void a2fxxxm3EthTick(NetInterface *interface)
A2FxxxM3 Ethernet MAC timer handler.
void a2fxxxm3EthDisableIrq(NetInterface *interface)
Disable interrupts.
error_t
Error codes.
Definition: error.h:42
uint16_t a2fxxxm3EthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
uint8_t reserved1
Definition: tcp.h:312
#define NetInterface
Definition: net.h:36
uint32_t a2fxxxm3EthReadSmi(uint_t length)
SMI read operation.
#define NetTxAncillary
Definition: net_misc.h:36
void a2fxxxm3EthEventHandler(NetInterface *interface)
A2FxxxM3 Ethernet MAC event handler.
error_t a2fxxxm3EthSendSetup(NetInterface *interface)
Send a setup frame.
uint16_t regAddr
Network interface controller abstraction layer.
void a2fxxxm3EthWriteSmi(uint32_t data, uint_t length)
SMI write operation.
Transmit DMA descriptor.
void a2fxxxm3EthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
uint8_t reserved2
Definition: tcp.h:315
Hash table setup frame.
unsigned int uint_t
Definition: compiler_port.h:45
NIC driver.
Definition: nic.h:257
Receive DMA descriptor.
const NicDriver a2fxxxm3EthDriver
A2FxxxM3 Ethernet MAC driver.
error_t a2fxxxm3EthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.