a2fxxxm3_eth_driver.h
Go to the documentation of this file.
1 /**
2  * @file a2fxxxm3_eth_driver.h
3  * @brief SmartFusion (A2FxxxM3) Ethernet MAC controller
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _A2FXXXM3_ETH_DRIVER_H
30 #define _A2FXXXM3_ETH_DRIVER_H
31 
32 //Dependencies
33 #include "core/nic.h"
34 
35 //Number of TX buffers
36 #ifndef A2FXXXM3_ETH_TX_BUFFER_COUNT
37  #define A2FXXXM3_ETH_TX_BUFFER_COUNT 2
38 #elif (A2FXXXM3_ETH_TX_BUFFER_COUNT < 1)
39  #error A2FXXXM3_ETH_TX_BUFFER_COUNT parameter is not valid
40 #endif
41 
42 //TX buffer size
43 #ifndef A2FXXXM3_ETH_TX_BUFFER_SIZE
44  #define A2FXXXM3_ETH_TX_BUFFER_SIZE 1536
45 #elif (A2FXXXM3_ETH_TX_BUFFER_SIZE != 1536)
46  #error A2FXXXM3_ETH_TX_BUFFER_SIZE parameter is not valid
47 #endif
48 
49 //Number of RX buffers
50 #ifndef A2FXXXM3_ETH_RX_BUFFER_COUNT
51  #define A2FXXXM3_ETH_RX_BUFFER_COUNT 4
52 #elif (A2FXXXM3_ETH_RX_BUFFER_COUNT < 1)
53  #error A2FXXXM3_ETH_RX_BUFFER_COUNT parameter is not valid
54 #endif
55 
56 //RX buffer size
57 #ifndef A2FXXXM3_ETH_RX_BUFFER_SIZE
58  #define A2FXXXM3_ETH_RX_BUFFER_SIZE 1536
59 #elif (A2FXXXM3_ETH_RX_BUFFER_SIZE != 1536)
60  #error A2FXXXM3_ETH_RX_BUFFER_SIZE parameter is not valid
61 #endif
62 
63 //Interrupt priority grouping
64 #ifndef A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING
65  #define A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING 2
66 #elif (A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING < 0)
67  #error A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
68 #endif
69 
70 //Ethernet interrupt group priority
71 #ifndef A2FXXXM3_ETH_IRQ_GROUP_PRIORITY
72  #define A2FXXXM3_ETH_IRQ_GROUP_PRIORITY 24
73 #elif (A2FXXXM3_ETH_IRQ_GROUP_PRIORITY < 0)
74  #error A2FXXXM3_ETH_IRQ_GROUP_PRIORITY parameter is not valid
75 #endif
76 
77 //Ethernet interrupt subpriority
78 #ifndef A2FXXXM3_ETH_IRQ_SUB_PRIORITY
79  #define A2FXXXM3_ETH_IRQ_SUB_PRIORITY 0
80 #elif (A2FXXXM3_ETH_IRQ_SUB_PRIORITY < 0)
81  #error A2FXXXM3_ETH_IRQ_SUB_PRIORITY parameter is not valid
82 #endif
83 
84 //MDEN bit definition
85 #ifndef CSR9_MDEN_MASK
86  #define CSR9_MDEN_MASK CSR9_MII_MASK
87 #endif
88 
89 //Serial Management Interface
90 #define SMI_SYNC 0xFFFFFFFF
91 #define SMI_START 0x00000001
92 #define SMI_WRITE 0x00000001
93 #define SMI_READ 0x00000002
94 #define SMI_TA 0x00000002
95 
96 //C++ guard
97 #ifdef __cplusplus
98  extern "C" {
99 #endif
100 
101 
102 /**
103  * @brief Transmit DMA descriptor
104  **/
105 
106 typedef struct
107 {
108  uint32_t tdes0;
109  uint32_t tdes1;
110  uint32_t tdes2;
111  uint32_t tdes3;
113 
114 
115 /**
116  * @brief Receive DMA descriptor
117  **/
118 
119 typedef struct
120 {
121  uint32_t rdes0;
122  uint32_t rdes1;
123  uint32_t rdes2;
124  uint32_t rdes3;
126 
127 
128 /**
129  * @brief Hash table setup frame
130  **/
131 
132 typedef struct
133 {
134  uint32_t hashFilter[32]; //0-127
135  uint32_t reserved1[7]; //128-155
136  uint32_t physicalAddr[3]; //156-167
137  uint32_t reserved2[6]; //168-191
139 
140 
141 //A2FxxxM3 Ethernet MAC driver
142 extern const NicDriver a2fxxxm3EthDriver;
143 
144 //A2FxxxM3 Ethernet MAC related functions
146 void a2fxxxm3EthInitDmaDesc(NetInterface *interface);
147 
148 void a2fxxxm3EthTick(NetInterface *interface);
149 
150 void a2fxxxm3EthEnableIrq(NetInterface *interface);
151 void a2fxxxm3EthDisableIrq(NetInterface *interface);
152 void a2fxxxm3EthEventHandler(NetInterface *interface);
153 
155 
157  const NetBuffer *buffer, size_t offset);
158 
160 
163 
164 void a2fxxxm3EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
165 uint16_t a2fxxxm3EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
166 
167 void a2fxxxm3EthWriteSmi(uint32_t data, uint_t length);
169 
170 uint32_t a2fxxxm3EthCalcCrc(const void *data, size_t length);
171 
172 //C++ guard
173 #ifdef __cplusplus
174  }
175 #endif
176 
177 #endif
void a2fxxxm3EthDisableIrq(NetInterface *interface)
Disable interrupts.
error_t a2fxxxm3EthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
error_t a2fxxxm3EthReceivePacket(NetInterface *interface)
Receive a packet.
uint32_t a2fxxxm3EthReadSmi(uint_t length)
SMI read operation.
uint8_t reserved2
Definition: tcp.h:313
void a2fxxxm3EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
const NicDriver a2fxxxm3EthDriver
A2FxxxM3 Ethernet MAC driver.
void a2fxxxm3EthEventHandler(NetInterface *interface)
A2FxxxM3 Ethernet MAC event handler.
NIC driver.
Definition: nic.h:161
uint16_t a2fxxxm3EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:86
error_t a2fxxxm3EthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
error_t a2fxxxm3EthInit(NetInterface *interface)
A2FxxxM3 Ethernet MAC initialization.
void a2fxxxm3EthTick(NetInterface *interface)
A2FxxxM3 Ethernet MAC timer handler.
uint16_t regAddr
void a2fxxxm3EthWriteSmi(uint32_t data, uint_t length)
SMI write operation.
error_t
Error codes.
Definition: error.h:40
error_t a2fxxxm3EthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
unsigned int uint_t
Definition: compiler_port.h:43
uint8_t data[]
Definition: dtls_misc.h:167
Receive DMA descriptor.
#define NetInterface
Definition: net.h:34
void a2fxxxm3EthInitDmaDesc(NetInterface *interface)
Initialize DMA descriptor lists.
Hash table setup frame.
uint8_t reserved1
Definition: tcp.h:310
uint8_t length
Definition: dtls_misc.h:140
Transmit DMA descriptor.
uint32_t a2fxxxm3EthCalcCrc(const void *data, size_t length)
CRC calculation.
Network interface controller abstraction layer.
error_t a2fxxxm3EthSendSetup(NetInterface *interface)
Send a setup frame.
void a2fxxxm3EthEnableIrq(NetInterface *interface)
Enable interrupts.