ar8031_driver.c
Go to the documentation of this file.
1 /**
2  * @file ar8031_driver.c
3  * @brief AR8031 Gigabit Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 //Switch to the appropriate trace level
30 #define TRACE_LEVEL NIC_TRACE_LEVEL
31 
32 //Dependencies
33 #include "core/net.h"
35 #include "debug.h"
36 
37 
38 /**
39  * @brief AR8031 Ethernet PHY driver
40  **/
41 
43 {
44  ar8031Init,
45  ar8031Tick,
49 };
50 
51 
52 /**
53  * @brief AR8031 PHY transceiver initialization
54  * @param[in] interface Underlying network interface
55  * @return Error code
56  **/
57 
59 {
60  //Debug message
61  TRACE_INFO("Initializing AR8031...\r\n");
62 
63  //Initialize external interrupt line driver
64  if(interface->extIntDriver != NULL)
65  interface->extIntDriver->init();
66 
67  //Reset PHY transceiver
69  //Wait for the reset to complete
70  while(ar8031ReadPhyReg(interface, AR8031_PHY_REG_BMCR) & BMCR_RESET);
71 
72  //Chip configuration register
75 
76  //Basic mode control register
79 
80  //Auto-negotiation advertisement register
84 
85  //1000 BASE-T control register
88 
89  //Function control register
93 
94  //Dump PHY registers for debugging purpose
95  ar8031DumpPhyReg(interface);
96 
97  //The PHY will generate interrupts when link status changes are detected
100 
101  //Force the TCP/IP stack to poll the link state at startup
102  interface->phyEvent = TRUE;
103  //Notify the TCP/IP stack of the event
105 
106  //Successful initialization
107  return NO_ERROR;
108 }
109 
110 
111 /**
112  * @brief AR8031 timer handler
113  * @param[in] interface Underlying network interface
114  **/
115 
116 void ar8031Tick(NetInterface *interface)
117 {
118  uint16_t value;
119  bool_t linkState;
120 
121  //No external interrupt line driver?
122  if(interface->extIntDriver == NULL)
123  {
124  //Read basic status register
126  //Retrieve current link state
127  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
128 
129  //Link up event?
130  if(linkState && !interface->linkState)
131  {
132  //Set event flag
133  interface->phyEvent = TRUE;
134  //Notify the TCP/IP stack of the event
136  }
137  //Link down event?
138  else if(!linkState && interface->linkState)
139  {
140  //Set event flag
141  interface->phyEvent = TRUE;
142  //Notify the TCP/IP stack of the event
144  }
145  }
146 }
147 
148 
149 /**
150  * @brief Enable interrupts
151  * @param[in] interface Underlying network interface
152  **/
153 
155 {
156  //Enable PHY transceiver interrupts
157  if(interface->extIntDriver != NULL)
158  interface->extIntDriver->enableIrq();
159 }
160 
161 
162 /**
163  * @brief Disable interrupts
164  * @param[in] interface Underlying network interface
165  **/
166 
168 {
169  //Disable PHY transceiver interrupts
170  if(interface->extIntDriver != NULL)
171  interface->extIntDriver->disableIrq();
172 }
173 
174 
175 /**
176  * @brief AR8031 event handler
177  * @param[in] interface Underlying network interface
178  **/
179 
181 {
182  uint16_t status;
183 
184  //Read status register to acknowledge the interrupt
185  status = ar8031ReadPhyReg(interface, AR8031_PHY_REG_INT_STATUS);
186 
187  //Link status change?
189  {
190  //Read PHY status register
191  status = ar8031ReadPhyReg(interface, AR8031_PHY_REG_PHY_STATUS);
192 
193  //Link is up?
194  if(status & PHY_STATUS_LINK)
195  {
196  //Check current speed
197  switch(status & PHY_STATUS_SPEED_MASK)
198  {
199  //10BASE-T
200  case PHY_STATUS_SPEED_10:
201  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
202  break;
203  //100BASE-TX
205  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
206  break;
207  //1000BASE-T
209  interface->linkSpeed = NIC_LINK_SPEED_1GBPS;
210  break;
211  //Unknown speed
212  default:
213  //Debug message
214  TRACE_WARNING("Invalid speed\r\n");
215  break;
216  }
217 
218  //Check current duplex mode
219  if(status & PHY_STATUS_DUPLEX)
220  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
221  else
222  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
223 
224  //Update link state
225  interface->linkState = TRUE;
226 
227  //Adjust MAC configuration parameters for proper operation
228  interface->nicDriver->updateMacConfig(interface);
229  }
230  else
231  {
232  //Update link state
233  interface->linkState = FALSE;
234  }
235 
236  //Process link state change event
237  nicNotifyLinkChange(interface);
238  }
239 }
240 
241 
242 /**
243  * @brief Write PHY register
244  * @param[in] interface Underlying network interface
245  * @param[in] address PHY register address
246  * @param[in] data Register value
247  **/
248 
249 void ar8031WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
250 {
251  uint8_t phyAddr;
252 
253  //Get the address of the PHY transceiver
254  if(interface->phyAddr < 32)
255  phyAddr = interface->phyAddr;
256  else
257  phyAddr = AR8031_PHY_ADDR;
258 
259  //Write the specified PHY register
260  interface->nicDriver->writePhyReg(phyAddr, address, data);
261 }
262 
263 
264 /**
265  * @brief Read PHY register
266  * @param[in] interface Underlying network interface
267  * @param[in] address PHY register address
268  * @return Register value
269  **/
270 
271 uint16_t ar8031ReadPhyReg(NetInterface *interface, uint8_t address)
272 {
273  uint8_t phyAddr;
274 
275  //Get the address of the PHY transceiver
276  if(interface->phyAddr < 32)
277  phyAddr = interface->phyAddr;
278  else
279  phyAddr = AR8031_PHY_ADDR;
280 
281  //Read the specified PHY register
282  return interface->nicDriver->readPhyReg(phyAddr, address);
283 }
284 
285 
286 /**
287  * @brief Dump PHY registers for debugging purpose
288  * @param[in] interface Underlying network interface
289  **/
290 
292 {
293  uint8_t i;
294 
295  //Loop through PHY registers
296  for(i = 0; i < 32; i++)
297  {
298  //Display current PHY register
299  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i, ar8031ReadPhyReg(interface, i));
300  }
301 
302  //Terminate with a line feed
303  TRACE_DEBUG("\r\n");
304 }
#define CHIP_CONFIG_BT_BX_REG_SEL
void nicNotifyLinkChange(NetInterface *interface)
Process link state change event.
Definition: nic.c:298
#define _1000BT_CTRL_1000BT_FD
#define ANAR_10BT_FD
#define ANAR_SELECTOR0
TCP/IP stack core.
Debugging facilities.
#define INT_STATUS_LINK_FAIL
#define BMSR_LINK_STATUS
Definition: ar8031_driver.h:95
#define ANAR_PAUSE
#define AR8031_PHY_REG_BMSR
Definition: ar8031_driver.h:44
#define AR8031_PHY_REG_INT_EN
Definition: ar8031_driver.h:59
#define PHY_STATUS_SPEED_1000
#define ANAR_ASYMMETRIC_PAUSE
void ar8031DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
uint16_t ar8031ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
#define AR8031_PHY_REG_BMCR
Definition: ar8031_driver.h:43
#define PHY_STATUS_SPEED_MASK
#define TRUE
Definition: os_port.h:48
#define AR8031_PHY_ADDR
Definition: ar8031_driver.h:37
#define FUNCTION_MDI_CROSSOVER_MODE0
#define ANAR_10BT_HD
PHY driver.
Definition: nic.h:196
void ar8031EnableIrq(NetInterface *interface)
Enable interrupts.
#define CHIP_CONFIG_PRIORITY_SEL
#define PHY_STATUS_DUPLEX
#define FUNCTION_ASSERT_CRS_ON_TX
#define AR8031_PHY_REG_CHIP_CONFIG
Definition: ar8031_driver.h:68
#define AR8031_PHY_REG_ANAR
Definition: ar8031_driver.h:47
#define BMCR_RESET
Definition: ar8031_driver.h:71
void ar8031WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define PHY_STATUS_SPEED_10
#define AR8031_PHY_REG_INT_STATUS
Definition: ar8031_driver.h:60
#define TRACE_INFO(...)
Definition: debug.h:86
const PhyDriver ar8031PhyDriver
AR8031 Ethernet PHY driver.
Definition: ar8031_driver.c:42
void ar8031Tick(NetInterface *interface)
AR8031 timer handler.
Success.
Definition: error.h:42
error_t ar8031Init(NetInterface *interface)
AR8031 PHY transceiver initialization.
Definition: ar8031_driver.c:58
Ipv6Addr address
OsEvent netEvent
Definition: net.c:72
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
error_t
Error codes.
Definition: error.h:40
#define TRACE_WARNING(...)
Definition: debug.h:78
#define ANAR_100BTX_FD
void ar8031EventHandler(NetInterface *interface)
AR8031 event handler.
#define ANAR_XNP_ABLE
AR8031 Gigabit Ethernet PHY transceiver.
#define PHY_STATUS_LINK
#define AR8031_PHY_REG_1000BT_CTRL
Definition: ar8031_driver.h:52
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
#define BMCR_AN_EN
#define ANAR_100BTX_HD
uint8_t value[]
Definition: dtls_misc.h:141
#define INT_STATUS_LINK_SUCCESS
#define BMCR_DUPLEX_MODE
#define FUNCTION_MDI_CROSSOVER_MODE1
#define BMCR_SPEED_SEL_LSB
Definition: ar8031_driver.h:73
#define AR8031_PHY_REG_PHY_STATUS
Definition: ar8031_driver.h:58
#define FALSE
Definition: os_port.h:44
int bool_t
Definition: compiler_port.h:47
void ar8031DisableIrq(NetInterface *interface)
Disable interrupts.
#define PHY_STATUS_SPEED_100
#define FUNCTION_POLARITY_REVERSAL
#define TRACE_DEBUG(...)
Definition: debug.h:98
#define AR8031_PHY_REG_FUNCTION_CTRL
Definition: ar8031_driver.h:57