dp83640_driver.c
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1 /**
2  * @file dp83640_driver.c
3  * @brief DP83640 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2020 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.8
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief DP83640 Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief DP83640 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  uint16_t value;
63 
64  //Debug message
65  TRACE_INFO("Initializing DP83640...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = DP83640_PHY_ADDR;
72  }
73 
74  //Initialize serial management interface
75  if(interface->smiDriver != NULL)
76  {
77  interface->smiDriver->init();
78  }
79 
80  //Initialize external interrupt line driver
81  if(interface->extIntDriver != NULL)
82  {
83  interface->extIntDriver->init();
84  }
85 
86  //A software reset is accomplished by setting the RESET bit of the BMCR register
88 
89  //Wait for the reset to complete
91  {
92  }
93 
94  //Dump PHY registers for debugging purpose
95  dp83640DumpPhyReg(interface);
96 
97  //Configure PWR_DOWN/INT pin as an interrupt output
100 
101  //The PHY will generate interrupts when link status changes are detected
103 
104  //Select page 6
105  dp83640WritePhyReg(interface, DP83640_PAGSR, 6);
106 
107  //If the CLK_OUT pin is to be used as a 50 MHz RMII clock, the default PTP
108  //clock output function must be disabled
112 
113  //Select page 0
114  dp83640WritePhyReg(interface, DP83640_PAGSR, 0);
115 
116  //Force the TCP/IP stack to poll the link state at startup
117  interface->phyEvent = TRUE;
118  //Notify the TCP/IP stack of the event
120 
121  //Successful initialization
122  return NO_ERROR;
123 }
124 
125 
126 /**
127  * @brief DP83640 timer handler
128  * @param[in] interface Underlying network interface
129  **/
130 
131 void dp83640Tick(NetInterface *interface)
132 {
133  uint16_t value;
134  bool_t linkState;
135 
136  //No external interrupt line driver?
137  if(interface->extIntDriver == NULL)
138  {
139  //Read basic status register
140  value = dp83640ReadPhyReg(interface, DP83640_BMSR);
141  //Retrieve current link state
142  linkState = (value & DP83640_BMSR_LINK_STATUS) ? TRUE : FALSE;
143 
144  //Link up event?
145  if(linkState && !interface->linkState)
146  {
147  //Set event flag
148  interface->phyEvent = TRUE;
149  //Notify the TCP/IP stack of the event
151  }
152  //Link down event?
153  else if(!linkState && interface->linkState)
154  {
155  //Set event flag
156  interface->phyEvent = TRUE;
157  //Notify the TCP/IP stack of the event
159  }
160  }
161 }
162 
163 
164 /**
165  * @brief Enable interrupts
166  * @param[in] interface Underlying network interface
167  **/
168 
170 {
171  //Enable PHY transceiver interrupts
172  if(interface->extIntDriver != NULL)
173  {
174  interface->extIntDriver->enableIrq();
175  }
176 }
177 
178 
179 /**
180  * @brief Disable interrupts
181  * @param[in] interface Underlying network interface
182  **/
183 
185 {
186  //Disable PHY transceiver interrupts
187  if(interface->extIntDriver != NULL)
188  {
189  interface->extIntDriver->disableIrq();
190  }
191 }
192 
193 
194 /**
195  * @brief DP83640 event handler
196  * @param[in] interface Underlying network interface
197  **/
198 
200 {
201  uint16_t status;
202 
203  //Read status register to acknowledge the interrupt
204  status = dp83640ReadPhyReg(interface, DP83640_MISR);
205 
206  //Link status change?
207  if((status & DP83640_MISR_LINK_INT) != 0)
208  {
209  //Read PHY status register
210  status = dp83640ReadPhyReg(interface, DP83640_PHYSTS);
211 
212  //Link is up?
213  if((status & DP83640_PHYSTS_LINK_STATUS) != 0)
214  {
215  //Check current speed
216  if((status & DP83640_PHYSTS_SPEED_STATUS) != 0)
217  {
218  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
219  }
220  else
221  {
222  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
223  }
224 
225  //Check duplex mode
226  if((status & DP83640_PHYSTS_DUPLEX_STATUS) != 0)
227  {
228  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
229  }
230  else
231  {
232  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
233  }
234 
235  //Update link state
236  interface->linkState = TRUE;
237 
238  //Adjust MAC configuration parameters for proper operation
239  interface->nicDriver->updateMacConfig(interface);
240  }
241  else
242  {
243  //Update link state
244  interface->linkState = FALSE;
245  }
246 
247  //Process link state change event
248  nicNotifyLinkChange(interface);
249  }
250 }
251 
252 
253 /**
254  * @brief Write PHY register
255  * @param[in] interface Underlying network interface
256  * @param[in] address PHY register address
257  * @param[in] data Register value
258  **/
259 
260 void dp83640WritePhyReg(NetInterface *interface, uint8_t address,
261  uint16_t data)
262 {
263  //Write the specified PHY register
264  if(interface->smiDriver != NULL)
265  {
266  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
267  interface->phyAddr, address, data);
268  }
269  else
270  {
271  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
272  interface->phyAddr, address, data);
273  }
274 }
275 
276 
277 /**
278  * @brief Read PHY register
279  * @param[in] interface Underlying network interface
280  * @param[in] address PHY register address
281  * @return Register value
282  **/
283 
284 uint16_t dp83640ReadPhyReg(NetInterface *interface, uint8_t address)
285 {
286  uint16_t data;
287 
288  //Read the specified PHY register
289  if(interface->smiDriver != NULL)
290  {
291  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
292  interface->phyAddr, address);
293  }
294  else
295  {
296  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
297  interface->phyAddr, address);
298  }
299 
300  //Return the value of the PHY register
301  return data;
302 }
303 
304 
305 /**
306  * @brief Dump PHY registers for debugging purpose
307  * @param[in] interface Underlying network interface
308  **/
309 
311 {
312  uint8_t i;
313 
314  //Loop through PHY registers
315  for(i = 0; i < 32; i++)
316  {
317  //Display current PHY register
318  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
319  dp83640ReadPhyReg(interface, i));
320  }
321 
322  //Terminate with a line feed
323  TRACE_DEBUG("\r\n");
324 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:532
int bool_t
Definition: compiler_port.h:49
#define netEvent
Definition: net_legacy.h:267
uint8_t data[]
Definition: ethernet.h:209
DP83640 Ethernet PHY driver.
#define TRUE
Definition: os_port.h:50
Ethernet PHY driver.
Definition: nic.h:292
#define DP83640_BMSR
#define DP83640_BMSR_LINK_STATUS
void dp83640DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define SMI_OPCODE_WRITE
Definition: nic.h:65
void dp83640EventHandler(NetInterface *interface)
DP83640 event handler.
const PhyDriver dp83640PhyDriver
DP83640 Ethernet PHY driver.
#define FALSE
Definition: os_port.h:46
#define DP83640_PTP_COC_PTP_CLKOUT_EN
error_t
Error codes.
Definition: error.h:42
uint8_t value[]
Definition: tcp.h:332
#define NetInterface
Definition: net.h:36
#define DP83640_MICR_INTEN
uint16_t dp83640ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
#define DP83640_MISR_LINK_INT_EN
#define DP83640_MISR_LINK_INT
#define SMI_OPCODE_READ
Definition: nic.h:66
#define TRACE_INFO(...)
Definition: debug.h:95
#define DP83640_PHYSTS_LINK_STATUS
#define DP83640_PTP_COC
#define DP83640_MISR
#define DP83640_BMCR_RESET
#define TRACE_DEBUG(...)
Definition: debug.h:107
#define DP83640_MICR_INT_OE
#define DP83640_MICR
#define DP83640_PHY_ADDR
#define DP83640_PHYSTS
void dp83640DisableIrq(NetInterface *interface)
Disable interrupts.
#define DP83640_PAGSR
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define DP83640_BMCR
#define DP83640_PHYSTS_DUPLEX_STATUS
void dp83640EnableIrq(NetInterface *interface)
Enable interrupts.
#define DP83640_PHYSTS_SPEED_STATUS
TCP/IP stack core.
void dp83640Tick(NetInterface *interface)
DP83640 timer handler.
void dp83640WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
error_t dp83640Init(NetInterface *interface)
DP83640 PHY transceiver initialization.
Success.
Definition: error.h:44
Debugging facilities.