dp83640_driver.c
Go to the documentation of this file.
1 /**
2  * @file dp83640_driver.c
3  * @brief DP83640 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief DP83640 Ethernet PHY driver
42  **/
43 
45 {
51  NULL,
52  NULL
53 };
54 
55 
56 /**
57  * @brief DP83640 PHY transceiver initialization
58  * @param[in] interface Underlying network interface
59  * @return Error code
60  **/
61 
63 {
64  uint16_t value;
65 
66  //Debug message
67  TRACE_INFO("Initializing DP83640...\r\n");
68 
69  //Undefined PHY address?
70  if(interface->phyAddr >= 32)
71  {
72  //Use the default address
73  interface->phyAddr = DP83640_PHY_ADDR;
74  }
75 
76  //Initialize external interrupt line driver
77  if(interface->extIntDriver != NULL)
78  {
79  interface->extIntDriver->init();
80  }
81 
82  //A software reset is accomplished by setting the RESET bit of the BMCR register
84 
85  //Wait for the reset to complete
87  {
88  }
89 
90  //Dump PHY registers for debugging purpose
91  dp83640DumpPhyReg(interface);
92 
93  //Configure PWR_DOWN/INT pin as an interrupt output
96 
97  //The PHY will generate interrupts when link status changes are detected
99 
100  //Select page 6
101  dp83640WritePhyReg(interface, DP83640_PAGESEL, 6);
102 
103  //If the CLK_OUT pin is to be used as a 50 MHz RMII clock, the default PTP
104  //clock output function must be disabled
108 
109  //Select page 0
110  dp83640WritePhyReg(interface, DP83640_PAGESEL, 0);
111 
112  //Force the TCP/IP stack to poll the link state at startup
113  interface->phyEvent = TRUE;
114  //Notify the TCP/IP stack of the event
116 
117  //Successful initialization
118  return NO_ERROR;
119 }
120 
121 
122 /**
123  * @brief DP83640 timer handler
124  * @param[in] interface Underlying network interface
125  **/
126 
127 void dp83640Tick(NetInterface *interface)
128 {
129  uint16_t value;
130  bool_t linkState;
131 
132  //No external interrupt line driver?
133  if(interface->extIntDriver == NULL)
134  {
135  //Read basic status register
136  value = dp83640ReadPhyReg(interface, DP83640_BMSR);
137  //Retrieve current link state
138  linkState = (value & DP83640_BMSR_LINK_STATUS) ? TRUE : FALSE;
139 
140  //Link up event?
141  if(linkState && !interface->linkState)
142  {
143  //Set event flag
144  interface->phyEvent = TRUE;
145  //Notify the TCP/IP stack of the event
147  }
148  //Link down event?
149  else if(!linkState && interface->linkState)
150  {
151  //Set event flag
152  interface->phyEvent = TRUE;
153  //Notify the TCP/IP stack of the event
155  }
156  }
157 }
158 
159 
160 /**
161  * @brief Enable interrupts
162  * @param[in] interface Underlying network interface
163  **/
164 
166 {
167  //Enable PHY transceiver interrupts
168  if(interface->extIntDriver != NULL)
169  {
170  interface->extIntDriver->enableIrq();
171  }
172 }
173 
174 
175 /**
176  * @brief Disable interrupts
177  * @param[in] interface Underlying network interface
178  **/
179 
181 {
182  //Disable PHY transceiver interrupts
183  if(interface->extIntDriver != NULL)
184  {
185  interface->extIntDriver->disableIrq();
186  }
187 }
188 
189 
190 /**
191  * @brief DP83640 event handler
192  * @param[in] interface Underlying network interface
193  **/
194 
196 {
197  uint16_t status;
198 
199  //Read status register to acknowledge the interrupt
200  status = dp83640ReadPhyReg(interface, DP83640_MISR);
201 
202  //Link status change?
203  if(status & DP83640_MISR_LINK_INT)
204  {
205  //Read PHY status register
206  status = dp83640ReadPhyReg(interface, DP83640_PHYSTS);
207 
208  //Link is up?
209  if(status & DP83640_PHYSTS_LINK_STATUS)
210  {
211  //Check current speed
212  if(status & DP83640_PHYSTS_SPEED_STATUS)
213  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
214  else
215  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
216 
217  //Check duplex mode
218  if(status & DP83640_PHYSTS_DUPLEX_STATUS)
219  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
220  else
221  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
222 
223  //Update link state
224  interface->linkState = TRUE;
225 
226  //Adjust MAC configuration parameters for proper operation
227  interface->nicDriver->updateMacConfig(interface);
228  }
229  else
230  {
231  //Update link state
232  interface->linkState = FALSE;
233  }
234 
235  //Process link state change event
236  nicNotifyLinkChange(interface);
237  }
238 }
239 
240 
241 /**
242  * @brief Write PHY register
243  * @param[in] interface Underlying network interface
244  * @param[in] address PHY register address
245  * @param[in] data Register value
246  **/
247 
248 void dp83640WritePhyReg(NetInterface *interface, uint8_t address,
249  uint16_t data)
250 {
251  //Write the specified PHY register
252  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
253  interface->phyAddr, address, data);
254 }
255 
256 
257 /**
258  * @brief Read PHY register
259  * @param[in] interface Underlying network interface
260  * @param[in] address PHY register address
261  * @return Register value
262  **/
263 
264 uint16_t dp83640ReadPhyReg(NetInterface *interface, uint8_t address)
265 {
266  //Read the specified PHY register
267  return interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
268  interface->phyAddr, address);
269 }
270 
271 
272 /**
273  * @brief Dump PHY registers for debugging purpose
274  * @param[in] interface Underlying network interface
275  **/
276 
278 {
279  uint8_t i;
280 
281  //Loop through PHY registers
282  for(i = 0; i < 32; i++)
283  {
284  //Display current PHY register
285  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
286  dp83640ReadPhyReg(interface, i));
287  }
288 
289  //Terminate with a line feed
290  TRACE_DEBUG("\r\n");
291 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:525
int bool_t
Definition: compiler_port.h:49
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:119
DP83640 Ethernet PHY transceiver.
#define TRUE
Definition: os_port.h:50
PHY driver.
Definition: nic.h:214
#define DP83640_BMSR
#define DP83640_BMSR_LINK_STATUS
void dp83640DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define SMI_OPCODE_WRITE
Definition: nic.h:62
void dp83640EventHandler(NetInterface *interface)
DP83640 event handler.
const PhyDriver dp83640PhyDriver
DP83640 Ethernet PHY driver.
#define FALSE
Definition: os_port.h:46
#define DP83640_PTP_COC_PTP_CLKOUT_EN
error_t
Error codes.
Definition: error.h:42
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:105
#define DP83640_MICR_INTEN
uint16_t dp83640ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
#define DP83640_MISR_LINK_INT_EN
OsEvent netEvent
Definition: net.c:77
#define DP83640_MISR_LINK_INT
#define SMI_OPCODE_READ
Definition: nic.h:63
#define TRACE_INFO(...)
Definition: debug.h:94
#define DP83640_PHYSTS_LINK_STATUS
#define DP83640_PTP_COC
#define DP83640_MISR
#define DP83640_BMCR_RESET
#define TRACE_DEBUG(...)
Definition: debug.h:106
#define DP83640_MICR_INT_OE
#define DP83640_MICR
#define DP83640_PHY_ADDR
#define DP83640_PHYSTS
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:118
void dp83640DisableIrq(NetInterface *interface)
Disable interrupts.
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define DP83640_BMCR
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:106
#define DP83640_PHYSTS_DUPLEX_STATUS
void dp83640EnableIrq(NetInterface *interface)
Enable interrupts.
uint8_t value[]
Definition: dtls_misc.h:150
#define DP83640_PHYSTS_SPEED_STATUS
TCP/IP stack core.
uint8_t data[]
Definition: dtls_misc.h:176
void dp83640Tick(NetInterface *interface)
DP83640 timer handler.
void dp83640WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
error_t dp83640Init(NetInterface *interface)
DP83640 PHY transceiver initialization.
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.