ics1894_driver.c
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1 /**
2  * @file ics1894_driver.c
3  * @brief ICS1894-32 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.4
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief ICS1894 Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief ICS1894 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  uint16_t temp;
63 
64  //Debug message
65  TRACE_INFO("Initializing ICS1894...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = ICS1894_PHY_ADDR;
72  }
73 
74  //Initialize serial management interface
75  if(interface->smiDriver != NULL)
76  {
77  interface->smiDriver->init();
78  }
79 
80  //Reset PHY transceiver
82 
83  //Wait for the reset to complete
85  {
86  }
87 
88  //Dump PHY registers for debugging purpose
89  ics1894DumpPhyReg(interface);
90 
91  //The PHY supports full-duplex operation only
94 
95  //Configure LED0 mode
96  temp = ics1894ReadPhyReg(interface, ICS1894_ECR3);
97  temp &= ~ICS1894_ECR3_LED0_MODE;
99  ics1894WritePhyReg(interface, ICS1894_ECR3, temp);
100 
101  //Configure LED1 mode
102  temp = ics1894ReadPhyReg(interface, ICS1894_ECR3);
103  temp &= ~ICS1894_ECR3_LED1_MODE;
105  ics1894WritePhyReg(interface, ICS1894_ECR3, temp);
106 
107  //Perform custom configuration
108  ics1894InitHook(interface);
109 
110  //Force the TCP/IP stack to poll the link state at startup
111  interface->phyEvent = TRUE;
112  //Notify the TCP/IP stack of the event
114 
115  //Successful initialization
116  return NO_ERROR;
117 }
118 
119 
120 /**
121  * @brief ICS1894 custom configuration
122  * @param[in] interface Underlying network interface
123  **/
124 
125 __weak_func void ics1894InitHook(NetInterface *interface)
126 {
127 }
128 
129 
130 /**
131  * @brief ICS1894 timer handler
132  * @param[in] interface Underlying network interface
133  **/
134 
135 void ics1894Tick(NetInterface *interface)
136 {
137  uint16_t value;
138  bool_t linkState;
139 
140  //Read basic status register
141  value = ics1894ReadPhyReg(interface, ICS1894_BMSR);
142  //Retrieve current link state
143  linkState = (value & ICS1894_BMSR_LINK_STATUS) ? TRUE : FALSE;
144 
145  //Link up event?
146  if(linkState && !interface->linkState)
147  {
148  //Set event flag
149  interface->phyEvent = TRUE;
150  //Notify the TCP/IP stack of the event
152  }
153  //Link down event?
154  else if(!linkState && interface->linkState)
155  {
156  //Set event flag
157  interface->phyEvent = TRUE;
158  //Notify the TCP/IP stack of the event
160  }
161 }
162 
163 
164 /**
165  * @brief Enable interrupts
166  * @param[in] interface Underlying network interface
167  **/
168 
170 {
171 }
172 
173 
174 /**
175  * @brief Disable interrupts
176  * @param[in] interface Underlying network interface
177  **/
178 
180 {
181 }
182 
183 
184 /**
185  * @brief ICS1894 event handler
186  * @param[in] interface Underlying network interface
187  **/
188 
190 {
191  uint16_t value;
192 
193  //Read Quick Poll Detailed Status register
194  value = ics1894ReadPhyReg(interface, ICS1894_QPDSR);
195 
196  //Link is up?
197  if((value & ICS1894_QPDSR_LINK_STATUS) != 0)
198  {
199  //Check current speed
200  if((value & ICS1894_QPDSR_DATA_RATE) != 0)
201  {
202  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
203  }
204  else
205  {
206  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
207  }
208 
209  //Check current duplex mode
210  if((value & ICS1894_QPDSR_DUPLEX) != 0)
211  {
212  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
213  }
214  else
215  {
216  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
217  }
218 
219  //Update link state
220  interface->linkState = TRUE;
221 
222  //Adjust MAC configuration parameters for proper operation
223  interface->nicDriver->updateMacConfig(interface);
224  }
225  else
226  {
227  //Update link state
228  interface->linkState = FALSE;
229  }
230 
231  //Process link state change event
232  nicNotifyLinkChange(interface);
233 }
234 
235 
236 /**
237  * @brief Write PHY register
238  * @param[in] interface Underlying network interface
239  * @param[in] address PHY register address
240  * @param[in] data Register value
241  **/
242 
243 void ics1894WritePhyReg(NetInterface *interface, uint8_t address,
244  uint16_t data)
245 {
246  //Write the specified PHY register
247  if(interface->smiDriver != NULL)
248  {
249  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
250  interface->phyAddr, address, data);
251  }
252  else
253  {
254  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
255  interface->phyAddr, address, data);
256  }
257 }
258 
259 
260 /**
261  * @brief Read PHY register
262  * @param[in] interface Underlying network interface
263  * @param[in] address PHY register address
264  * @return Register value
265  **/
266 
267 uint16_t ics1894ReadPhyReg(NetInterface *interface, uint8_t address)
268 {
269  uint16_t data;
270 
271  //Read the specified PHY register
272  if(interface->smiDriver != NULL)
273  {
274  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
275  interface->phyAddr, address);
276  }
277  else
278  {
279  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
280  interface->phyAddr, address);
281  }
282 
283  //Return the value of the PHY register
284  return data;
285 }
286 
287 
288 /**
289  * @brief Dump PHY registers for debugging purpose
290  * @param[in] interface Underlying network interface
291  **/
292 
294 {
295  uint8_t i;
296 
297  //Loop through PHY registers
298  for(i = 0; i < 32; i++)
299  {
300  //Display current PHY register
301  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
302  ics1894ReadPhyReg(interface, i));
303  }
304 
305  //Terminate with a line feed
306  TRACE_DEBUG("\r\n");
307 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:559
void ics1894DisableIrq(NetInterface *interface)
Disable interrupts.
int bool_t
Definition: compiler_port.h:53
#define ICS1894_BMSR
#define netEvent
Definition: net_legacy.h:196
#define ICS1894_ECR3_LED1_MODE
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
#define ICS1894_QPDSR_LINK_STATUS
#define ICS1894_ECR3_LED1_MODE_ACT
#define TRUE
Definition: os_port.h:50
void ics1894WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
Ethernet PHY driver.
Definition: nic.h:311
uint8_t data[]
Definition: ethernet.h:222
__weak_func void ics1894InitHook(NetInterface *interface)
ICS1894 custom configuration.
const PhyDriver ics1894PhyDriver
ICS1894 Ethernet PHY driver.
#define ICS1894_ECR3
#define ICS1894_QPDSR
#define ICS1894_ANAR_100BTX_FD
#define ICS1894_ECR3_LED0_MODE_LINK_STAT
#define SMI_OPCODE_WRITE
Definition: nic.h:66
#define ICS1894_ANAR_SELECTOR_DEFAULT
#define FALSE
Definition: os_port.h:46
void ics1894EnableIrq(NetInterface *interface)
Enable interrupts.
error_t
Error codes.
Definition: error.h:43
#define ICS1894_ANAR_10BT_FD
#define ICS1894_QPDSR_DATA_RATE
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
#define ICS1894_ECR3_LED0_MODE
#define ICS1894_BMCR
#define SMI_OPCODE_READ
Definition: nic.h:67
#define TRACE_INFO(...)
Definition: debug.h:95
#define ICS1894_BMSR_LINK_STATUS
#define ICS1894_QPDSR_DUPLEX
#define TRACE_DEBUG(...)
Definition: debug.h:107
#define ICS1894_ANAR
void ics1894DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define ICS1894_PHY_ADDR
Ipv6Addr address[]
Definition: ipv6.h:325
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
uint8_t value[]
Definition: tcp.h:369
#define ICS1894_BMCR_RESET
void ics1894EventHandler(NetInterface *interface)
ICS1894 event handler.
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
error_t ics1894Init(NetInterface *interface)
ICS1894 PHY transceiver initialization.
void ics1894Tick(NetInterface *interface)
ICS1894 timer handler.
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
TCP/IP stack core.
ICS1894-32 Ethernet PHY driver.
uint16_t ics1894ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.