ksz8081_driver.c
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1 /**
2  * @file ksz8081_driver.c
3  * @brief KSZ8081 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief KSZ8081 Ethernet PHY driver
42  **/
43 
45 {
51  NULL,
52  NULL
53 };
54 
55 
56 /**
57  * @brief KSZ8081 PHY transceiver initialization
58  * @param[in] interface Underlying network interface
59  * @return Error code
60  **/
61 
63 {
64  //Debug message
65  TRACE_INFO("Initializing KSZ8081...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = KSZ8081_PHY_ADDR;
72  }
73 
74  //Initialize external interrupt line driver
75  if(interface->extIntDriver != NULL)
76  {
77  interface->extIntDriver->init();
78  }
79 
80  //Reset PHY transceiver
82 
83  //Wait for the reset to complete
85  {
86  }
87 
88  //Dump PHY registers for debugging purpose
89  ksz8081DumpPhyReg(interface);
90 
91 #if (KSZ8081_50MHZ_CLOCK_MODE_SUPPORT == ENABLED)
92  //Select 50MHz clock mode
95 #endif
96 
97  //Restore default auto-negotiation advertisement parameters
101 
102  //Enable auto-negotiation
104 
105  //The PHY will generate interrupts when link status changes are detected
108 
109  //Force the TCP/IP stack to poll the link state at startup
110  interface->phyEvent = TRUE;
111  //Notify the TCP/IP stack of the event
113 
114  //Successful initialization
115  return NO_ERROR;
116 }
117 
118 
119 /**
120  * @brief KSZ8081 timer handler
121  * @param[in] interface Underlying network interface
122  **/
123 
124 void ksz8081Tick(NetInterface *interface)
125 {
126  uint16_t value;
127  bool_t linkState;
128 
129  //No external interrupt line driver?
130  if(interface->extIntDriver == NULL)
131  {
132  //Read basic status register
133  value = ksz8081ReadPhyReg(interface, KSZ8081_BMSR);
134  //Retrieve current link state
135  linkState = (value & KSZ8081_BMSR_LINK_STATUS) ? TRUE : FALSE;
136 
137  //Link up event?
138  if(linkState && !interface->linkState)
139  {
140  //Set event flag
141  interface->phyEvent = TRUE;
142  //Notify the TCP/IP stack of the event
144  }
145  //Link down event?
146  else if(!linkState && interface->linkState)
147  {
148  //Set event flag
149  interface->phyEvent = TRUE;
150  //Notify the TCP/IP stack of the event
152  }
153  }
154 }
155 
156 
157 /**
158  * @brief Enable interrupts
159  * @param[in] interface Underlying network interface
160  **/
161 
163 {
164  //Enable PHY transceiver interrupts
165  if(interface->extIntDriver != NULL)
166  {
167  interface->extIntDriver->enableIrq();
168  }
169 }
170 
171 
172 /**
173  * @brief Disable interrupts
174  * @param[in] interface Underlying network interface
175  **/
176 
178 {
179  //Disable PHY transceiver interrupts
180  if(interface->extIntDriver != NULL)
181  {
182  interface->extIntDriver->disableIrq();
183  }
184 }
185 
186 
187 /**
188  * @brief KSZ8081 event handler
189  * @param[in] interface Underlying network interface
190  **/
191 
193 {
194  uint16_t value;
195 
196  //Read status register to acknowledge the interrupt
197  value = ksz8081ReadPhyReg(interface, KSZ8081_ICSR);
198 
199  //Link status change?
201  {
202  //Any link failure condition is latched in the BMSR register. Reading
203  //the register twice will always return the actual link status
204  value = ksz8081ReadPhyReg(interface, KSZ8081_BMSR);
205  value = ksz8081ReadPhyReg(interface, KSZ8081_BMSR);
206 
207  //Link is up?
209  {
210  //Read PHY control register
212 
213  //Check current operation mode
215  {
216  //10BASE-T half-duplex
218  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
219  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
220  break;
221  //10BASE-T full-duplex
223  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
224  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
225  break;
226  //100BASE-TX half-duplex
228  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
229  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
230  break;
231  //100BASE-TX full-duplex
233  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
234  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
235  break;
236  //Unknown operation mode
237  default:
238  //Debug message
239  TRACE_WARNING("Invalid operation mode!\r\n");
240  break;
241  }
242 
243  //Update link state
244  interface->linkState = TRUE;
245 
246  //Adjust MAC configuration parameters for proper operation
247  interface->nicDriver->updateMacConfig(interface);
248  }
249  else
250  {
251  //Update link state
252  interface->linkState = FALSE;
253  }
254 
255  //Process link state change event
256  nicNotifyLinkChange(interface);
257  }
258 }
259 
260 
261 /**
262  * @brief Write PHY register
263  * @param[in] interface Underlying network interface
264  * @param[in] address PHY register address
265  * @param[in] data Register value
266  **/
267 
268 void ksz8081WritePhyReg(NetInterface *interface, uint8_t address,
269  uint16_t data)
270 {
271  //Write the specified PHY register
272  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
273  interface->phyAddr, address, data);
274 }
275 
276 
277 /**
278  * @brief Read PHY register
279  * @param[in] interface Underlying network interface
280  * @param[in] address PHY register address
281  * @return Register value
282  **/
283 
284 uint16_t ksz8081ReadPhyReg(NetInterface *interface, uint8_t address)
285 {
286  //Read the specified PHY register
287  return interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
288  interface->phyAddr, address);
289 }
290 
291 
292 /**
293  * @brief Dump PHY registers for debugging purpose
294  * @param[in] interface Underlying network interface
295  **/
296 
298 {
299  uint8_t i;
300 
301  //Loop through PHY registers
302  for(i = 0; i < 32; i++)
303  {
304  //Display current PHY register
305  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
306  ksz8081ReadPhyReg(interface, i));
307  }
308 
309  //Terminate with a line feed
310  TRACE_DEBUG("\r\n");
311 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:525
#define KSZ8081_PHYCON1
int bool_t
Definition: compiler_port.h:49
#define KSZ8081_ICSR
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:119
#define KSZ8081_BMCR_AN_EN
#define KSZ8081_ICSR_LINK_DOWN_IE
void ksz8081DisableIrq(NetInterface *interface)
Disable interrupts.
KSZ8081 Ethernet PHY transceiver.
#define TRUE
Definition: os_port.h:50
PHY driver.
Definition: nic.h:214
#define KSZ8081_ANAR_10BT_FD
#define KSZ8081_PHYCON2_JABBER_EN
#define KSZ8081_PHYCON2
#define SMI_OPCODE_WRITE
Definition: nic.h:62
#define KSZ8081_ICSR_LINK_DOWN_IF
#define KSZ8081_BMSR_LINK_STATUS
#define FALSE
Definition: os_port.h:46
#define KSZ8081_ICSR_LINK_UP_IE
#define KSZ8081_BMSR
error_t
Error codes.
Definition: error.h:42
#define KSZ8081_ICSR_LINK_UP_IF
#define KSZ8081_PHYCON1_OP_MODE_10BT_HD
#define KSZ8081_PHYCON1_OP_MODE
#define NetInterface
Definition: net.h:36
void ksz8081Tick(NetInterface *interface)
KSZ8081 timer handler.
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:105
void ksz8081WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define KSZ8081_BMCR
OsEvent netEvent
Definition: net.c:77
#define SMI_OPCODE_READ
Definition: nic.h:63
#define TRACE_INFO(...)
Definition: debug.h:94
#define KSZ8081_ANAR_100BTX_HD
#define KSZ8081_PHYCON1_OP_MODE_10BT_FD
#define KSZ8081_PHY_ADDR
#define KSZ8081_ANAR
error_t ksz8081Init(NetInterface *interface)
KSZ8081 PHY transceiver initialization.
uint16_t ksz8081ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
#define TRACE_WARNING(...)
Definition: debug.h:84
#define TRACE_DEBUG(...)
Definition: debug.h:106
#define KSZ8081_PHYCON2_HP_MDIX
#define KSZ8081_PHYCON1_OP_MODE_100BTX_FD
#define KSZ8081_PHYCON2_RMII_REF_CLK_SEL
#define KSZ8081_ANAR_SELECTOR_DEFAULT
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:118
#define KSZ8081_ANAR_10BT_HD
void ksz8081EventHandler(NetInterface *interface)
KSZ8081 event handler.
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
const PhyDriver ksz8081PhyDriver
KSZ8081 Ethernet PHY driver.
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:106
#define KSZ8081_ANAR_100BTX_FD
void ksz8081DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
uint8_t value[]
Definition: dtls_misc.h:150
void ksz8081EnableIrq(NetInterface *interface)
Enable interrupts.
#define KSZ8081_PHYCON1_OP_MODE_100BTX_HD
TCP/IP stack core.
uint8_t data[]
Definition: dtls_misc.h:176
#define KSZ8081_BMCR_RESET
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.