ksz8081_driver.c
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1 /**
2  * @file ksz8081_driver.c
3  * @brief KSZ8081 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 //Switch to the appropriate trace level
30 #define TRACE_LEVEL NIC_TRACE_LEVEL
31 
32 //Dependencies
33 #include "core/net.h"
35 #include "debug.h"
36 
37 
38 /**
39  * @brief KSZ8081 Ethernet PHY driver
40  **/
41 
43 {
49 };
50 
51 
52 /**
53  * @brief KSZ8081 PHY transceiver initialization
54  * @param[in] interface Underlying network interface
55  * @return Error code
56  **/
57 
59 {
60  //Debug message
61  TRACE_INFO("Initializing KSZ8081...\r\n");
62 
63  //Initialize external interrupt line driver
64  if(interface->extIntDriver != NULL)
65  interface->extIntDriver->init();
66 
67  //Reset PHY transceiver
69  //Wait for the reset to complete
71 
72  //Dump PHY registers for debugging purpose
73  ksz8081DumpPhyReg(interface);
74 
75 #if (KSZ8081_50MHZ_CLOCK_MODE_SUPPORT == ENABLED)
76  //Select 50MHz clock mode
79 #endif
80 
81  //Restore default auto-negotiation advertisement parameters
84 
85  //Enable auto-negotiation
87 
88  //The PHY will generate interrupts when link status changes are detected
90 
91  //Force the TCP/IP stack to poll the link state at startup
92  interface->phyEvent = TRUE;
93  //Notify the TCP/IP stack of the event
95 
96  //Successful initialization
97  return NO_ERROR;
98 }
99 
100 
101 /**
102  * @brief KSZ8081 timer handler
103  * @param[in] interface Underlying network interface
104  **/
105 
106 void ksz8081Tick(NetInterface *interface)
107 {
108  uint16_t value;
109  bool_t linkState;
110 
111  //No external interrupt line driver?
112  if(interface->extIntDriver == NULL)
113  {
114  //Read basic status register
116  //Retrieve current link state
117  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
118 
119  //Link up event?
120  if(linkState && !interface->linkState)
121  {
122  //Set event flag
123  interface->phyEvent = TRUE;
124  //Notify the TCP/IP stack of the event
126  }
127  //Link down event?
128  else if(!linkState && interface->linkState)
129  {
130  //Set event flag
131  interface->phyEvent = TRUE;
132  //Notify the TCP/IP stack of the event
134  }
135  }
136 }
137 
138 
139 /**
140  * @brief Enable interrupts
141  * @param[in] interface Underlying network interface
142  **/
143 
145 {
146  //Enable PHY transceiver interrupts
147  if(interface->extIntDriver != NULL)
148  interface->extIntDriver->enableIrq();
149 }
150 
151 
152 /**
153  * @brief Disable interrupts
154  * @param[in] interface Underlying network interface
155  **/
156 
158 {
159  //Disable PHY transceiver interrupts
160  if(interface->extIntDriver != NULL)
161  interface->extIntDriver->disableIrq();
162 }
163 
164 
165 /**
166  * @brief KSZ8081 event handler
167  * @param[in] interface Underlying network interface
168  **/
169 
171 {
172  uint16_t value;
173 
174  //Read status register to acknowledge the interrupt
176 
177  //Link status change?
179  {
180  //Any link failure condition is latched in the BMSR register... Reading
181  //the register twice will always return the actual link status
184 
185  //Link is up?
186  if(value & BMSR_LINK_STATUS)
187  {
188  //Read PHY control register
190 
191  //Check current operation mode
192  switch(value & PHYCON1_OP_MODE_MASK)
193  {
194  //10BASE-T
196  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
197  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
198  break;
199  //10BASE-T full-duplex
201  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
202  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
203  break;
204  //100BASE-TX
206  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
207  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
208  break;
209  //100BASE-TX full-duplex
211  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
212  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
213  break;
214  //Unknown operation mode
215  default:
216  //Debug message
217  TRACE_WARNING("Invalid Duplex mode\r\n");
218  break;
219  }
220 
221  //Update link state
222  interface->linkState = TRUE;
223 
224  //Adjust MAC configuration parameters for proper operation
225  interface->nicDriver->updateMacConfig(interface);
226  }
227  else
228  {
229  //Update link state
230  interface->linkState = FALSE;
231  }
232 
233  //Process link state change event
234  nicNotifyLinkChange(interface);
235  }
236 }
237 
238 
239 /**
240  * @brief Write PHY register
241  * @param[in] interface Underlying network interface
242  * @param[in] address PHY register address
243  * @param[in] data Register value
244  **/
245 
246 void ksz8081WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
247 {
248  uint8_t phyAddr;
249 
250  //Get the address of the PHY transceiver
251  if(interface->phyAddr < 32)
252  phyAddr = interface->phyAddr;
253  else
254  phyAddr = KSZ8081_PHY_ADDR;
255 
256  //Write the specified PHY register
257  interface->nicDriver->writePhyReg(phyAddr, address, data);
258 }
259 
260 
261 /**
262  * @brief Read PHY register
263  * @param[in] interface Underlying network interface
264  * @param[in] address PHY register address
265  * @return Register value
266  **/
267 
268 uint16_t ksz8081ReadPhyReg(NetInterface *interface, uint8_t address)
269 {
270  uint8_t phyAddr;
271 
272  //Get the address of the PHY transceiver
273  if(interface->phyAddr < 32)
274  phyAddr = interface->phyAddr;
275  else
276  phyAddr = KSZ8081_PHY_ADDR;
277 
278  //Read the specified PHY register
279  return interface->nicDriver->readPhyReg(phyAddr, address);
280 }
281 
282 
283 /**
284  * @brief Dump PHY registers for debugging purpose
285  * @param[in] interface Underlying network interface
286  **/
287 
289 {
290  uint8_t i;
291 
292  //Loop through PHY registers
293  for(i = 0; i < 32; i++)
294  {
295  //Display current PHY register
296  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i, ksz8081ReadPhyReg(interface, i));
297  }
298 
299  //Terminate with a line feed
300  TRACE_DEBUG("\r\n");
301 }
KSZ8081 Ethernet PHY transceiver.
void ksz8081Tick(NetInterface *interface)
KSZ8081 timer handler.
#define PHYCON2_RMII_REF_CLK_SEL
void nicNotifyLinkChange(NetInterface *interface)
Process link state change event.
Definition: nic.c:298
#define ANAR_10BT_FD
void ksz8081WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define ANAR_SELECTOR0
TCP/IP stack core.
Debugging facilities.
#define KSZ8081_PHY_REG_PHYCON2
#define BMSR_LINK_STATUS
Definition: ar8031_driver.h:95
#define KSZ8081_PHY_REG_BMSR
#define PHYCON2_JABBER_EN
#define ICSR_LINK_UP_IF
#define KSZ8081_PHY_REG_PHYCON1
#define TRUE
Definition: os_port.h:48
PHY driver.
Definition: nic.h:196
#define PHYCON1_OP_MODE_10BT
#define BMCR_RESET
Definition: ar8031_driver.h:71
#define KSZ8081_PHY_REG_ANAR
void ksz8081EventHandler(NetInterface *interface)
KSZ8081 event handler.
uint16_t ksz8081ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
#define ICSR_LINK_UP_IE
#define ICSR_LINK_DOWN_IF
#define KSZ8081_PHY_REG_BMCR
#define TRACE_INFO(...)
Definition: debug.h:86
Success.
Definition: error.h:42
#define PHYCON1_OP_MODE_100BTX_FD
#define KSZ8081_PHY_REG_ICSR
Ipv6Addr address
#define ICSR_LINK_DOWN_IE
OsEvent netEvent
Definition: net.c:72
#define PHYCON2_HP_MDIX
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define PHYCON1_OP_MODE_MASK
error_t
Error codes.
Definition: error.h:40
#define TRACE_WARNING(...)
Definition: debug.h:78
#define ANAR_100BTX_FD
void ksz8081EnableIrq(NetInterface *interface)
Enable interrupts.
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
#define BMCR_AN_EN
uint8_t value[]
Definition: dtls_misc.h:141
#define PHYCON1_OP_MODE_10BT_FD
#define PHYCON1_OP_MODE_100BTX
void ksz8081DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
const PhyDriver ksz8081PhyDriver
KSZ8081 Ethernet PHY driver.
#define ANAR_10BT
Definition: dm9161_driver.h:92
#define ANAR_100BTX
Definition: dm9161_driver.h:90
#define FALSE
Definition: os_port.h:44
int bool_t
Definition: compiler_port.h:47
void ksz8081DisableIrq(NetInterface *interface)
Disable interrupts.
#define KSZ8081_PHY_ADDR
error_t ksz8081Init(NetInterface *interface)
KSZ8081 PHY transceiver initialization.
#define TRACE_DEBUG(...)
Definition: debug.h:98