ksz8721_driver.c
Go to the documentation of this file.
1 /**
2  * @file ksz8721_driver.c
3  * @brief KSZ8721 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief KSZ8721 Ethernet PHY driver
42  **/
43 
45 {
51  NULL,
52  NULL
53 };
54 
55 
56 /**
57  * @brief KSZ8721 PHY transceiver initialization
58  * @param[in] interface Underlying network interface
59  * @return Error code
60  **/
61 
63 {
64  //Debug message
65  TRACE_INFO("Initializing KSZ8721...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = KSZ8721_PHY_ADDR;
72  }
73 
74  //Initialize external interrupt line driver
75  if(interface->extIntDriver != NULL)
76  {
77  interface->extIntDriver->init();
78  }
79 
80  //Reset PHY transceiver
82 
83  //Wait for the reset to complete
85  {
86  }
87 
88  //Dump PHY registers for debugging purpose
89  ksz8721DumpPhyReg(interface);
90 
91  //The PHY will generate interrupts when link status changes are detected
94 
95  //Force the TCP/IP stack to poll the link state at startup
96  interface->phyEvent = TRUE;
97  //Notify the TCP/IP stack of the event
99 
100  //Successful initialization
101  return NO_ERROR;
102 }
103 
104 
105 /**
106  * @brief KSZ8721 timer handler
107  * @param[in] interface Underlying network interface
108  **/
109 
110 void ksz8721Tick(NetInterface *interface)
111 {
112  uint16_t value;
113  bool_t linkState;
114 
115  //No external interrupt line driver?
116  if(interface->extIntDriver == NULL)
117  {
118  //Read basic status register
119  value = ksz8721ReadPhyReg(interface, KSZ8721_BMSR);
120  //Retrieve current link state
121  linkState = (value & KSZ8721_BMSR_LINK_STATUS) ? TRUE : FALSE;
122 
123  //Link up event?
124  if(linkState && !interface->linkState)
125  {
126  //Set event flag
127  interface->phyEvent = TRUE;
128  //Notify the TCP/IP stack of the event
130  }
131  //Link down event?
132  else if(!linkState && interface->linkState)
133  {
134  //Set event flag
135  interface->phyEvent = TRUE;
136  //Notify the TCP/IP stack of the event
138  }
139  }
140 }
141 
142 
143 /**
144  * @brief Enable interrupts
145  * @param[in] interface Underlying network interface
146  **/
147 
149 {
150  //Enable PHY transceiver interrupts
151  if(interface->extIntDriver != NULL)
152  {
153  interface->extIntDriver->enableIrq();
154  }
155 }
156 
157 
158 /**
159  * @brief Disable interrupts
160  * @param[in] interface Underlying network interface
161  **/
162 
164 {
165  //Disable PHY transceiver interrupts
166  if(interface->extIntDriver != NULL)
167  {
168  interface->extIntDriver->disableIrq();
169  }
170 }
171 
172 
173 /**
174  * @brief KSZ8721 event handler
175  * @param[in] interface Underlying network interface
176  **/
177 
179 {
180  uint16_t value;
181 
182  //Read status register to acknowledge the interrupt
183  value = ksz8721ReadPhyReg(interface, KSZ8721_ICSR);
184 
185  //Link status change?
187  {
188  //Any link failure condition is latched in the BMSR register. Reading
189  //the register twice will always return the actual link status
190  value = ksz8721ReadPhyReg(interface, KSZ8721_BMSR);
191  value = ksz8721ReadPhyReg(interface, KSZ8721_BMSR);
192 
193  //Link is up?
195  {
196  //Read PHY control register
197  value = ksz8721ReadPhyReg(interface, KSZ8721_PHYCON);
198 
199  //Check current operation mode
200  switch(value & KSZ8721_PHYCON_OP_MODE)
201  {
202  //10BASE-T half-duplex
204  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
205  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
206  break;
207  //10BASE-T full-duplex
209  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
210  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
211  break;
212  //100BASE-TX half-duplex
214  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
215  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
216  break;
217  //100BASE-TX full-duplex
219  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
220  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
221  break;
222  //Unknown operation mode
223  default:
224  //Debug message
225  TRACE_WARNING("Invalid operation mode!\r\n");
226  break;
227  }
228 
229  //Update link state
230  interface->linkState = TRUE;
231 
232  //Adjust MAC configuration parameters for proper operation
233  interface->nicDriver->updateMacConfig(interface);
234  }
235  else
236  {
237  //Update link state
238  interface->linkState = FALSE;
239  }
240 
241  //Process link state change event
242  nicNotifyLinkChange(interface);
243  }
244 }
245 
246 
247 /**
248  * @brief Write PHY register
249  * @param[in] interface Underlying network interface
250  * @param[in] address PHY register address
251  * @param[in] data Register value
252  **/
253 
254 void ksz8721WritePhyReg(NetInterface *interface, uint8_t address,
255  uint16_t data)
256 {
257  //Write the specified PHY register
258  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
259  interface->phyAddr, address, data);
260 }
261 
262 
263 /**
264  * @brief Read PHY register
265  * @param[in] interface Underlying network interface
266  * @param[in] address PHY register address
267  * @return Register value
268  **/
269 
270 uint16_t ksz8721ReadPhyReg(NetInterface *interface, uint8_t address)
271 {
272  //Read the specified PHY register
273  return interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
274  interface->phyAddr, address);
275 }
276 
277 
278 /**
279  * @brief Dump PHY registers for debugging purpose
280  * @param[in] interface Underlying network interface
281  **/
282 
284 {
285  uint8_t i;
286 
287  //Loop through PHY registers
288  for(i = 0; i < 32; i++)
289  {
290  //Display current PHY register
291  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
292  ksz8721ReadPhyReg(interface, i));
293  }
294 
295  //Terminate with a line feed
296  TRACE_DEBUG("\r\n");
297 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:525
void ksz8721Tick(NetInterface *interface)
KSZ8721 timer handler.
int bool_t
Definition: compiler_port.h:49
#define KSZ8721_PHYCON_OP_MODE_10BT_HD
#define KSZ8721_BMCR_RESET
void ksz8721DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define KSZ8721_ICSR_LINK_DOWN_IE
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:119
#define TRUE
Definition: os_port.h:50
PHY driver.
Definition: nic.h:214
KSZ8721 Ethernet PHY transceiver.
#define KSZ8721_ICSR_LINK_UP_IF
#define SMI_OPCODE_WRITE
Definition: nic.h:62
#define FALSE
Definition: os_port.h:46
error_t ksz8721Init(NetInterface *interface)
KSZ8721 PHY transceiver initialization.
uint16_t ksz8721ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
error_t
Error codes.
Definition: error.h:42
#define KSZ8721_BMSR
#define KSZ8721_BMCR
#define KSZ8721_ICSR_LINK_UP_IE
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:105
#define KSZ8721_BMSR_LINK_STATUS
void ksz8721DisableIrq(NetInterface *interface)
Disable interrupts.
OsEvent netEvent
Definition: net.c:77
#define KSZ8721_PHYCON
#define SMI_OPCODE_READ
Definition: nic.h:63
#define TRACE_INFO(...)
Definition: debug.h:94
void ksz8721WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
const PhyDriver ksz8721PhyDriver
KSZ8721 Ethernet PHY driver.
#define TRACE_WARNING(...)
Definition: debug.h:84
#define TRACE_DEBUG(...)
Definition: debug.h:106
#define KSZ8721_PHYCON_OP_MODE_10BT_FD
void ksz8721EventHandler(NetInterface *interface)
KSZ8721 event handler.
void ksz8721EnableIrq(NetInterface *interface)
Enable interrupts.
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:118
#define KSZ8721_ICSR
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define KSZ8721_PHYCON_OP_MODE
#define KSZ8721_PHY_ADDR
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:106
uint8_t value[]
Definition: dtls_misc.h:150
#define KSZ8721_PHYCON_OP_MODE_100BTX_FD
#define KSZ8721_ICSR_LINK_DOWN_IF
TCP/IP stack core.
uint8_t data[]
Definition: dtls_misc.h:176
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.
#define KSZ8721_PHYCON_OP_MODE_100BTX_HD