ksz8794_driver.c
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1 /**
2  * @file ksz8794_driver.c
3  * @brief KSZ8794 4-port Ethernet switch
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
36 #include "core/ethernet_misc.h"
38 #include "debug.h"
39 
40 
41 /**
42  * @brief KSZ8794 Ethernet switch driver
43  **/
44 
46 {
54 };
55 
56 
57 /**
58  * @brief Tail tag rules (host to KSZ8794)
59  **/
60 
61 const uint8_t ksz8794IngressTailTag[4] =
62 {
63  0,
67 };
68 
69 
70 /**
71  * @brief KSZ8794 Ethernet switch initialization
72  * @param[in] interface Underlying network interface
73  * @return Error code
74  **/
75 
77 {
78  uint_t port;
79  uint8_t temp;
80 
81  //Debug message
82  TRACE_INFO("Initializing KSZ8794...\r\n");
83 
84  //SPI slave mode?
85  if(interface->spiDriver != NULL)
86  {
87  //Initialize SPI
88  interface->spiDriver->init();
89 
90  //Wait for the serial interface to be ready
91  do
92  {
93  //Read CHIP_ID0 register
94  temp = ksz8794ReadSwitchReg(interface, KSZ8794_CHIP_ID0);
95 
96  //The returned data is invalid until the serial interface is ready
97  } while(temp != KSZ8794_CHIP_ID0_FAMILY_ID_DEFAULT);
98 
99 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
100  //Tail tagging mode?
101  if(interface->port != 0)
102  {
103  //Enable tail tag feature
104  temp = ksz8794ReadSwitchReg(interface, KSZ8794_GLOBAL_CTRL10);
107 
108  //Loop through ports
110  {
111  //Disable packet transmission and switch address learning
112  temp = ksz8794ReadSwitchReg(interface, KSZ8794_PORTn_CTRL2(port));
117  }
118  }
119  else
120 #endif
121  {
122  //Disable tail tag feature
123  temp = ksz8794ReadSwitchReg(interface, KSZ8794_GLOBAL_CTRL10);
126 
127  //Loop through ports
129  {
130  //Enable transmission, reception and switch address learning
131  temp = ksz8794ReadSwitchReg(interface, KSZ8794_PORTn_CTRL2(port));
136  }
137  }
138 
139  //Dump switch registers for debugging purpose
140  ksz8794DumpSwitchReg(interface);
141  }
142  else
143  {
144  //Loop through ports
146  {
147  //Debug message
148  TRACE_DEBUG("Port %u:\r\n", port);
149  //Dump PHY registers for debugging purpose
150  ksz8794DumpPhyReg(interface, port);
151  }
152  }
153 
154  //Force the TCP/IP stack to poll the link state at startup
155  interface->phyEvent = TRUE;
156  //Notify the TCP/IP stack of the event
158 
159  //Successful initialization
160  return NO_ERROR;
161 }
162 
163 
164 /**
165  * @brief Get link state
166  * @param[in] interface Underlying network interface
167  * @param[in] port Port number
168  * @return Link state
169  **/
170 
172 {
173  uint16_t status;
174  bool_t linkState;
175 
176  //Check port number
177  if(port >= KSZ8794_PORT1 && port <= KSZ8794_PORT3)
178  {
179  //Get exclusive access
181 
182  //SPI slave mode?
183  if(interface->spiDriver != NULL)
184  {
185  //Read port status 2 register
186  status = ksz8794ReadSwitchReg(interface, KSZ8794_PORTn_STAT2(port));
187 
188  //Retrieve current link state
189  linkState = (status & KSZ8794_PORTn_STAT2_LINK_GOOD) ? TRUE : FALSE;
190  }
191  else
192  {
193  //Read status register
194  status = ksz8794ReadPhyReg(interface, port, KSZ8794_BMSR);
195 
196  //Retrieve current link state
197  linkState = (status & KSZ8794_BMSR_LINK_STATUS) ? TRUE : FALSE;
198  }
199 
200  //Release exclusive access
202  }
203  else
204  {
205  //The specified port number is not valid
206  linkState = FALSE;
207  }
208 
209  //Return link status
210  return linkState;
211 }
212 
213 
214 /**
215  * @brief KSZ8794 timer handler
216  * @param[in] interface Underlying network interface
217  **/
218 
219 void ksz8794Tick(NetInterface *interface)
220 {
221  uint_t port;
222  uint16_t status;
223  bool_t linkState;
224 
225 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
226  //Tail tagging mode?
227  if(interface->port != 0)
228  {
229  uint_t i;
230  NetInterface *virtualInterface;
231 
232  //SPI slave mode?
233  if(interface->spiDriver != NULL)
234  {
235  //Loop through network interfaces
236  for(i = 0; i < NET_INTERFACE_COUNT; i++)
237  {
238  //Point to the current interface
239  virtualInterface = &netInterface[i];
240 
241  //Check whether the current virtual interface is attached to the
242  //physical interface
243  if(virtualInterface == interface || virtualInterface->parent == interface)
244  {
245  //The tail tag is used to indicate the source/destination port
246  port = virtualInterface->port;
247 
248  //Valid port?
249  if(port >= KSZ8794_PORT1 && port <= KSZ8794_PORT3)
250  {
251  //Read port status 2 register
252  status = ksz8794ReadSwitchReg(interface,
254 
255  //Retrieve current link state
256  linkState = (status & KSZ8794_PORTn_STAT2_LINK_GOOD) ? TRUE : FALSE;
257 
258  //Link up or link down event?
259  if(linkState != virtualInterface->linkState)
260  {
261  //Set event flag
262  interface->phyEvent = TRUE;
263  //Notify the TCP/IP stack of the event
265  }
266  }
267  }
268  }
269  }
270  }
271  else
272 #endif
273  {
274  //Initialize link state
275  linkState = FALSE;
276 
277  //Loop through ports
279  {
280  //SPI slave mode?
281  if(interface->spiDriver != NULL)
282  {
283  //Read port status 2 register
284  status = ksz8794ReadSwitchReg(interface, KSZ8794_PORTn_STAT2(port));
285 
286  //Retrieve current link state
287  if(status & KSZ8794_PORTn_STAT2_LINK_GOOD)
288  linkState = TRUE;
289  }
290  else
291  {
292  //Read status register
293  status = ksz8794ReadPhyReg(interface, port, KSZ8794_BMSR);
294 
295  //Retrieve current link state
296  if(status & KSZ8794_BMSR_LINK_STATUS)
297  linkState = TRUE;
298  }
299  }
300 
301  //Link up or link down event?
302  if(linkState != interface->linkState)
303  {
304  //Set event flag
305  interface->phyEvent = TRUE;
306  //Notify the TCP/IP stack of the event
308  }
309  }
310 }
311 
312 
313 /**
314  * @brief Enable interrupts
315  * @param[in] interface Underlying network interface
316  **/
317 
319 {
320 }
321 
322 
323 /**
324  * @brief Disable interrupts
325  * @param[in] interface Underlying network interface
326  **/
327 
329 {
330 }
331 
332 
333 /**
334  * @brief KSZ8794 event handler
335  * @param[in] interface Underlying network interface
336  **/
337 
339 {
340  uint_t port;
341  uint16_t status;
342  bool_t linkState;
343 
344 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
345  //Tail tagging mode?
346  if(interface->port != 0)
347  {
348  uint_t i;
349  NetInterface *virtualInterface;
350 
351  //SPI slave mode?
352  if(interface->spiDriver != NULL)
353  {
354  //Loop through network interfaces
355  for(i = 0; i < NET_INTERFACE_COUNT; i++)
356  {
357  //Point to the current interface
358  virtualInterface = &netInterface[i];
359 
360  //Check whether the current virtual interface is attached to the
361  //physical interface
362  if(virtualInterface == interface ||
363  virtualInterface->parent == interface)
364  {
365  //The tail tag is used to indicate the source/destination port
366  port = virtualInterface->port;
367 
368  //Valid port?
369  if(port >= KSZ8794_PORT1 && port <= KSZ8794_PORT3)
370  {
371  //Read port status 2 register
372  status = ksz8794ReadSwitchReg(interface,
374 
375  //Retrieve current link state
376  linkState = (status & KSZ8794_PORTn_STAT2_LINK_GOOD) ? TRUE : FALSE;
377 
378  //Link up event?
379  if(linkState && !virtualInterface->linkState)
380  {
381  //Adjust MAC configuration parameters for proper operation
382  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
383  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
384  interface->nicDriver->updateMacConfig(interface);
385 
386  //Read port status 3 register
387  status = ksz8794ReadSwitchReg(interface,
389 
390  //Check current operation mode
391  switch(status & KSZ8794_PORTn_CTRL11_STAT3_OP_MODE)
392  {
393  //10BASE-T half-duplex
395  virtualInterface->linkSpeed = NIC_LINK_SPEED_10MBPS;
396  virtualInterface->duplexMode = NIC_HALF_DUPLEX_MODE;
397  break;
398  //10BASE-T full-duplex
400  virtualInterface->linkSpeed = NIC_LINK_SPEED_10MBPS;
401  virtualInterface->duplexMode = NIC_FULL_DUPLEX_MODE;
402  break;
403  //100BASE-TX half-duplex
405  virtualInterface->linkSpeed = NIC_LINK_SPEED_100MBPS;
406  virtualInterface->duplexMode = NIC_HALF_DUPLEX_MODE;
407  break;
408  //100BASE-TX full-duplex
410  virtualInterface->linkSpeed = NIC_LINK_SPEED_100MBPS;
411  virtualInterface->duplexMode = NIC_FULL_DUPLEX_MODE;
412  break;
413  //Unknown operation mode
414  default:
415  //Debug message
416  TRACE_WARNING("Invalid operation mode!\r\n");
417  break;
418  }
419 
420  //Update link state
421  virtualInterface->linkState = TRUE;
422 
423  //Process link state change event
424  nicNotifyLinkChange(virtualInterface);
425  }
426  //Link down event
427  else if(!linkState && virtualInterface->linkState)
428  {
429  //Update link state
430  virtualInterface->linkState = FALSE;
431 
432  //Process link state change event
433  nicNotifyLinkChange(virtualInterface);
434  }
435  }
436  }
437  }
438  }
439  }
440  else
441 #endif
442  {
443  //Initialize link state
444  linkState = FALSE;
445 
446  //Loop through ports
448  {
449  //SPI slave mode?
450  if(interface->spiDriver != NULL)
451  {
452  //Read port status 2 register
453  status = ksz8794ReadSwitchReg(interface, KSZ8794_PORTn_STAT2(port));
454 
455  //Retrieve current link state
456  if(status & KSZ8794_PORTn_STAT2_LINK_GOOD)
457  linkState = TRUE;
458  }
459  else
460  {
461  //Read status register
462  status = ksz8794ReadPhyReg(interface, port, KSZ8794_BMSR);
463 
464  //Retrieve current link state
465  if(status & KSZ8794_BMSR_LINK_STATUS)
466  linkState = TRUE;
467  }
468  }
469 
470  //Link up event?
471  if(linkState)
472  {
473  //Adjust MAC configuration parameters for proper operation
474  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
475  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
476  interface->nicDriver->updateMacConfig(interface);
477 
478  //Update link state
479  interface->linkState = TRUE;
480  }
481  else
482  {
483  //Update link state
484  interface->linkState = FALSE;
485  }
486 
487  //Process link state change event
488  nicNotifyLinkChange(interface);
489  }
490 }
491 
492 
493 /**
494  * @brief Add tail tag to Ethernet frame
495  * @param[in] interface Underlying network interface
496  * @param[in] buffer Multi-part buffer containing the payload
497  * @param[in,out] offset Offset to the first payload byte
498  * @param[in] port Switch port identifier
499  * @param[in,out] type Ethernet type
500  * @return Error code
501  **/
502 
504  size_t *offset, uint8_t port, uint16_t *type)
505 {
506 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
507  error_t error;
508  size_t length;
509  const uint8_t *tailTag;
510 
511  //Valid port?
512  if(port >= KSZ8794_PORT1 && port <= KSZ8794_PORT3)
513  {
514  //The one byte tail tagging is used to indicate the destination port
515  tailTag = &ksz8794IngressTailTag[port];
516 
517  //Retrieve the length of the frame
518  length = netBufferGetLength(buffer) - *offset;
519 
520  //The host controller should manually add padding to the packet before
521  //inserting the tail tag
522  error = ethPadFrame(buffer, &length);
523 
524  //Check status code
525  if(!error)
526  {
527  //The tail tag is inserted at the end of the packet, just before the CRC
528  error = netBufferAppend(buffer, tailTag, sizeof(uint8_t));
529  }
530  }
531  else
532  {
533  //Invalid port identifier
534  error = ERROR_WRONG_IDENTIFIER;
535  }
536 
537  //Return status code
538  return error;
539 #else
540  //Tail tagging mode is not implemented
541  return NO_ERROR;
542 #endif
543 }
544 
545 
546 /**
547  * @brief Decode tail tag from incoming Ethernet frame
548  * @param[in] interface Underlying network interface
549  * @param[in,out] frame Pointer to the received Ethernet frame
550  * @param[in,out] length Length of the frame, in bytes
551  * @param[out] port Switch port identifier
552  * @return Error code
553  **/
554 
555 error_t ksz8794UntagFrame(NetInterface *interface, uint8_t **frame,
556  size_t *length, uint8_t *port)
557 {
558 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
559  error_t error;
560  uint8_t *tailTag;
561 
562  //Valid Ethernet frame received?
563  if(*length >= (sizeof(EthHeader) + sizeof(uint8_t)))
564  {
565  //The tail tag is inserted at the end of the packet, just before the CRC
566  tailTag = *frame + *length - sizeof(uint8_t);
567 
568  //The one byte tail tagging is used to indicate the source port
569  *port = KSZ8794_TAIL_TAG_DECODE(*tailTag);
570 
571  //Strip tail tag from Ethernet frame
572  *length -= sizeof(uint8_t);
573 
574  //Successful processing
575  error = NO_ERROR;
576  }
577  else
578  {
579  //Drop the received frame
580  error = ERROR_INVALID_LENGTH;
581  }
582 
583  //Return status code
584  return error;
585 #else
586  //Tail tagging mode is not implemented
587  return NO_ERROR;
588 #endif
589 }
590 
591 
592 /**
593  * @brief Write PHY register
594  * @param[in] interface Underlying network interface
595  * @param[in] port Port number
596  * @param[in] address PHY register address
597  * @param[in] data Register value
598  **/
599 
600 void ksz8794WritePhyReg(NetInterface *interface, uint8_t port,
601  uint8_t address, uint16_t data)
602 {
603  //Write the specified PHY register
604  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE, port, address, data);
605 }
606 
607 
608 /**
609  * @brief Read PHY register
610  * @param[in] interface Underlying network interface
611  * @param[in] port Port number
612  * @param[in] address PHY register address
613  * @return Register value
614  **/
615 
616 uint16_t ksz8794ReadPhyReg(NetInterface *interface, uint8_t port,
617  uint8_t address)
618 {
619  //Read the specified PHY register
620  return interface->nicDriver->readPhyReg(SMI_OPCODE_READ, port, address);
621 }
622 
623 
624 /**
625  * @brief Dump PHY registers for debugging purpose
626  * @param[in] interface Underlying network interface
627  * @param[in] port Port number
628  **/
629 
630 void ksz8794DumpPhyReg(NetInterface *interface, uint8_t port)
631 {
632  uint8_t i;
633 
634  //Loop through PHY registers
635  for(i = 0; i < 32; i++)
636  {
637  //Display current PHY register
638  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
639  ksz8794ReadPhyReg(interface, port, i));
640  }
641 
642  //Terminate with a line feed
643  TRACE_DEBUG("\r\n");
644 }
645 
646 
647 /**
648  * @brief Write switch register
649  * @param[in] interface Underlying network interface
650  * @param[in] address Switch register address
651  * @param[in] data Register value
652  **/
653 
654 void ksz8794WriteSwitchReg(NetInterface *interface, uint16_t address,
655  uint8_t data)
656 {
657  uint16_t command;
658 
659  //SPI slave mode?
660  if(interface->spiDriver != NULL)
661  {
662  //Set up a write operation
663  command = KSZ8794_SPI_CMD_WRITE;
664  //Set register address
665  command |= (address << 1) & KSZ8794_SPI_CMD_ADDR;
666 
667  //Pull the CS pin low
668  interface->spiDriver->assertCs();
669 
670  //Write 16-bit command
671  interface->spiDriver->transfer(MSB(command));
672  interface->spiDriver->transfer(LSB(command));
673 
674  //Write data
675  interface->spiDriver->transfer(data);
676 
677  //Terminate the operation by raising the CS pin
678  interface->spiDriver->deassertCs();
679  }
680  else
681  {
682  //The MDC/MDIO interface does not have access to all the configuration
683  //registers. It can only access the standard MIIM registers
684  }
685 }
686 
687 
688 /**
689  * @brief Read switch register
690  * @param[in] interface Underlying network interface
691  * @param[in] address Switch register address
692  * @return Register value
693  **/
694 
695 uint8_t ksz8794ReadSwitchReg(NetInterface *interface, uint16_t address)
696 {
697  uint8_t data;
698  uint16_t command;
699 
700  //SPI slave mode?
701  if(interface->spiDriver != NULL)
702  {
703  //Set up a read operation
704  command = KSZ8794_SPI_CMD_READ;
705  //Set register address
706  command |= (address << 1) & KSZ8794_SPI_CMD_ADDR;
707 
708  //Pull the CS pin low
709  interface->spiDriver->assertCs();
710 
711  //Write 16-bit command
712  interface->spiDriver->transfer(MSB(command));
713  interface->spiDriver->transfer(LSB(command));
714 
715  //Read data
716  data = interface->spiDriver->transfer(0xFF);
717 
718  //Terminate the operation by raising the CS pin
719  interface->spiDriver->deassertCs();
720  }
721  else
722  {
723  //The MDC/MDIO interface does not have access to all the configuration
724  //registers. It can only access the standard MIIM registers
725  data = 0;
726  }
727 
728  //Return register value
729  return data;
730 }
731 
732 
733 /**
734  * @brief Dump switch registers for debugging purpose
735  * @param[in] interface Underlying network interface
736  **/
737 
739 {
740  uint16_t i;
741 
742  //Loop through switch registers
743  for(i = 0; i < 256; i++)
744  {
745  //Display current switch register
746  TRACE_DEBUG("0x%02" PRIX16 " (%02" PRIu16 ") : 0x%02" PRIX8 "\r\n",
747  i, i, ksz8794ReadSwitchReg(interface, i));
748  }
749 
750  //Terminate with a line feed
751  TRACE_DEBUG("\r\n");
752 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:525
uint8_t length
Definition: dtls_misc.h:149
int bool_t
Definition: compiler_port.h:49
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:119
error_t ksz8794Init(NetInterface *interface)
KSZ8794 Ethernet switch initialization.
#define KSZ8794_TAIL_TAG_ENCODE(port)
const PhyDriver ksz8794PhyDriver
KSZ8794 Ethernet switch driver.
#define KSZ8794_SPI_CMD_READ
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
#define TRUE
Definition: os_port.h:50
#define KSZ8794_PORTn_STAT2_LINK_GOOD
PHY driver.
Definition: nic.h:214
#define NET_INTERFACE_COUNT
Definition: net.h:109
error_t ksz8794UntagFrame(NetInterface *interface, uint8_t **frame, size_t *length, uint8_t *port)
Decode tail tag from incoming Ethernet frame.
#define KSZ8794_PORTn_CTRL2_LEARNING_DIS
uint16_t ksz8794ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
#define KSZ8794_CHIP_ID0
#define SMI_OPCODE_WRITE
Definition: nic.h:62
#define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE_100BTX_HD
#define KSZ8794_TAIL_TAG_DECODE(tag)
#define FALSE
Definition: os_port.h:46
NetInterface netInterface[NET_INTERFACE_COUNT]
Definition: net.c:79
char_t type
error_t
Error codes.
Definition: error.h:42
KSZ8794 4-port Ethernet switch.
#define KSZ8794_PORTn_CTRL2_RECEIVE_EN
#define KSZ8794_CHIP_ID0_FAMILY_ID_DEFAULT
void ksz8794DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
#define KSZ8794_PORT3
void ksz8794EventHandler(NetInterface *interface)
KSZ8794 event handler.
#define KSZ8794_BMSR
#define KSZ8794_GLOBAL_CTRL10
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:105
@ ERROR_INVALID_LENGTH
Definition: error.h:109
#define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE_10BT_HD
const uint8_t ksz8794IngressTailTag[4]
Tail tag rules (host to KSZ8794)
error_t ethPadFrame(NetBuffer *buffer, size_t *length)
Ethernet frame padding.
OsMutex netMutex
Definition: net.c:75
OsEvent netEvent
Definition: net.c:77
#define MSB(x)
Definition: os_port.h:58
#define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE_10BT_FD
#define SMI_OPCODE_READ
Definition: nic.h:63
#define TRACE_INFO(...)
Definition: debug.h:94
size_t netBufferGetLength(const NetBuffer *buffer)
Get the actual length of a multi-part buffer.
Definition: net_mem.c:297
#define LSB(x)
Definition: os_port.h:54
#define KSZ8794_SPI_CMD_WRITE
#define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE
void ksz8794DisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t port
Definition: dns_common.h:223
#define TRACE_WARNING(...)
Definition: debug.h:84
#define TRACE_DEBUG(...)
Definition: debug.h:106
error_t ksz8794TagFrame(NetInterface *interface, NetBuffer *buffer, size_t *offset, uint8_t port, uint16_t *type)
Add tail tag to Ethernet frame.
error_t netBufferAppend(NetBuffer *dest, const void *src, size_t length)
Append data a multi-part buffer.
Definition: net_mem.c:586
void osAcquireMutex(OsMutex *mutex)
Acquire ownership of the specified mutex object.
void osReleaseMutex(OsMutex *mutex)
Release ownership of the specified mutex object.
#define KSZ8794_BMSR_LINK_STATUS
void ksz8794WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:118
#define KSZ8794_PORTn_STAT2(port)
void ksz8794WriteSwitchReg(NetInterface *interface, uint16_t address, uint8_t data)
Write switch register.
#define KSZ8794_GLOBAL_CTRL10_TAIL_TAG_EN
@ ERROR_WRONG_IDENTIFIER
Definition: error.h:88
#define KSZ8794_PORTn_CTRL11_STAT3(port)
#define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE_100BTX_FD
#define KSZ8794_PORT1
bool_t ksz8794GetLinkState(NetInterface *interface, uint8_t port)
Get link state.
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
void ksz8794DumpSwitchReg(NetInterface *interface)
Dump switch registers for debugging purpose.
#define KSZ8794_PORTn_CTRL2_TRANSMIT_EN
#define KSZ8794_PORTn_CTRL2(port)
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:106
void ksz8794Tick(NetInterface *interface)
KSZ8794 timer handler.
void ksz8794EnableIrq(NetInterface *interface)
Enable interrupts.
unsigned int uint_t
Definition: compiler_port.h:45
__start_packed struct @110 EthHeader
Ethernet frame header.
TCP/IP stack core.
uint8_t data[]
Definition: dtls_misc.h:176
#define KSZ8794_SPI_CMD_ADDR
Helper functions for Ethernet.
uint8_t ksz8794ReadSwitchReg(NetInterface *interface, uint16_t address)
Read switch register.
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.