ksz8794_driver.h
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1 /**
2  * @file ksz8794_driver.h
3  * @brief KSZ8794 4-port Ethernet switch driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2026 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.6.0
29  **/
30 
31 #ifndef _KSZ8794_DRIVER_H
32 #define _KSZ8794_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Port identifiers
38 #define KSZ8794_PORT1 1
39 #define KSZ8794_PORT2 2
40 #define KSZ8794_PORT3 3
41 #define KSZ8794_PORT_RESERVED 4
42 #define KSZ8794_PORT4 5
43 
44 //Port masks
45 #define KSZ8794_PORT_MASK 0x17
46 #define KSZ8794_PORT1_MASK 0x01
47 #define KSZ8794_PORT2_MASK 0x02
48 #define KSZ8794_PORT3_MASK 0x04
49 #define KSZ8794_PORT4_MASK 0x10
50 
51 //SPI command byte
52 #define KSZ8794_SPI_CMD_WRITE 0x4000
53 #define KSZ8794_SPI_CMD_READ 0x6000
54 #define KSZ8794_SPI_CMD_ADDR 0x1FFE
55 
56 //Size of static and dynamic MAC tables
57 #define KSZ8794_STATIC_MAC_TABLE_SIZE 32
58 #define KSZ8794_DYNAMIC_MAC_TABLE_SIZE 1024
59 #define KSZ8794_VLAN_TABLE_SIZE 4096
60 
61 //Tail tag rules (host to KSZ8794)
62 #define KSZ8794_TAIL_TAG_NORMAL_ADDR_LOOKUP 0x80
63 #define KSZ8794_TAIL_TAG_PORT_SEL 0x40
64 #define KSZ8794_TAIL_TAG_DEST_QUEUE 0x30
65 #define KSZ8794_TAIL_TAG_DEST_PORT3 0x04
66 #define KSZ8794_TAIL_TAG_DEST_PORT2 0x02
67 #define KSZ8794_TAIL_TAG_DEST_PORT1 0x01
68 
69 //Tail tag rules (KSZ8794 to host)
70 #define KSZ8794_TAIL_TAG_SRC_PORT 0x03
71 
72 //KSZ8794 PHY registers
73 #define KSZ8794_BMCR 0x00
74 #define KSZ8794_BMSR 0x01
75 #define KSZ8794_PHYID1 0x02
76 #define KSZ8794_PHYID2 0x03
77 #define KSZ8794_ANAR 0x04
78 #define KSZ8794_ANLPAR 0x05
79 #define KSZ8794_LINKMD 0x1D
80 #define KSZ8794_PHYSCS 0x1F
81 
82 //KSZ8794 Switch registers
83 #define KSZ8794_CHIP_ID0 0x00
84 #define KSZ8794_CHIP_ID1 0x01
85 #define KSZ8794_GLOBAL_CTRL0 0x02
86 #define KSZ8794_GLOBAL_CTRL1 0x03
87 #define KSZ8794_GLOBAL_CTRL2 0x04
88 #define KSZ8794_GLOBAL_CTRL3 0x05
89 #define KSZ8794_GLOBAL_CTRL4 0x06
90 #define KSZ8794_GLOBAL_CTRL5 0x07
91 #define KSZ8794_GLOBAL_CTRL6_MIB_CTRL 0x08
92 #define KSZ8794_GLOBAL_CTRL7 0x09
93 #define KSZ8794_GLOBAL_CTRL8 0x0A
94 #define KSZ8794_GLOBAL_CTRL9 0x0B
95 #define KSZ8794_GLOBAL_CTRL10 0x0C
96 #define KSZ8794_GLOBAL_CTRL11 0x0D
97 #define KSZ8794_PD_MGMT_CTRL1 0x0E
98 #define KSZ8794_PD_MGMT_CTRL2 0x0F
99 #define KSZ8794_PORT1_CTRL0 0x10
100 #define KSZ8794_PORT1_CTRL1 0x11
101 #define KSZ8794_PORT1_CTRL2 0x12
102 #define KSZ8794_PORT1_CTRL3 0x13
103 #define KSZ8794_PORT1_CTRL4 0x14
104 #define KSZ8794_PORT1_CTRL5 0x15
105 #define KSZ8794_PORT1_CTRL7 0x17
106 #define KSZ8794_PORT1_STAT0 0x18
107 #define KSZ8794_PORT1_STAT1 0x19
108 #define KSZ8794_PORT1_PHY_CTRL8 0x1A
109 #define KSZ8794_PORT1_LINKMD 0x1B
110 #define KSZ8794_PORT1_CTRL9 0x1C
111 #define KSZ8794_PORT1_CTRL10 0x1D
112 #define KSZ8794_PORT1_STAT2 0x1E
113 #define KSZ8794_PORT1_CTRL11_STAT3 0x1F
114 #define KSZ8794_PORT2_CTRL0 0x20
115 #define KSZ8794_PORT2_CTRL1 0x21
116 #define KSZ8794_PORT2_CTRL2 0x22
117 #define KSZ8794_PORT2_CTRL3 0x23
118 #define KSZ8794_PORT2_CTRL4 0x24
119 #define KSZ8794_PORT2_CTRL5 0x25
120 #define KSZ8794_PORT2_CTRL7 0x27
121 #define KSZ8794_PORT2_STAT0 0x28
122 #define KSZ8794_PORT2_STAT1 0x29
123 #define KSZ8794_PORT2_PHY_CTRL8 0x2A
124 #define KSZ8794_PORT2_LINKMD 0x2B
125 #define KSZ8794_PORT2_CTRL9 0x2C
126 #define KSZ8794_PORT2_CTRL10 0x2D
127 #define KSZ8794_PORT2_STAT2 0x2E
128 #define KSZ8794_PORT2_CTRL11_STAT3 0x2F
129 #define KSZ8794_PORT3_CTRL0 0x30
130 #define KSZ8794_PORT3_CTRL1 0x31
131 #define KSZ8794_PORT3_CTRL2 0x32
132 #define KSZ8794_PORT3_CTRL3 0x33
133 #define KSZ8794_PORT3_CTRL4 0x34
134 #define KSZ8794_PORT3_CTRL5 0x35
135 #define KSZ8794_PORT3_CTRL7 0x37
136 #define KSZ8794_PORT3_STAT0 0x38
137 #define KSZ8794_PORT3_STAT1 0x39
138 #define KSZ8794_PORT3_PHY_CTRL8 0x3A
139 #define KSZ8794_PORT3_LINKMD 0x3B
140 #define KSZ8794_PORT3_CTRL9 0x3C
141 #define KSZ8794_PORT3_CTRL10 0x3D
142 #define KSZ8794_PORT3_STAT2 0x3E
143 #define KSZ8794_PORT3_CTRL11_STAT3 0x3F
144 #define KSZ8794_PORT4_CTRL0 0x50
145 #define KSZ8794_PORT4_CTRL1 0x51
146 #define KSZ8794_PORT4_CTRL2 0x52
147 #define KSZ8794_PORT4_CTRL3 0x53
148 #define KSZ8794_PORT4_CTRL4 0x54
149 #define KSZ8794_PORT4_CTRL5 0x55
150 #define KSZ8794_PORT4_IF_CTRL6 0x56
151 #define KSZ8794_MAC_ADDR0 0x68
152 #define KSZ8794_MAC_ADDR1 0x69
153 #define KSZ8794_MAC_ADDR2 0x6A
154 #define KSZ8794_MAC_ADDR3 0x6B
155 #define KSZ8794_MAC_ADDR4 0x6C
156 #define KSZ8794_MAC_ADDR5 0x6D
157 #define KSZ8794_INDIRECT_CTRL0 0x6E
158 #define KSZ8794_INDIRECT_CTRL1 0x6F
159 #define KSZ8794_INDIRECT_DATA8 0x70
160 #define KSZ8794_INDIRECT_DATA7 0x71
161 #define KSZ8794_INDIRECT_DATA6 0x72
162 #define KSZ8794_INDIRECT_DATA5 0x73
163 #define KSZ8794_INDIRECT_DATA4 0x74
164 #define KSZ8794_INDIRECT_DATA3 0x75
165 #define KSZ8794_INDIRECT_DATA2 0x76
166 #define KSZ8794_INDIRECT_DATA1 0x77
167 #define KSZ8794_INDIRECT_DATA0 0x78
168 #define KSZ8794_INT_STAT 0x7C
169 #define KSZ8794_INT_MASK 0x7D
170 #define KSZ8794_ACL_INT_STAT 0x7E
171 #define KSZ8794_ACL_INT_CTRL 0x7F
172 #define KSZ8794_GLOBAL_CTRL12 0x80
173 #define KSZ8794_GLOBAL_CTRL13 0x81
174 #define KSZ8794_GLOBAL_CTRL14 0x82
175 #define KSZ8794_GLOBAL_CTRL15 0x83
176 #define KSZ8794_GLOBAL_CTRL16 0x84
177 #define KSZ8794_GLOBAL_CTRL17 0x85
178 #define KSZ8794_GLOBAL_CTRL18 0x86
179 #define KSZ8794_GLOBAL_CTRL19 0x87
180 #define KSZ8794_TOS_PRIO_CTRL0 0x90
181 #define KSZ8794_TOS_PRIO_CTRL1 0x91
182 #define KSZ8794_TOS_PRIO_CTRL2 0x92
183 #define KSZ8794_TOS_PRIO_CTRL3 0x93
184 #define KSZ8794_TOS_PRIO_CTRL4 0x94
185 #define KSZ8794_TOS_PRIO_CTRL5 0x95
186 #define KSZ8794_TOS_PRIO_CTRL6 0x96
187 #define KSZ8794_TOS_PRIO_CTRL7 0x97
188 #define KSZ8794_TOS_PRIO_CTRL8 0x98
189 #define KSZ8794_TOS_PRIO_CTRL9 0x99
190 #define KSZ8794_TOS_PRIO_CTRL10 0x9A
191 #define KSZ8794_TOS_PRIO_CTRL11 0x9B
192 #define KSZ8794_TOS_PRIO_CTRL12 0x9C
193 #define KSZ8794_TOS_PRIO_CTRL13 0x9D
194 #define KSZ8794_TOS_PRIO_CTRL14 0x9E
195 #define KSZ8794_TOS_PRIO_CTRL15 0x9F
196 #define KSZ8794_INDIRECT_BYTE 0xA0
197 #define KSZ8794_GLOBAL_CTRL20 0xA3
198 #define KSZ8794_GLOBAL_CTRL21 0xA4
199 #define KSZ8794_PORT1_CTRL12 0xB0
200 #define KSZ8794_PORT1_CTRL13 0xB1
201 #define KSZ8794_PORT1_CTRL14 0xB2
202 #define KSZ8794_PORT1_CTRL15 0xB3
203 #define KSZ8794_PORT1_CTRL16 0xB4
204 #define KSZ8794_PORT1_CTRL17 0xB5
205 #define KSZ8794_PORT1_RATE_LIMIT_CTRL 0xB6
206 #define KSZ8794_PORT1_PRIO0_IG_LIMIT_CTRL1 0xB7
207 #define KSZ8794_PORT1_PRIO1_IG_LIMIT_CTRL2 0xB8
208 #define KSZ8794_PORT1_PRIO2_IG_LIMIT_CTRL3 0xB9
209 #define KSZ8794_PORT1_PRIO3_IG_LIMIT_CTRL4 0xBA
210 #define KSZ8794_PORT1_QUEUE0_EG_LIMIT_CTRL1 0xBB
211 #define KSZ8794_PORT1_QUEUE1_EG_LIMIT_CTRL2 0xBC
212 #define KSZ8794_PORT1_QUEUE2_EG_LIMIT_CTRL3 0xBD
213 #define KSZ8794_PORT1_QUEUE3_EG_LIMIT_CTRL4 0xBE
214 #define KSZ8794_TEST 0xBF
215 #define KSZ8794_PORT2_CTRL12 0xC0
216 #define KSZ8794_PORT2_CTRL13 0xC1
217 #define KSZ8794_PORT2_CTRL14 0xC2
218 #define KSZ8794_PORT2_CTRL15 0xC3
219 #define KSZ8794_PORT2_CTRL16 0xC4
220 #define KSZ8794_PORT2_CTRL17 0xC5
221 #define KSZ8794_PORT2_RATE_LIMIT_CTRL 0xC6
222 #define KSZ8794_PORT2_PRIO0_IG_LIMIT_CTRL1 0xC7
223 #define KSZ8794_PORT2_PRIO1_IG_LIMIT_CTRL2 0xC8
224 #define KSZ8794_PORT2_PRIO2_IG_LIMIT_CTRL3 0xC9
225 #define KSZ8794_PORT2_PRIO3_IG_LIMIT_CTRL4 0xCA
226 #define KSZ8794_PORT2_QUEUE0_EG_LIMIT_CTRL1 0xCB
227 #define KSZ8794_PORT2_QUEUE1_EG_LIMIT_CTRL2 0xCC
228 #define KSZ8794_PORT2_QUEUE2_EG_LIMIT_CTRL3 0xCD
229 #define KSZ8794_PORT2_QUEUE3_EG_LIMIT_CTRL4 0xCE
230 #define KSZ8794_PORT3_CTRL12 0xD0
231 #define KSZ8794_PORT3_CTRL13 0xD1
232 #define KSZ8794_PORT3_CTRL14 0xD2
233 #define KSZ8794_PORT3_CTRL15 0xD3
234 #define KSZ8794_PORT3_CTRL16 0xD4
235 #define KSZ8794_PORT3_CTRL17 0xD5
236 #define KSZ8794_PORT3_RATE_LIMIT_CTRL 0xD6
237 #define KSZ8794_PORT3_PRIO0_IG_LIMIT_CTRL1 0xD7
238 #define KSZ8794_PORT3_PRIO1_IG_LIMIT_CTRL2 0xD8
239 #define KSZ8794_PORT3_PRIO2_IG_LIMIT_CTRL3 0xD9
240 #define KSZ8794_PORT3_PRIO3_IG_LIMIT_CTRL4 0xDA
241 #define KSZ8794_PORT3_QUEUE0_EG_LIMIT_CTRL1 0xDB
242 #define KSZ8794_PORT3_QUEUE1_EG_LIMIT_CTRL2 0xDC
243 #define KSZ8794_PORT3_QUEUE2_EG_LIMIT_CTRL3 0xDD
244 #define KSZ8794_PORT3_QUEUE3_EG_LIMIT_CTRL4 0xDE
245 #define KSZ8794_TEST2 0xDF
246 #define KSZ8794_TEST3 0xEF
247 #define KSZ8794_PORT4_CTRL12 0xF0
248 #define KSZ8794_PORT4_CTRL13 0xF1
249 #define KSZ8794_PORT4_CTRL14 0xF2
250 #define KSZ8794_PORT4_CTRL15 0xF3
251 #define KSZ8794_PORT4_CTRL16 0xF4
252 #define KSZ8794_PORT4_CTRL17 0xF5
253 #define KSZ8794_PORT4_RATE_LIMIT_CTRL 0xF6
254 #define KSZ8794_PORT4_PRIO0_IG_LIMIT_CTRL1 0xF7
255 #define KSZ8794_PORT4_PRIO1_IG_LIMIT_CTRL2 0xF8
256 #define KSZ8794_PORT4_PRIO2_IG_LIMIT_CTRL3 0xF9
257 #define KSZ8794_PORT4_PRIO3_IG_LIMIT_CTRL4 0xFA
258 #define KSZ8794_PORT4_QUEUE0_EG_LIMIT_CTRL1 0xFB
259 #define KSZ8794_PORT4_QUEUE1_EG_LIMIT_CTRL2 0xFC
260 #define KSZ8794_PORT4_QUEUE2_EG_LIMIT_CTRL3 0xFD
261 #define KSZ8794_PORT4_QUEUE3_EG_LIMIT_CTRL4 0xFE
262 #define KSZ8794_TEST4 0xFF
263 
264 //KSZ8794 Switch register access macros
265 #define KSZ8794_PORTn_CTRL0(port) (0x00 + ((port) * 0x10))
266 #define KSZ8794_PORTn_CTRL1(port) (0x01 + ((port) * 0x10))
267 #define KSZ8794_PORTn_CTRL2(port) (0x02 + ((port) * 0x10))
268 #define KSZ8794_PORTn_CTRL3(port) (0x03 + ((port) * 0x10))
269 #define KSZ8794_PORTn_CTRL4(port) (0x04 + ((port) * 0x10))
270 #define KSZ8794_PORTn_CTRL5(port) (0x05 + ((port) * 0x10))
271 #define KSZ8794_PORTn_CTRL7(port) (0x07 + ((port) * 0x10))
272 #define KSZ8794_PORTn_STAT0(port) (0x08 + ((port) * 0x10))
273 #define KSZ8794_PORTn_STAT1(port) (0x09 + ((port) * 0x10))
274 #define KSZ8794_PORTn_PHY_CTRL8(port) (0x0A + ((port) * 0x10))
275 #define KSZ8794_PORTn_LINKMD(port) (0x0B + ((port) * 0x10))
276 #define KSZ8794_PORTn_CTRL9(port) (0x0C + ((port) * 0x10))
277 #define KSZ8794_PORTn_CTRL10(port) (0x0D + ((port) * 0x10))
278 #define KSZ8794_PORTn_STAT2(port) (0x0E + ((port) * 0x10))
279 #define KSZ8794_PORTn_CTRL11_STAT3(port) (0x0F + ((port) * 0x10))
280 #define KSZ8794_PORTn_CTRL12(port) (0xA0 + ((port) * 0x10))
281 #define KSZ8794_PORTn_CTRL13(port) (0xA1 + ((port) * 0x10))
282 #define KSZ8794_PORTn_CTRL14(port) (0xA2 + ((port) * 0x10))
283 #define KSZ8794_PORTn_CTRL15(port) (0xA3 + ((port) * 0x10))
284 #define KSZ8794_PORTn_CTRL16(port) (0xA4 + ((port) * 0x10))
285 #define KSZ8794_PORTn_CTRL17(port) (0xA5 + ((port) * 0x10))
286 #define KSZ8794_PORTn_RATE_LIMIT_CTRL(port) (0xA6 + ((port) * 0x10))
287 #define KSZ8794_PORTn_PRIO0_IG_LIMIT_CTRL1(port) (0xA7 + ((port) * 0x10))
288 #define KSZ8794_PORTn_PRIO1_IG_LIMIT_CTRL2(port) (0xA8 + ((port) * 0x10))
289 #define KSZ8794_PORTn_PRIO2_IG_LIMIT_CTRL3(port) (0xA9 + ((port) * 0x10))
290 #define KSZ8794_PORTn_PRIO3_IG_LIMIT_CTRL4(port) (0xAA + ((port) * 0x10))
291 #define KSZ8794_PORTn_QUEUE0_EG_LIMIT_CTRL1(port) (0xAB + ((port) * 0x10))
292 #define KSZ8794_PORTn_QUEUE1_EG_LIMIT_CTRL2(port) (0xAC + ((port) * 0x10))
293 #define KSZ8794_PORTn_QUEUE2_EG_LIMIT_CTRL3(port) (0xAD + ((port) * 0x10))
294 #define KSZ8794_PORTn_QUEUE3_EG_LIMIT_CTRL4(port) (0xAE + ((port) * 0x10))
295 
296 //Basic Control register
297 #define KSZ8794_BMCR_RESET 0x8000
298 #define KSZ8794_BMCR_LOOPBACK 0x4000
299 #define KSZ8794_BMCR_FORCE_100 0x2000
300 #define KSZ8794_BMCR_AN_EN 0x1000
301 #define KSZ8794_BMCR_POWER_DOWN 0x0800
302 #define KSZ8794_BMCR_ISOLATE 0x0400
303 #define KSZ8794_BMCR_RESTART_AN 0x0200
304 #define KSZ8794_BMCR_FORCE_FULL_DUPLEX 0x0100
305 #define KSZ8794_BMCR_HP_MDIX 0x0020
306 #define KSZ8794_BMCR_FORCE_MDI 0x0010
307 #define KSZ8794_BMCR_AUTO_MDIX_DIS 0x0008
308 #define KSZ8794_BMCR_FAR_END_FAULT_DIS 0x0004
309 #define KSZ8794_BMCR_TRANSMIT_DIS 0x0002
310 #define KSZ8794_BMCR_LED_DIS 0x0001
311 
312 //Basic Status register
313 #define KSZ8794_BMSR_100BT4 0x8000
314 #define KSZ8794_BMSR_100BTX_FD 0x4000
315 #define KSZ8794_BMSR_100BTX_HD 0x2000
316 #define KSZ8794_BMSR_10BT_FD 0x1000
317 #define KSZ8794_BMSR_10BT_HD 0x0800
318 #define KSZ8794_BMSR_AN_COMPLETE 0x0020
319 #define KSZ8794_BMSR_FAR_END_FAULT 0x0010
320 #define KSZ8794_BMSR_AN_CAPABLE 0x0008
321 #define KSZ8794_BMSR_LINK_STATUS 0x0004
322 #define KSZ8794_BMSR_EXTENDED_CAPABLE 0x0001
323 
324 //PHYID High register
325 #define KSZ8794_PHYID1_DEFAULT 0x0022
326 
327 //PHYID Low register
328 #define KSZ8794_PHYID2_DEFAULT 0x1550
329 
330 //Advertisement Ability register
331 #define KSZ8794_ANAR_PAUSE 0x0400
332 #define KSZ8794_ANAR_100BTX_FD 0x0100
333 #define KSZ8794_ANAR_100BTX_HD 0x0080
334 #define KSZ8794_ANAR_10BT_FD 0x0040
335 #define KSZ8794_ANAR_10BT_HD 0x0020
336 #define KSZ8794_ANAR_SELECTOR 0x001F
337 #define KSZ8794_ANAR_SELECTOR_DEFAULT 0x0001
338 
339 //Link Partner Ability register
340 #define KSZ8794_ANLPAR_PAUSE 0x0400
341 #define KSZ8794_ANLPAR_100BTX_FD 0x0100
342 #define KSZ8794_ANLPAR_100BTX_HD 0x0080
343 #define KSZ8794_ANLPAR_10BT_FD 0x0040
344 #define KSZ8794_ANLPAR_10BT_HD 0x0020
345 
346 //LinkMD Control/Status register
347 #define KSZ8794_LINKMD_TEST_EN 0x8000
348 #define KSZ8794_LINKMD_RESULT 0x6000
349 #define KSZ8794_LINKMD_RESULT_NORMAL 0x0000
350 #define KSZ8794_LINKMD_RESULT_OPEN 0x2000
351 #define KSZ8794_LINKMD_RESULT_SHORT 0x4000
352 #define KSZ8794_LINKMD_RESULT_FAIL 0x6000
353 #define KSZ8794_LINKMD_SHORT 0x1000
354 #define KSZ8794_LINKMD_FAULT_COUNT 0x01FF
355 
356 //PHY Special Control/Status register
357 #define KSZ8794_PHYSCS_OP_MODE 0x0700
358 #define KSZ8794_PHYSCS_OP_MODE_AN 0x0100
359 #define KSZ8794_PHYSCS_OP_MODE_10BT_HD 0x0200
360 #define KSZ8794_PHYSCS_OP_MODE_100BTX_HD 0x0300
361 #define KSZ8794_PHYSCS_OP_MODE_10BT_FD 0x0500
362 #define KSZ8794_PHYSCS_OP_MODE_100BTX_FD 0x0600
363 #define KSZ8794_PHYSCS_OP_MODE_ISOLATE 0x0700
364 #define KSZ8794_PHYSCS_POLRVS 0x0020
365 #define KSZ8794_PHYSCS_MDIX_STATUS 0x0010
366 #define KSZ8794_PHYSCS_FORCE_LINK 0x0008
367 #define KSZ8794_PHYSCS_PWRSAVE 0x0004
368 #define KSZ8794_PHYSCS_REMOTE_LOOPBACK 0x0002
369 
370 //Chip ID0 register
371 #define KSZ8794_CHIP_ID0_FAMILY_ID 0xFF
372 #define KSZ8794_CHIP_ID0_FAMILY_ID_DEFAULT 0x87
373 
374 //Chip ID1 / Start Switch register
375 #define KSZ8794_CHIP_ID1_CHIP_ID 0xF0
376 #define KSZ8794_CHIP_ID1_CHIP_ID_DEFAULT 0x60
377 #define KSZ8794_CHIP_ID1_REVISION_ID 0x0E
378 #define KSZ8794_CHIP_ID1_START_SWITCH 0x01
379 
380 //Global Control 0 register
381 #define KSZ8794_GLOBAL_CTRL0_NEW_BACK_OFF_EN 0x80
382 #define KSZ8794_GLOBAL_CTRL0_GLOBAL_SOFT_RESET_EN 0x40
383 #define KSZ8794_GLOBAL_CTRL0_FLUSH_DYNAMIC_MAC_TABLE 0x20
384 #define KSZ8794_GLOBAL_CTRL0_FLUSH_STATIC_MAC_TABLE 0x10
385 #define KSZ8794_GLOBAL_CTRL0_UNH_MODE 0x02
386 #define KSZ8794_GLOBAL_CTRL0_LINK_CHANGE_AGE 0x01
387 
388 //Global Control 1 register
389 #define KSZ8794_GLOBAL_CTRL1_2KB_PKT_SUPPORT 0x40
390 #define KSZ8794_GLOBAL_CTRL1_TX_FLOW_CTRL_DIS 0x20
391 #define KSZ8794_GLOBAL_CTRL1_RX_FLOW_CTRL_DIS 0x10
392 #define KSZ8794_GLOBAL_CTRL1_FRAME_LEN_CHECK_EN 0x08
393 #define KSZ8794_GLOBAL_CTRL1_AGING_EN 0x04
394 #define KSZ8794_GLOBAL_CTRL1_FAST_AGE_EN 0x02
395 #define KSZ8794_GLOBAL_CTRL1_AGGRESSIVE_BACK_OFF_EN 0x01
396 
397 //Global Control 2 register
398 #define KSZ8794_GLOBAL_CTRL2_UNI_VLAN_MISMATCH_DISCARD 0x80
399 #define KSZ8794_GLOBAL_CTRL2_MCAST_STORM_PROTECT_DIS 0x40
400 #define KSZ8794_GLOBAL_CTRL2_BACK_PRESSURE_MODE 0x20
401 #define KSZ8794_GLOBAL_CTRL2_FLOW_CTRL_FAIR_MODE 0x10
402 #define KSZ8794_GLOBAL_CTRL2_NO_EXCESSIVE_COL_DROP 0x08
403 #define KSZ8794_GLOBAL_CTRL2_MAX_PKT_SIZE_CHECK_DIS 0x02
404 
405 //Global Control 3 register
406 #define KSZ8794_GLOBAL_CTRL3_VLAN_EN 0x80
407 #define KSZ8794_GLOBAL_CTRL3_SW5_IGMP_SNOOP_EN 0x40
408 #define KSZ8794_GLOBAL_CTRL3_SNIFF_MODE_SEL 0x01
409 
410 //Global Control 4 register
411 #define KSZ8794_GLOBAL_CTRL4_SW4_BACK_PRESSURE_EN 0x80
412 #define KSZ8794_GLOBAL_CTRL4_SW4_HALF_DUPLEX_MODE 0x40
413 #define KSZ8794_GLOBAL_CTRL4_SW4_FLOW_CTRL_EN 0x20
414 #define KSZ8794_GLOBAL_CTRL4_SW4_SPEED 0x10
415 #define KSZ8794_GLOBAL_CTRL4_NULL_VID_REPLACEMENT 0x08
416 #define KSZ8794_GLOBAL_CTRL4_BCAST_STORM_PROTECT_RATE_MSB 0x07
417 
418 //Global Control 5 register
419 #define KSZ8794_GLOBAL_CTRL5_BCAST_STORM_PROTECT_RATE_LSB 0xFF
420 
421 //Global Control 6 MIB Control register
422 #define KSZ8794_GLOBAL_CTRL6_MIB_CTRL_FLUSH_COUNTER 0x80
423 #define KSZ8794_GLOBAL_CTRL6_MIB_CTRL_FREEZE_COUNTER 0x40
424 #define KSZ8794_GLOBAL_CTRL6_MIB_CTRL_CONTROL_EN 0x1F
425 #define KSZ8794_GLOBAL_CTRL6_MIB_CTRL_CONTROL_EN_PORT1 0x01
426 #define KSZ8794_GLOBAL_CTRL6_MIB_CTRL_CONTROL_EN_PORT2 0x02
427 #define KSZ8794_GLOBAL_CTRL6_MIB_CTRL_CONTROL_EN_PORT3 0x04
428 #define KSZ8794_GLOBAL_CTRL6_MIB_CTRL_CONTROL_EN_PORT4 0x10
429 
430 //Global Control 7 register
431 #define KSZ8794_GLOBAL_CTRL7_FACTORY_TESTING 0xFF
432 
433 //Global Control 8 register
434 #define KSZ8794_GLOBAL_CTRL8_FACTORY_TESTING 0xFF
435 
436 //Global Control 9 register
437 #define KSZ8794_GLOBAL_CTRL9_SW4_REFCLK_EDGE_SEL 0x40
438 #define KSZ8794_GLOBAL_CTRL9_SW4_REFCLK_EDGE_SEL_RISING 0x00
439 #define KSZ8794_GLOBAL_CTRL9_SW4_REFCLK_EDGE_SEL_FALLING 0x40
440 #define KSZ8794_GLOBAL_CTRL9_LED_MODE 0x30
441 #define KSZ8794_GLOBAL_CTRL9_LED_MODE_LED0_LNK_ACT_LED1_SPD 0x00
442 #define KSZ8794_GLOBAL_CTRL9_LED_MODE_LED0_LNK_LED1_ACT 0x10
443 #define KSZ8794_GLOBAL_CTRL9_LED_MODE_LED0_LNK_ACT_LED1_DPLX 0x20
444 #define KSZ8794_GLOBAL_CTRL9_LED_MODE_LED0_LNK_LED1_ACT_DPLX 0x30
445 #define KSZ8794_GLOBAL_CTRL9_REFCLKO_ENABLE 0x02
446 #define KSZ8794_GLOBAL_CTRL9_SPI_READ_CLK_EDGE_SEL 0x01
447 #define KSZ8794_GLOBAL_CTRL9_SPI_READ_CLK_EDGE_SEL_FALLING 0x00
448 #define KSZ8794_GLOBAL_CTRL9_SPI_READ_CLK_EDGE_SEL_RISING 0x01
449 
450 //Global Control 10 register
451 #define KSZ8794_GLOBAL_CTRL10_TAIL_TAG_EN 0x02
452 #define KSZ8794_GLOBAL_CTRL10_PASS_FLOW_CTRL_PKT 0x01
453 
454 //Global Control 11 register
455 #define KSZ8794_GLOBAL_CTRL11_FACTORY_TESTING 0xFF
456 
457 //Power-Down Management Control 1 register
458 #define KSZ8794_PD_MGMT_CTRL1_PLL_PWR_DOWN 0x20
459 #define KSZ8794_PD_MGMT_CTRL1_PWR_MGMT_MODE 0x18
460 #define KSZ8794_PD_MGMT_CTRL1_PWR_MGMT_MODE_NORMAL 0x00
461 #define KSZ8794_PD_MGMT_CTRL1_PWR_MGMT_MODE_ENERGY_DETECT 0x08
462 #define KSZ8794_PD_MGMT_CTRL1_PWR_MGMT_MODE_SOFT_PWR_DOWN 0x10
463 
464 //Power-Down Management Control 2 register
465 #define KSZ8794_PD_MGMT_CTRL2_GO_SLEEP_TIME 0xFF
466 
467 //Port N Control 0 register
468 #define KSZ8794_PORTn_CTRL0_BCAST_STORM_PROTECT_EN 0x80
469 #define KSZ8794_PORTn_CTRL0_DIFFSERV_PRIO_CLASS_EN 0x40
470 #define KSZ8794_PORTn_CTRL0_802_1P_PRIO_CLASS_EN 0x20
471 #define KSZ8794_PORTn_CTRL0_PORT_PRIO_CLASS_EN 0x18
472 #define KSZ8794_PORTn_CTRL0_TAG_INSERTION 0x04
473 #define KSZ8794_PORTn_CTRL0_TAG_REMOVAL 0x02
474 #define KSZ8794_PORTn_CTRL0_TWO_QUEUE_SPLIT_EN 0x01
475 
476 //Port N Control 1 register
477 #define KSZ8794_PORTn_CTRL1_SNIFFER_PORT 0x80
478 #define KSZ8794_PORTn_CTRL1_RECEIVE_SNIFF 0x40
479 #define KSZ8794_PORTn_CTRL1_TRANSMIT_SNIFF 0x20
480 #define KSZ8794_PORTn_CTRL1_PORT_VLAN_MEMBERSHIP 0x1F
481 
482 //Port N Control 2 register
483 #define KSZ8794_PORTn_CTRL2_USER_PRIO_CEILING 0x80
484 #define KSZ8794_PORTn_CTRL2_INGRESS_VLAN_FILT 0x40
485 #define KSZ8794_PORTn_CTRL2_DISCARD_NON_PVID_PKT 0x20
486 #define KSZ8794_PORTn_CTRL2_FORCE_FLOW_CTRL 0x10
487 #define KSZ8794_PORTn_CTRL2_BACK_PRESSURE_EN 0x08
488 #define KSZ8794_PORTn_CTRL2_TRANSMIT_EN 0x04
489 #define KSZ8794_PORTn_CTRL2_RECEIVE_EN 0x02
490 #define KSZ8794_PORTn_CTRL2_LEARNING_DIS 0x01
491 
492 //Port N Control 3 register
493 #define KSZ8794_PORTn_CTRL3_DEFAULT_USER_PRIO 0xE0
494 #define KSZ8794_PORTn_CTRL3_DEFAULT_CFI 0x10
495 #define KSZ8794_PORTn_CTRL3_DEFAULT_VID_MSB 0x0F
496 
497 //Port N Control 4 register
498 #define KSZ8794_PORTn_CTRL4_DEFAULT_VID_LSB 0xFF
499 
500 //Port N Control 5 register
501 #define KSZ8794_PORTn_CTRL5_ACL_EN 0x04
502 #define KSZ8794_PORTn_CTRL5_AUTH_MODE 0x03
503 
504 //Port 4 Interface Control 6 register
505 #define KSZ8794_PORT4_IF_CTRL6_RMII_CLK_SEL 0x80
506 #define KSZ8794_PORT4_IF_CTRL6_IS_1GBPS 0x40
507 #define KSZ8794_PORT4_IF_CTRL6_RGMII_ID_IG_EN 0x10
508 #define KSZ8794_PORT4_IF_CTRL6_RGMII_ID_EG_EN 0x08
509 #define KSZ8794_PORT4_IF_CTRL6_MII_MODE_SEL 0x04
510 #define KSZ8794_PORT4_IF_CTRL6_MII_MODE_SEL_PHY 0x00
511 #define KSZ8794_PORT4_IF_CTRL6_MII_MODE_SEL_MAC 0x04
512 #define KSZ8794_PORT4_IF_CTRL6_IF_MODE_SEL 0x03
513 #define KSZ8794_PORT4_IF_CTRL6_IF_MODE_SEL_MII 0x00
514 #define KSZ8794_PORT4_IF_CTRL6_IF_MODE_SEL_RMII 0x01
515 #define KSZ8794_PORT4_IF_CTRL6_IF_MODE_SEL_RGMII 0x03
516 
517 //Port N Control 7 register
518 #define KSZ8794_PORTn_CTRL7_ADV_FLOW_CTRL_CAP 0x30
519 #define KSZ8794_PORTn_CTRL7_ADV_FLOW_CTRL_CAP_NO 0x00
520 #define KSZ8794_PORTn_CTRL7_ADV_FLOW_CTRL_CAP_SYMMETRIC 0x10
521 #define KSZ8794_PORTn_CTRL7_ADV_FLOW_CTRL_CAP_ASYMMETRIC 0x20
522 #define KSZ8794_PORTn_CTRL7_ADV_FLOW_CTRL_CAP_BOTH 0x30
523 #define KSZ8794_PORTn_CTRL7_ADV_100BT_FD 0x08
524 #define KSZ8794_PORTn_CTRL7_ADV_100BT_HD 0x04
525 #define KSZ8794_PORTn_CTRL7_ADV_10BT_FD 0x02
526 #define KSZ8794_PORTn_CTRL7_ADV_10BT_HD 0x01
527 
528 //Port N Status 0 register
529 #define KSZ8794_PORTn_STAT0_LP_FLOW_CTRL_CAPABLE 0x30
530 #define KSZ8794_PORTn_STAT0_LP_100BTX_FD_CAPABLE 0x08
531 #define KSZ8794_PORTn_STAT0_LP_100BTX_HF_CAPABLE 0x04
532 #define KSZ8794_PORTn_STAT0_LP_10BT_FD_CAPABLE 0x02
533 #define KSZ8794_PORTn_STAT0_LP_10BT_HD_CAPABLE 0x01
534 
535 //Port N Status 1 register
536 #define KSZ8794_PORTn_STAT1_HP_MDIX 0x80
537 #define KSZ8794_PORTn_STAT1_FACTORY_TESTING 0x40
538 #define KSZ8794_PORTn_STAT1_POLRVS 0x20
539 #define KSZ8794_PORTn_STAT1_TX_FLOW_CTRL_EN 0x10
540 #define KSZ8794_PORTn_STAT1_RX_FLOW_CTRL_EN 0x08
541 #define KSZ8794_PORTn_STAT1_OP_SPEED 0x04
542 #define KSZ8794_PORTn_STAT1_OP_DUPLEX 0x02
543 
544 //Port N PHY Control 8 register
545 #define KSZ8794_PORTn_PHY_CTRL8_CDT_10M_SHORT 0x80
546 #define KSZ8794_PORTn_PHY_CTRL8_CDT_RESULT 0x60
547 #define KSZ8794_PORTn_PHY_CTRL8_CDT_EN 0x10
548 #define KSZ8794_PORTn_PHY_CTRL8_FORCE_LINK 0x08
549 #define KSZ8794_PORTn_PHY_CTRL8_PWRSAVE 0x04
550 #define KSZ8794_PORTn_PHY_CTRL8_REMOTE_LOOPBACK 0x02
551 #define KSZ8794_PORTn_PHY_CTRL8_VCT_FAULT_COUNT_MSB 0x01
552 
553 //Port N LinkMD Result register
554 #define KSZ8794_PORTn_LINKMD_VCT_FAULT_COUNT_LSB 0xFF
555 
556 //Port N Control 9 register
557 #define KSZ8794_PORTn_CTRL9_AN_DIS 0x80
558 #define KSZ8794_PORTn_CTRL9_FORCED_SPEED 0x40
559 #define KSZ8794_PORTn_CTRL9_FORCED_DUPLEX 0x20
560 
561 //Port N Control 10 register
562 #define KSZ8794_PORTn_CTRL10_LED_OFF 0x80
563 #define KSZ8794_PORTn_CTRL10_TX_DIS 0x40
564 #define KSZ8794_PORTn_CTRL10_RESTART_AN 0x20
565 #define KSZ8794_PORTn_CTRL10_POWER_DOWN 0x08
566 #define KSZ8794_PORTn_CTRL10_AUTO_MDIX_DIS 0x04
567 #define KSZ8794_PORTn_CTRL10_FORCED_MDI 0x02
568 #define KSZ8794_PORTn_CTRL10_MAC_LOOPBACK 0x01
569 
570 //Port N Status 2 register
571 #define KSZ8794_PORTn_STAT2_MDIX_STATUS 0x80
572 #define KSZ8794_PORTn_STAT2_AN_DONE 0x40
573 #define KSZ8794_PORTn_STAT2_LINK_GOOD 0x20
574 
575 //Port N Control 11 / Status 3 register
576 #define KSZ8794_PORTn_CTRL11_STAT3_PHY_LOOPBACK 0x80
577 #define KSZ8794_PORTn_CTRL11_STAT3_PHY_ISOLATE 0x20
578 #define KSZ8794_PORTn_CTRL11_STAT3_SOFT_RESET 0x10
579 #define KSZ8794_PORTn_CTRL11_STAT3_FORCE_LINK 0x08
580 #define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE 0x07
581 #define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE_AN 0x01
582 #define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE_10BT_HD 0x02
583 #define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE_100BTX_HD 0x03
584 #define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE_10BT_FD 0x05
585 #define KSZ8794_PORTn_CTRL11_STAT3_OP_MODE_100BTX_FD 0x06
586 
587 //MAC Address 0 register
588 #define KSZ8794_MAC_ADDR0_MACA_47_40 0xFF
589 
590 //MAC Address 1 register
591 #define KSZ8794_MAC_ADDR1_MACA_39_32 0xFF
592 
593 //MAC Address 2 register
594 #define KSZ8794_MAC_ADDR2_MACA_31_24 0xFF
595 
596 //MAC Address 3 register
597 #define KSZ8794_MAC_ADDR3_MACA_23_16 0xFF
598 
599 //MAC Address 4 register
600 #define KSZ8794_MAC_ADDR4_MACA_15_8 0xFF
601 
602 //MAC Address 5 register
603 #define KSZ8794_MAC_ADDR5_MACA_7_0 0xFF
604 
605 //Indirect Access Control 0 register
606 #define KSZ8794_INDIRECT_CTRL0_FUNC_SEL 0xE0
607 #define KSZ8794_INDIRECT_CTRL0_FUNC_SEL_INDIRECT_MODE 0x00
608 #define KSZ8794_INDIRECT_CTRL0_FUNC_SEL_EEE 0x20
609 #define KSZ8794_INDIRECT_CTRL0_FUNC_SEL_ACL 0x40
610 #define KSZ8794_INDIRECT_CTRL0_FUNC_SEL_PME 0x80
611 #define KSZ8794_INDIRECT_CTRL0_FUNC_SEL_LINKMD 0xA0
612 #define KSZ8794_INDIRECT_CTRL0_WRITE 0x00
613 #define KSZ8794_INDIRECT_CTRL0_READ 0x10
614 #define KSZ8794_INDIRECT_CTRL0_TABLE_SEL 0x0C
615 #define KSZ8794_INDIRECT_CTRL0_TABLE_SEL_STATIC_MAC 0x00
616 #define KSZ8794_INDIRECT_CTRL0_TABLE_SEL_VLAN 0x04
617 #define KSZ8794_INDIRECT_CTRL0_TABLE_SEL_DYNAMIC_MAC 0x08
618 #define KSZ8794_INDIRECT_CTRL0_TABLE_SEL_MIB_COUNTER 0x0C
619 #define KSZ8794_INDIRECT_CTRL0_ADDR_11_8 0x0F
620 #define KSZ8794_INDIRECT_CTRL0_ADDR_9_8 0x03
621 
622 //Indirect Access Control 1 register
623 #define KSZ8794_INDIRECT_CTRL1_ADDR_7_0 0xFF
624 
625 //Interrupt Status register
626 #define KSZ8794_INT_STAT_PME 0x10
627 #define KSZ8794_INT_STAT_PORT3 0x04
628 #define KSZ8794_INT_STAT_PORT2 0x02
629 #define KSZ8794_INT_STAT_PORT1 0x01
630 
631 //Interrupt Mask register
632 #define KSZ8794_INT_MASK_PME 0x10
633 #define KSZ8794_INT_MASK_PORT3 0x04
634 #define KSZ8794_INT_MASK_PORT2 0x02
635 #define KSZ8794_INT_MASK_PORT1 0x01
636 
637 //ACL Interrupt Status register
638 #define KSZ8794_ACL_INT_STAT_PORT4 0x08
639 #define KSZ8794_ACL_INT_STAT_PORT3 0x04
640 #define KSZ8794_ACL_INT_STAT_PORT2 0x02
641 #define KSZ8794_ACL_INT_STAT_PORT1 0x01
642 
643 //ACL Interrupt Control register
644 #define KSZ8794_ACL_INT_CTRL_PORT4 0x08
645 #define KSZ8794_ACL_INT_CTRL_PORT3 0x04
646 #define KSZ8794_ACL_INT_CTRL_PORT2 0x02
647 #define KSZ8794_ACL_INT_CTRL_PORT1 0x01
648 
649 //Global Control 12 register
650 #define KSZ8794_GLOBAL_CTRL12_TAG3 0xC0
651 #define KSZ8794_GLOBAL_CTRL12_TAG2 0x30
652 #define KSZ8794_GLOBAL_CTRL12_TAG1 0x0C
653 #define KSZ8794_GLOBAL_CTRL12_TAG0 0x03
654 
655 //Global Control 13 register
656 #define KSZ8794_GLOBAL_CTRL13_TAG7 0xC0
657 #define KSZ8794_GLOBAL_CTRL13_TAG6 0x30
658 #define KSZ8794_GLOBAL_CTRL13_TAG5 0x0C
659 #define KSZ8794_GLOBAL_CTRL13_TAG4 0x03
660 
661 //Global Control 14 register
662 #define KSZ8794_GLOBAL_CTRL14_PRI_2Q 0xC0
663 
664 //Global Control 15 register
665 #define KSZ8794_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD 0x20
666 #define KSZ8794_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP 0x1F
667 #define KSZ8794_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_FILT 0x00
668 #define KSZ8794_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_PORT1 0x01
669 #define KSZ8794_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_PORT2 0x02
670 #define KSZ8794_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_PORT3 0x04
671 #define KSZ8794_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_PORT4 0x10
672 #define KSZ8794_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_ALL 0x1F
673 
674 //Global Control 16 register
675 #define KSZ8794_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD 0x20
676 #define KSZ8794_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP 0x1F
677 #define KSZ8794_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_FILT 0x00
678 #define KSZ8794_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_PORT1 0x01
679 #define KSZ8794_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_PORT2 0x02
680 #define KSZ8794_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_PORT3 0x04
681 #define KSZ8794_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_PORT4 0x10
682 #define KSZ8794_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_ALL 0x17
683 
684 //Global Control 17 register
685 #define KSZ8794_GLOBAL_CTRL17_UNKNOWN_VID_FWD 0x20
686 #define KSZ8794_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP 0x1F
687 #define KSZ8794_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_FILT 0x00
688 #define KSZ8794_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_PORT1 0x01
689 #define KSZ8794_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_PORT2 0x02
690 #define KSZ8794_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_PORT3 0x04
691 #define KSZ8794_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_PORT4 0x10
692 #define KSZ8794_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_ALL 0x17
693 
694 //Global Control 18 register
695 #define KSZ8794_GLOBAL_CTRL18_SELF_ADDR_FILTER_EN 0x40
696 #define KSZ8794_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD 0x20
697 #define KSZ8794_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP 0x1F
698 #define KSZ8794_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_FILT 0x00
699 #define KSZ8794_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_PORT1 0x01
700 #define KSZ8794_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_PORT2 0x02
701 #define KSZ8794_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_PORT3 0x04
702 #define KSZ8794_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_PORT4 0x10
703 #define KSZ8794_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_ALL 0x17
704 
705 //Global Control 19 register
706 #define KSZ8794_GLOBAL_CTRL19_IG_RATE_LIMIT_PERIOD 0x30
707 #define KSZ8794_GLOBAL_CTRL19_IG_RATE_LIMIT_PERIOD_16MS 0x00
708 #define KSZ8794_GLOBAL_CTRL19_IG_RATE_LIMIT_PERIOD_64MS 0x10
709 #define KSZ8794_GLOBAL_CTRL19_IG_RATE_LIMIT_PERIOD_256MS 0x20
710 #define KSZ8794_GLOBAL_CTRL19_QUEUE_BASED_EG_RATE_LIMITE_EN 0x08
711 #define KSZ8794_GLOBAL_CTRL19_INSERT_SRC_PORT_PVID_TAG_EN 0x04
712 
713 //TOS Priority Control 0 register
714 #define KSZ8794_TOS_PRIO_CTRL0_DSCP_7_6 0xC0
715 #define KSZ8794_TOS_PRIO_CTRL0_DSCP_5_4 0x30
716 #define KSZ8794_TOS_PRIO_CTRL0_DSCP_3_2 0x0C
717 #define KSZ8794_TOS_PRIO_CTRL0_DSCP_1_0 0x03
718 
719 //TOS Priority Control 1 register
720 #define KSZ8794_TOS_PRIO_CTRL1_DSCP_15_14 0xC0
721 #define KSZ8794_TOS_PRIO_CTRL1_DSCP_13_12 0x30
722 #define KSZ8794_TOS_PRIO_CTRL1_DSCP_11_10 0x0C
723 #define KSZ8794_TOS_PRIO_CTRL1_DSCP_9_8 0x03
724 
725 //TOS Priority Control 2 register
726 #define KSZ8794_TOS_PRIO_CTRL2_DSCP_23_22 0xC0
727 #define KSZ8794_TOS_PRIO_CTRL2_DSCP_21_20 0x30
728 #define KSZ8794_TOS_PRIO_CTRL2_DSCP_19_18 0x0C
729 #define KSZ8794_TOS_PRIO_CTRL2_DSCP_17_16 0x03
730 
731 //TOS Priority Control 3 register
732 #define KSZ8794_TOS_PRIO_CTRL3_DSCP_31_30 0xC0
733 #define KSZ8794_TOS_PRIO_CTRL3_DSCP_29_28 0x30
734 #define KSZ8794_TOS_PRIO_CTRL3_DSCP_27_26 0x0C
735 #define KSZ8794_TOS_PRIO_CTRL3_DSCP_25_24 0x03
736 
737 //TOS Priority Control 4 register
738 #define KSZ8794_TOS_PRIO_CTRL4_DSCP_39_38 0xC0
739 #define KSZ8794_TOS_PRIO_CTRL4_DSCP_37_36 0x30
740 #define KSZ8794_TOS_PRIO_CTRL4_DSCP_35_34 0x0C
741 #define KSZ8794_TOS_PRIO_CTRL4_DSCP_33_32 0x03
742 
743 //TOS Priority Control 5 register
744 #define KSZ8794_TOS_PRIO_CTRL5_DSCP_47_46 0xC0
745 #define KSZ8794_TOS_PRIO_CTRL5_DSCP_45_44 0x30
746 #define KSZ8794_TOS_PRIO_CTRL5_DSCP_43_42 0x0C
747 #define KSZ8794_TOS_PRIO_CTRL5_DSCP_41_40 0x03
748 
749 //TOS Priority Control 6 register
750 #define KSZ8794_TOS_PRIO_CTRL6_DSCP_55_54 0xC0
751 #define KSZ8794_TOS_PRIO_CTRL6_DSCP_53_52 0x30
752 #define KSZ8794_TOS_PRIO_CTRL6_DSCP_51_50 0x0C
753 #define KSZ8794_TOS_PRIO_CTRL6_DSCP_49_48 0x03
754 
755 //TOS Priority Control 7 register
756 #define KSZ8794_TOS_PRIO_CTRL7_DSCP_63_62 0xC0
757 #define KSZ8794_TOS_PRIO_CTRL7_DSCP_61_60 0x30
758 #define KSZ8794_TOS_PRIO_CTRL7_DSCP_59_58 0x0C
759 #define KSZ8794_TOS_PRIO_CTRL7_DSCP_57_56 0x03
760 
761 //TOS Priority Control 8 register
762 #define KSZ8794_TOS_PRIO_CTRL8_DSCP_71_70 0xC0
763 #define KSZ8794_TOS_PRIO_CTRL8_DSCP_69_68 0x30
764 #define KSZ8794_TOS_PRIO_CTRL8_DSCP_67_66 0x0C
765 #define KSZ8794_TOS_PRIO_CTRL8_DSCP_65_64 0x03
766 
767 //TOS Priority Control 9 register
768 #define KSZ8794_TOS_PRIO_CTRL9_DSCP_79_78 0xC0
769 #define KSZ8794_TOS_PRIO_CTRL9_DSCP_77_76 0x30
770 #define KSZ8794_TOS_PRIO_CTRL9_DSCP_75_74 0x0C
771 #define KSZ8794_TOS_PRIO_CTRL9_DSCP_73_72 0x03
772 
773 //TOS Priority Control 10 register
774 #define KSZ8794_TOS_PRIO_CTRL10_DSCP_87_86 0xC0
775 #define KSZ8794_TOS_PRIO_CTRL10_DSCP_85_84 0x30
776 #define KSZ8794_TOS_PRIO_CTRL10_DSCP_83_82 0x0C
777 #define KSZ8794_TOS_PRIO_CTRL10_DSCP_81_80 0x03
778 
779 //TOS Priority Control 11 register
780 #define KSZ8794_TOS_PRIO_CTRL11_DSCP_95_94 0xC0
781 #define KSZ8794_TOS_PRIO_CTRL11_DSCP_93_92 0x30
782 #define KSZ8794_TOS_PRIO_CTRL11_DSCP_91_90 0x0C
783 #define KSZ8794_TOS_PRIO_CTRL11_DSCP_89_88 0x03
784 
785 //TOS Priority Control 12 register
786 #define KSZ8794_TOS_PRIO_CTRL12_DSCP_103_102 0xC0
787 #define KSZ8794_TOS_PRIO_CTRL12_DSCP_101_100 0x30
788 #define KSZ8794_TOS_PRIO_CTRL12_DSCP_99_98 0x0C
789 #define KSZ8794_TOS_PRIO_CTRL12_DSCP_97_96 0x03
790 
791 //TOS Priority Control 13 register
792 #define KSZ8794_TOS_PRIO_CTRL13_DSCP_111_110 0xC0
793 #define KSZ8794_TOS_PRIO_CTRL13_DSCP_109_108 0x30
794 #define KSZ8794_TOS_PRIO_CTRL13_DSCP_107_106 0x0C
795 #define KSZ8794_TOS_PRIO_CTRL13_DSCP_105_104 0x03
796 
797 //TOS Priority Control 14 register
798 #define KSZ8794_TOS_PRIO_CTRL14_DSCP_119_118 0xC0
799 #define KSZ8794_TOS_PRIO_CTRL14_DSCP_117_116 0x30
800 #define KSZ8794_TOS_PRIO_CTRL14_DSCP_115_114 0x0C
801 #define KSZ8794_TOS_PRIO_CTRL14_DSCP_113_112 0x03
802 
803 //TOS Priority Control 15 register
804 #define KSZ8794_TOS_PRIO_CTRL15_DSCP_127_126 0xC0
805 #define KSZ8794_TOS_PRIO_CTRL15_DSCP_125_124 0x30
806 #define KSZ8794_TOS_PRIO_CTRL15_DSCP_123_122 0x0C
807 #define KSZ8794_TOS_PRIO_CTRL15_DSCP_121_120 0x03
808 
809 //Global Control 20 register
810 #define KSZ8794_GLOBAL_CTRL20_HIGH_SPEED_DRIVE_STRENGTH 0x70
811 #define KSZ8794_GLOBAL_CTRL20_HIGH_SPEED_DRIVE_STRENGTH_2MA 0x00
812 #define KSZ8794_GLOBAL_CTRL20_HIGH_SPEED_DRIVE_STRENGTH_4MA 0x10
813 #define KSZ8794_GLOBAL_CTRL20_HIGH_SPEED_DRIVE_STRENGTH_8MA 0x20
814 #define KSZ8794_GLOBAL_CTRL20_HIGH_SPEED_DRIVE_STRENGTH_12MA 0x30
815 #define KSZ8794_GLOBAL_CTRL20_HIGH_SPEED_DRIVE_STRENGTH_16MA 0x40
816 #define KSZ8794_GLOBAL_CTRL20_HIGH_SPEED_DRIVE_STRENGTH_20MA 0x50
817 #define KSZ8794_GLOBAL_CTRL20_HIGH_SPEED_DRIVE_STRENGTH_24MA 0x60
818 #define KSZ8794_GLOBAL_CTRL20_HIGH_SPEED_DRIVE_STRENGTH_28MA 0x70
819 #define KSZ8794_GLOBAL_CTRL20_LOW_SPEED_DRIVE_STRENGTH 0x07
820 #define KSZ8794_GLOBAL_CTRL20_LOW_SPEED_DRIVE_STRENGTH_2MA 0x00
821 #define KSZ8794_GLOBAL_CTRL20_LOW_SPEED_DRIVE_STRENGTH_4MA 0x01
822 #define KSZ8794_GLOBAL_CTRL20_LOW_SPEED_DRIVE_STRENGTH_8MA 0x02
823 #define KSZ8794_GLOBAL_CTRL20_LOW_SPEED_DRIVE_STRENGTH_12MA 0x03
824 #define KSZ8794_GLOBAL_CTRL20_LOW_SPEED_DRIVE_STRENGTH_16MA 0x04
825 #define KSZ8794_GLOBAL_CTRL20_LOW_SPEED_DRIVE_STRENGTH_20MA 0x05
826 #define KSZ8794_GLOBAL_CTRL20_LOW_SPEED_DRIVE_STRENGTH_24MA 0x06
827 #define KSZ8794_GLOBAL_CTRL20_LOW_SPEED_DRIVE_STRENGTH_28MA 0x07
828 
829 //Global Control 21 register
830 #define KSZ8794_GLOBAL_CTRL21_MLD_SNOOP_OPT 0x08
831 #define KSZ8794_GLOBAL_CTRL21_MLD_SNOOP_EN 0x04
832 
833 //Port N Control 12 register
834 #define KSZ8794_PORTn_CTRL12_PASS_ALL_FRAMES 0x40
835 #define KSZ8794_PORTn_CTRL12_INSERT_SRC_PORT_PVID_H 0x08
836 #define KSZ8794_PORTn_CTRL12_INSERT_SRC_PORT_PVID_H2 0x04
837 #define KSZ8794_PORTn_CTRL12_INSERT_SRC_PORT_PVID_L2 0x02
838 #define KSZ8794_PORTn_CTRL12_INSERT_SRC_PORT_PVID_L 0x01
839 
840 //Port N Control 13 register
841 #define KSZ8794_PORTn_CTRL13_4_QUEUE_SPLIT_EN 0x02
842 #define KSZ8794_PORTn_CTRL13_DROPPING_TAG_EN 0x01
843 
844 //Port N Control 14 register
845 #define KSZ8794_PORTn_CTRL14_PORT_TX_QUEUE3_RATIO_EN 0x80
846 #define KSZ8794_PORTn_CTRL14_PORT_TX_QUEUE3_RATIO 0x7F
847 
848 //Port N Control 15 register
849 #define KSZ8794_PORTn_CTRL15_PORT_TX_QUEUE2_RATIO_EN 0x80
850 #define KSZ8794_PORTn_CTRL15_PORT_TX_QUEUE2_RATIO 0x7F
851 
852 //Port N Control 16 register
853 #define KSZ8794_PORTn_CTRL16_PORT_TX_QUEUE1_RATIO_EN 0x80
854 #define KSZ8794_PORTn_CTRL16_PORT_TX_QUEUE1_RATIO 0x7F
855 
856 //Port N Control 17 register
857 #define KSZ8794_PORTn_CTRL17_PORT_TX_QUEUE0_RATIO_EN 0x80
858 #define KSZ8794_PORTn_CTRL17_PORT_TX_QUEUE0_RATIO 0x7F
859 
860 //Port N Rate Limit Control register
861 #define KSZ8794_PORTn_RATE_LIMIT_CTRL_IG_LIMIT_PORT_PRIO_SEL 0x40
862 #define KSZ8794_PORTn_RATE_LIMIT_CTRL_IG_LIMIT_BIT_PKT_MODE_SEL 0x20
863 #define KSZ8794_PORTn_RATE_LIMIT_CTRL_IG_RATE_LIMIT_FLOW_CTRL_EN 0x10
864 #define KSZ8794_PORTn_RATE_LIMIT_CTRL_LIMIT_MODE 0x0C
865 #define KSZ8794_PORTn_RATE_LIMIT_CTRL_COUNT_IFG 0x02
866 #define KSZ8794_PORTn_RATE_LIMIT_CTRL_COUNT_PRE 0x01
867 
868 //C++ guard
869 #ifdef __cplusplus
870 extern "C" {
871 #endif
872 
873 //CC-RX, CodeWarrior or Win32 compiler?
874 #if defined(__CCRX__)
875  #pragma pack
876 #elif defined(__CWCC__) || defined(_WIN32)
877  #pragma pack(push, 1)
878 #endif
879 
880 
881 /**
882  * @brief Static MAC table entry (read operation)
883  **/
884 
885 typedef struct
886 {
887 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
888  uint8_t fid : 7; //0
889  uint8_t useFid : 1;
890  uint8_t reserved : 1; //1
891  uint8_t override : 1;
892  uint8_t valid : 1;
893  uint8_t forwardPorts : 5;
894 #else
895  uint8_t useFid : 1; //0
896  uint8_t fid : 7;
897  uint8_t forwardPorts : 5; //1
898  uint8_t valid : 1;
899  uint8_t override : 1;
900  uint8_t reserved : 1;
901 #endif
904 
905 
906 /**
907  * @brief Static MAC table entry (write operation)
908  **/
909 
910 typedef struct
911 {
912  uint8_t fid; //0
913 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
914  uint8_t useFid : 1; //1
915  uint8_t override : 1;
916  uint8_t valid : 1;
917  uint8_t forwardPorts : 5;
918 #else
919  uint8_t forwardPorts : 5; //1
920  uint8_t valid : 1;
921  uint8_t override : 1;
922  uint8_t useFid : 1;
923 #endif
926 
927 
928 /**
929  * @brief Dynamic MAC table entry
930  **/
931 
932 typedef struct
933 {
934 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
935  uint8_t macEmpty : 1; //0
936  uint8_t numValidEntriesH : 7;
937  uint8_t numValidEntriesL : 3; //1
938  uint8_t timestamp : 2;
939  uint8_t sourcePort : 3;
940  uint8_t dataNotReady : 1; //2
941  uint8_t fid : 7;
942 #else
943  uint8_t numValidEntriesH : 7; //0
944  uint8_t macEmpty : 1;
945  uint8_t sourcePort : 3; //1
946  uint8_t timestamp : 2;
947  uint8_t numValidEntriesL : 3;
948  uint8_t fid : 7; //2
949  uint8_t dataNotReady : 1;
950 #endif
953 
954 
955 /**
956  * @brief Set of VLAN entries
957  **/
958 
959 typedef struct
960 {
961 #if defined(_CPU_BIG_ENDIAN) && !defined(__IAR_SYSTEMS_ICC__)
962  uint8_t reserved3 : 3; //0
963  uint8_t entry3Valid : 1;
964  uint8_t entry3MembershipH : 4;
965  uint8_t entry3MembershipL : 1; //1
966  uint8_t entry3Fid : 7;
967  uint8_t reserved2 : 3; //2
968  uint8_t entry2Valid : 1;
969  uint8_t entry2MembershipH : 4;
970  uint8_t entry2MembershipL : 1; //3
971  uint8_t entry2Fid : 7;
972  uint8_t reserved1 : 3; //4
973  uint8_t entry1Valid : 1;
974  uint8_t entry1MembershipH : 4;
975  uint8_t entry1MembershipL : 1; //5
976  uint8_t entry1Fid : 7;
977  uint8_t reserved0 : 3; //6
978  uint8_t entry0Valid : 1;
979  uint8_t entry0MembershipH : 4;
980  uint8_t entry0MembershipL : 1; //7
981  uint8_t entry0Fid : 7;
982 #else
983  uint8_t entry3MembershipH : 4; //0
984  uint8_t entry3Valid : 1;
985  uint8_t reserved3 : 3;
986  uint8_t entry3Fid : 7; //1
987  uint8_t entry3MembershipL : 1;
988  uint8_t entry2MembershipH : 4; //2
989  uint8_t entry2Valid : 1;
990  uint8_t reserved2 : 3;
991  uint8_t entry2Fid : 7; //3
992  uint8_t entry2MembershipL : 1;
993  uint8_t entry1MembershipH : 4; //4
994  uint8_t entry1Valid : 1;
995  uint8_t reserved1 : 3;
996  uint8_t entry1Fid : 7; //5
997  uint8_t entry1MembershipL : 1;
998  uint8_t entry0MembershipH : 4; //6
999  uint8_t entry0Valid : 1;
1000  uint8_t reserved0 : 3;
1001  uint8_t entry0Fid : 7; //7
1002  uint8_t entry0MembershipL : 1;
1003 #endif
1005 
1006 
1007 //CC-RX, CodeWarrior or Win32 compiler?
1008 #if defined(__CCRX__)
1009  #pragma unpack
1010 #elif defined(__CWCC__) || defined(_WIN32)
1011  #pragma pack(pop)
1012 #endif
1013 
1014 //KSZ8794 Ethernet switch driver
1015 extern const SwitchDriver ksz8794SwitchDriver;
1016 
1017 //KSZ8794 related functions
1018 error_t ksz8794Init(NetInterface *interface);
1019 void ksz8794InitHook(NetInterface *interface);
1020 
1021 void ksz8794Tick(NetInterface *interface);
1022 
1023 void ksz8794EnableIrq(NetInterface *interface);
1024 void ksz8794DisableIrq(NetInterface *interface);
1025 
1026 void ksz8794EventHandler(NetInterface *interface);
1027 
1028 error_t ksz8794TagFrame(NetInterface *interface, NetBuffer *buffer,
1029  size_t *offset, NetTxAncillary *ancillary);
1030 
1031 error_t ksz8794UntagFrame(NetInterface *interface, uint8_t **frame,
1032  size_t *length, NetRxAncillary *ancillary);
1033 
1034 bool_t ksz8794GetLinkState(NetInterface *interface, uint8_t port);
1035 uint32_t ksz8794GetLinkSpeed(NetInterface *interface, uint8_t port);
1037 
1038 void ksz8794SetPortState(NetInterface *interface, uint8_t port,
1039  SwitchPortState state);
1040 
1042 
1043 void ksz8794SetAgingTime(NetInterface *interface, uint32_t agingTime);
1044 
1045 void ksz8794EnableIgmpSnooping(NetInterface *interface, bool_t enable);
1046 void ksz8794EnableMldSnooping(NetInterface *interface, bool_t enable);
1047 void ksz8794EnableRsvdMcastTable(NetInterface *interface, bool_t enable);
1048 
1050  const SwitchFdbEntry *entry);
1051 
1053  const SwitchFdbEntry *entry);
1054 
1056  SwitchFdbEntry *entry);
1057 
1058 void ksz8794FlushStaticFdbTable(NetInterface *interface);
1059 
1061  SwitchFdbEntry *entry);
1062 
1063 void ksz8794FlushDynamicFdbTable(NetInterface *interface, uint8_t port);
1064 
1066  bool_t enable, uint32_t forwardPorts);
1067 
1069  const SwitchVlanEntry *entry);
1070 
1071 void ksz8794WritePhyReg(NetInterface *interface, uint8_t port,
1072  uint8_t address, uint16_t data);
1073 
1074 uint16_t ksz8794ReadPhyReg(NetInterface *interface, uint8_t port,
1075  uint8_t address);
1076 
1077 void ksz8794DumpPhyReg(NetInterface *interface, uint8_t port);
1078 
1079 void ksz8794WriteSwitchReg(NetInterface *interface, uint16_t address,
1080  uint8_t data);
1081 
1082 uint8_t ksz8794ReadSwitchReg(NetInterface *interface, uint16_t address);
1083 
1084 void ksz8794DumpSwitchReg(NetInterface *interface);
1085 
1086 //C++ guard
1087 #ifdef __cplusplus
1088 }
1089 #endif
1090 
1091 #endif
uint8_t entry0Valid
uint8_t fid
uint8_t entry3Fid
uint8_t useFid
int bool_t
Definition: compiler_port.h:63
error_t ksz8794DeleteStaticFdbEntry(NetInterface *interface, const SwitchFdbEntry *entry)
Remove an entry from the static MAC table.
uint8_t ksz8794ReadSwitchReg(NetInterface *interface, uint16_t address)
Read switch register.
void ksz8794Tick(NetInterface *interface)
KSZ8794 timer handler.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
uint8_t timestamp
uint8_t data[]
Definition: ethernet.h:224
uint8_t reserved2
uint8_t entry3Valid
uint8_t entry1Fid
uint8_t useFid
uint8_t reserved1
uint8_t entry2Valid
void ksz8794DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
uint8_t fid
Dynamic MAC table entry.
error_t ksz8794GetStaticFdbEntry(NetInterface *interface, uint_t index, SwitchFdbEntry *entry)
Read an entry from the static MAC table.
MacAddr macAddr
error_t ksz8794GetDynamicFdbEntry(NetInterface *interface, uint_t index, SwitchFdbEntry *entry)
Read an entry from the dynamic MAC table.
error_t ksz8794TagFrame(NetInterface *interface, NetBuffer *buffer, size_t *offset, NetTxAncillary *ancillary)
Add tail tag to Ethernet frame.
uint16_t ksz8794ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
uint8_t entry3MembershipH
uint8_t reserved
Definition: igmp_common.h:250
uint8_t override
uint8_t sourcePort
void ksz8794FlushStaticFdbTable(NetInterface *interface)
Flush static MAC table.
MacAddr macAddr
void ksz8794SetAgingTime(NetInterface *interface, uint32_t agingTime)
Set aging time for dynamic filtering entries.
const SwitchDriver ksz8794SwitchDriver
KSZ8794 Ethernet switch driver.
void ksz8794WriteSwitchReg(NetInterface *interface, uint16_t address, uint8_t data)
Write switch register.
SwitchPortState ksz8794GetPortState(NetInterface *interface, uint8_t port)
Get port state.
VLAN entry.
Definition: nic.h:162
error_t
Error codes.
Definition: error.h:43
void ksz8794EnableMldSnooping(NetInterface *interface, bool_t enable)
Enable MLD snooping.
uint8_t entry2MembershipL
Static MAC table entry (read operation)
uint8_t forwardPorts
uint8_t reserved1
Definition: tcp.h:356
uint8_t numValidEntriesH
#define NetRxAncillary
Definition: net_misc.h:40
MacAddr macAddr
#define NetInterface
Definition: net.h:40
Static MAC table entry (write operation)
uint32_t ksz8794GetLinkSpeed(NetInterface *interface, uint8_t port)
Get link speed.
#define NetTxAncillary
Definition: net_misc.h:36
error_t ksz8794WriteVlanEntry(NetInterface *interface, const SwitchVlanEntry *entry)
Write VLAN entry.
error_t ksz8794UntagFrame(NetInterface *interface, uint8_t **frame, size_t *length, NetRxAncillary *ancillary)
Decode tail tag from incoming Ethernet frame.
SwitchPortState
Switch port state.
Definition: nic.h:134
uint8_t length
Definition: tcp.h:375
uint8_t fid
uint8_t reserved3
NicDuplexMode ksz8794GetDuplexMode(NetInterface *interface, uint8_t port)
Get duplex mode.
uint8_t dataNotReady
uint8_t valid
bool_t ksz8794GetLinkState(NetInterface *interface, uint8_t port)
Get link state.
uint8_t entry2MembershipH
uint8_t entry1MembershipH
MacAddr
Definition: ethernet.h:197
void ksz8794DumpSwitchReg(NetInterface *interface)
Dump switch registers for debugging purpose.
uint16_t port
Definition: dns_common.h:270
void ksz8794SetUnknownMcastFwdPorts(NetInterface *interface, bool_t enable, uint32_t forwardPorts)
Set forward ports for unknown multicast packets.
void ksz8794EnableRsvdMcastTable(NetInterface *interface, bool_t enable)
Enable reserved multicast table.
uint8_t reserved2
Definition: tcp.h:359
uint8_t numValidEntriesL
void ksz8794EventHandler(NetInterface *interface)
KSZ8794 event handler.
void ksz8794EnableIgmpSnooping(NetInterface *interface, bool_t enable)
Enable IGMP snooping.
uint8_t entry0MembershipH
Ethernet switch driver.
Definition: nic.h:325
uint8_t reserved
uint8_t entry0Fid
void ksz8794SetPortState(NetInterface *interface, uint8_t port, SwitchPortState state)
Set port state.
Ipv6Addr address[]
Definition: ipv6.h:345
uint8_t reserved0
NicDuplexMode
Duplex mode.
Definition: nic.h:122
Network interface controller abstraction layer.
uint8_t forwardPorts
uint8_t macEmpty
uint8_t entry2Fid
error_t ksz8794AddStaticFdbEntry(NetInterface *interface, const SwitchFdbEntry *entry)
Add a new entry to the static MAC table.
uint8_t entry1Valid
void ksz8794EnableIrq(NetInterface *interface)
Enable interrupts.
Set of VLAN entries.
void ksz8794FlushDynamicFdbTable(NetInterface *interface, uint8_t port)
Flush dynamic MAC table.
void ksz8794DisableIrq(NetInterface *interface)
Disable interrupts.
uint8_t entry0MembershipL
unsigned int uint_t
Definition: compiler_port.h:57
uint8_t valid
uint8_t entry3MembershipL
error_t ksz8794Init(NetInterface *interface)
KSZ8794 Ethernet switch initialization.
void ksz8794InitHook(NetInterface *interface)
KSZ8794 custom configuration.
void ksz8794WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
Forwarding database entry.
Definition: nic.h:149
uint8_t override
uint8_t entry1MembershipL