ksz8895_driver.h
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1 /**
2  * @file ksz8895_driver.h
3  * @brief KSZ8895 Ethernet switch
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _KSZ8895_DRIVER_H
30 #define _KSZ8895_DRIVER_H
31 
32 //Dependencies
33 #include "core/nic.h"
34 
35 //KSZ8895 ports
36 #define KSZ8895_PORT1 1
37 #define KSZ8895_PORT2 2
38 #define KSZ8895_PORT3 3
39 #define KSZ8895_PORT4 4
40 
41 //KSZ8895 registers
42 #define KSZ8895_PHY_REG_BMCR 0x00
43 #define KSZ8895_PHY_REG_BMSR 0x01
44 #define KSZ8895_PHY_REG_PHYIDR1 0x02
45 #define KSZ8895_PHY_REG_PHYIDR2 0x03
46 #define KSZ8895_PHY_REG_ANAR 0x04
47 #define KSZ8895_PHY_REG_ANLPAR 0x05
48 #define KSZ8895_PHY_REG_LINKMDCS 0x1D
49 #define KSZ8895_PHY_REG_PHYSCS 0x1F
50 
51 //BMCR register
52 #define BMCR_SOFT_RESET (1 << 15)
53 #define BMCR_LOOPBACK (1 << 14)
54 #define BMCR_FORCE_100 (1 << 13)
55 #define BMCR_AN_EN (1 << 12)
56 #define BMCR_POWER_DOWN (1 << 11)
57 #define BMCR_ISOLATE (1 << 10)
58 #define BMCR_RESTART_AN (1 << 9)
59 #define BMCR_FORCE_FULL_DUPLEX (1 << 8)
60 #define BMCR_COL_TEST (1 << 7)
61 #define BMCR_HP_MDIX (1 << 5)
62 #define BMCR_FORCE_MDI (1 << 4)
63 #define BMCR_DIS_AUTO_MDIX (1 << 3)
64 #define BMCR_DIS_FAR_END_FAULT (1 << 2)
65 #define BMCR_DIS_TRANSMIT (1 << 1)
66 #define BMCR_DIS_LED (1 << 0)
67 
68 //BMSR register
69 #define BMSR_100BT4 (1 << 15)
70 #define BMSR_100BTX_FD (1 << 14)
71 #define BMSR_100BTX (1 << 13)
72 #define BMSR_10BT_FD (1 << 12)
73 #define BMSR_10BT (1 << 11)
74 #define BMSR_NO_PREAMBLE (1 << 6)
75 #define BMSR_AN_COMPLETE (1 << 5)
76 #define BMSR_FAR_END_FAULT (1 << 4)
77 #define BMSR_AN_ABLE (1 << 3)
78 #define BMSR_LINK_STATUS (1 << 2)
79 #define BMSR_JABBER_TEST (1 << 1)
80 #define BMSR_EXTENDED_CAP (1 << 0)
81 
82 //ANAR register
83 #define ANAR_NEXT_PAGE (1 << 15)
84 #define ANAR_REMOTE_FAULT (1 << 13)
85 #define ANAR_PAUSE (1 << 10)
86 #define ANAR_100BTX_FD (1 << 8)
87 #define ANAR_100BTX (1 << 7)
88 #define ANAR_10BT_FD (1 << 6)
89 #define ANAR_10BT (1 << 5)
90 #define ANAR_SELECTOR4 (1 << 4)
91 #define ANAR_SELECTOR3 (1 << 3)
92 #define ANAR_SELECTOR2 (1 << 2)
93 #define ANAR_SELECTOR1 (1 << 1)
94 #define ANAR_SELECTOR0 (1 << 0)
95 
96 //ANLPAR register
97 #define ANLPAR_NEXT_PAGE (1 << 15)
98 #define ANLPAR_LP_ACK (1 << 14)
99 #define ANLPAR_REMOTE_FAULT (1 << 13)
100 #define ANLPAR_PAUSE (1 << 10)
101 #define ANLPAR_100BTX_FD (1 << 8)
102 #define ANLPAR_100BTX (1 << 7)
103 #define ANLPAR_10BT_FD (1 << 6)
104 #define ANLPAR_10BT (1 << 5)
105 
106 //LINKMDCS register
107 #define LINKMDCS_VCT_EN (1 << 15)
108 #define LINKMDCS_VCT_RESULT1 (1 << 14)
109 #define LINKMDCS_VCT_RESULT0 (1 << 13)
110 #define LINKMDCS_VCT_10M_SHORT (1 << 12)
111 #define LINKMDCS_VCT_FAULT_COUNT8 (1 << 8)
112 #define LINKMDCS_VCT_FAULT_COUNT7 (1 << 7)
113 #define LINKMDCS_VCT_FAULT_COUNT6 (1 << 6)
114 #define LINKMDCS_VCT_FAULT_COUNT5 (1 << 5)
115 #define LINKMDCS_VCT_FAULT_COUNT4 (1 << 4)
116 #define LINKMDCS_VCT_FAULT_COUNT3 (1 << 3)
117 #define LINKMDCS_VCT_FAULT_COUNT2 (1 << 2)
118 #define LINKMDCS_VCT_FAULT_COUNT1 (1 << 1)
119 #define LINKMDCS_VCT_FAULT_COUNT0 (1 << 0)
120 
121 //PHYSCS register
122 #define PHYSCS_OP_MODE2 (1 << 10)
123 #define PHYSCS_OP_MODE1 (1 << 9)
124 #define PHYSCS_OP_MODE0 (1 << 8)
125 #define PHYSCS_POLRVS (1 << 5)
126 #define PHYSCS_MDIX_STATUS (1 << 4)
127 #define PHYSCS_FORCE_LINK (1 << 3)
128 #define PHYSCS_PWRSAVE (1 << 2)
129 #define PHYSCS_REMOTE_LOOPBACK (1 << 1)
130 
131 //Operation mode indication
132 #define PHYSCS_OP_MODE_MASK (7 << 8)
133 #define PHYSCS_OP_MODE_AN (0 << 8)
134 #define PHYSCS_OP_MODE_10BT (1 << 8)
135 #define PHYSCS_OP_MODE_100BTX (2 << 8)
136 #define PHYSCS_OP_MODE_10BT_FD (5 << 8)
137 #define PHYSCS_OP_MODE_100BTX_FD (6 << 8)
138 
139 //C++ guard
140 #ifdef __cplusplus
141  extern "C" {
142 #endif
143 
144 //KSZ8895 Ethernet switch driver
145 extern const PhyDriver ksz8895PhyDriver;
146 
147 //KSZ8895 related functions
148 error_t ksz8895Init(NetInterface *interface);
149 
150 bool_t ksz8895GetLinkState(NetInterface *interface, uint8_t port);
151 
152 void ksz8895Tick(NetInterface *interface);
153 
154 void ksz8895EnableIrq(NetInterface *interface);
155 void ksz8895DisableIrq(NetInterface *interface);
156 
157 void ksz8895EventHandler(NetInterface *interface);
158 
159 void ksz8895WritePhyReg(NetInterface *interface,
160  uint8_t port, uint8_t address, uint16_t data);
161 
162 uint16_t ksz8895ReadPhyReg(NetInterface *interface,
163  uint8_t port, uint8_t address);
164 
165 void ksz8895DumpPhyReg(NetInterface *interface, uint8_t port);
166 
167 //C++ guard
168 #ifdef __cplusplus
169  }
170 #endif
171 
172 #endif
const PhyDriver ksz8895PhyDriver
KSZ8895 Ethernet switch driver.
void ksz8895DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
uint16_t ksz8895ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
void ksz8895WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
PHY driver.
Definition: nic.h:196
bool_t ksz8895GetLinkState(NetInterface *interface, uint8_t port)
Get link state.
void ksz8895EventHandler(NetInterface *interface)
KSZ8895 event handler.
Ipv6Addr address
error_t
Error codes.
Definition: error.h:40
void ksz8895EnableIrq(NetInterface *interface)
Enable interrupts.
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
uint16_t port
Definition: dns_common.h:221
error_t ksz8895Init(NetInterface *interface)
KSZ8895 Ethernet switch initialization.
int bool_t
Definition: compiler_port.h:47
void ksz8895DisableIrq(NetInterface *interface)
Disable interrupts.
Network interface controller abstraction layer.
void ksz8895Tick(NetInterface *interface)
KSZ8895 timer handler.