ksz9563_driver.c
Go to the documentation of this file.
1 /**
2  * @file ksz9563_driver.c
3  * @brief KSZ9563 Ethernet switch
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.2
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
36 #include "core/ethernet_misc.h"
38 #include "debug.h"
39 
40 
41 /**
42  * @brief KSZ9563 Ethernet switch driver
43  **/
44 
46 {
54 };
55 
56 
57 /**
58  * @brief Tail tag rules (host to KSZ9563)
59  **/
60 
61 const uint8_t ksz9563IngressTailTag[3] =
62 {
63  0,
66 };
67 
68 
69 /**
70  * @brief KSZ9563 Ethernet switch initialization
71  * @param[in] interface Underlying network interface
72  * @return Error code
73  **/
74 
76 {
77  uint_t port;
78  uint8_t temp;
79 
80  //Debug message
81  TRACE_INFO("Initializing KSZ9563...\r\n");
82 
83  //SPI slave mode?
84  if(interface->spiDriver != NULL)
85  {
86  //Initialize SPI
87  interface->spiDriver->init();
88 
89  //Wait for the serial interface to be ready
90  do
91  {
92  //Read CHIP_ID1 register
94 
95  //The returned data is invalid until the serial interface is ready
96  } while(temp != CHIP_ID1_CHIP_ID_MSB_DEFAULT);
97 
98  //Reset switch
100 
101  //Wait for the reset to complete
102  do
103  {
104  //Read switch operation register
106 
107  //The reset bit is self-clearing
108  } while((temp & SWITCH_OP_SOFT_RESET) != 0);
109 
110 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
111  //Tail tagging mode?
112  if(interface->port != 0)
113  {
114  //Enable tail tag feature
118 
119  //Loop through ports
121  {
122  //Disable packet transmission and switch address learning
127  }
128  }
129  else
130 #endif
131  {
132  //Disable tail tag feature
134  temp &= ~PORT_OP_CTRL0_TAIL_TAG_EN;
136 
137  //Loop through ports
139  {
140  //Enable transmission, reception and switch address learning
145  }
146  }
147 
148  //Add internal delay to ingress and egress RGMII clocks
152 
153  //Start switch operation
156  }
157 
158  //Loop through ports
160  {
161  //Debug message
162  TRACE_DEBUG("Port %u:\r\n", port);
163  //Dump PHY registers for debugging purpose
164  ksz9563DumpPhyReg(interface, port);
165  }
166 
167  //Force the TCP/IP stack to poll the link state at startup
168  interface->phyEvent = TRUE;
169  //Notify the TCP/IP stack of the event
171 
172  //Successful initialization
173  return NO_ERROR;
174 }
175 
176 
177 /**
178  * @brief Get link state
179  * @param[in] interface Underlying network interface
180  * @param[in] port Port number
181  * @return Link state
182  **/
183 
185 {
186  uint16_t value;
187  bool_t linkState;
188 
189  //Check port number
190  if(port >= KSZ9563_PORT1 && port <= KSZ9563_PORT2)
191  {
192  //Get exclusive access
194 
195  //Any link failure condition is latched in the BMSR register... Reading
196  //the register twice will always return the actual link status
199 
200  //Retrieve current link state
201  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
202 
203  //Release exclusive access
205  }
206  else
207  {
208  //The specified port number is not valid
209  linkState = FALSE;
210  }
211 
212  //Return link status
213  return linkState;
214 }
215 
216 
217 /**
218  * @brief KSZ9563 timer handler
219  * @param[in] interface Underlying network interface
220  **/
221 
222 void ksz9563Tick(NetInterface *interface)
223 {
224  uint_t port;
225  uint16_t value;
226  bool_t linkState;
227 
228 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
229  //Tail tagging mode?
230  if(interface->port != 0)
231  {
232  uint_t i;
233  NetInterface *virtualInterface;
234 
235  //Loop through network interfaces
236  for(i = 0; i < NET_INTERFACE_COUNT; i++)
237  {
238  //Point to the current interface
239  virtualInterface = &netInterface[i];
240 
241  //Check whether the current virtual interface is attached to the
242  //physical interface
243  if(virtualInterface == interface || virtualInterface->parent == interface)
244  {
245  //The tail tag is used to indicate the source/destination port
246  port = virtualInterface->port;
247 
248  //Valid port?
249  if(port >= KSZ9563_PORT1 && port <= KSZ9563_PORT2)
250  {
251  //Read status register
253 
254  //Retrieve current link state
255  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
256 
257  //Link up or link down event?
258  if(linkState != virtualInterface->linkState)
259  {
260  //Set event flag
261  interface->phyEvent = TRUE;
262  //Notify the TCP/IP stack of the event
264  }
265  }
266  }
267  }
268  }
269  else
270 #endif
271  {
272  //Initialize link state
273  linkState = FALSE;
274 
275  //Loop through ports
277  {
278  //Read status register
280 
281  //Retrieve current link state
282  if(value & BMSR_LINK_STATUS)
283  linkState = TRUE;
284  }
285 
286  //Link up or link down event?
287  if(linkState != interface->linkState)
288  {
289  //Set event flag
290  interface->phyEvent = TRUE;
291  //Notify the TCP/IP stack of the event
293  }
294  }
295 }
296 
297 
298 /**
299  * @brief Enable interrupts
300  * @param[in] interface Underlying network interface
301  **/
302 
304 {
305 }
306 
307 
308 /**
309  * @brief Disable interrupts
310  * @param[in] interface Underlying network interface
311  **/
312 
314 {
315 }
316 
317 
318 /**
319  * @brief KSZ9563 event handler
320  * @param[in] interface Underlying network interface
321  **/
322 
324 {
325  uint_t port;
326  uint16_t value;
327  bool_t linkState;
328 
329 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
330  //Tail tagging mode?
331  if(interface->port != 0)
332  {
333  uint_t i;
334  NetInterface *virtualInterface;
335 
336  //Loop through network interfaces
337  for(i = 0; i < NET_INTERFACE_COUNT; i++)
338  {
339  //Point to the current interface
340  virtualInterface = &netInterface[i];
341 
342  //Check whether the current virtual interface is attached to the
343  //physical interface
344  if(virtualInterface == interface ||
345  virtualInterface->parent == interface)
346  {
347  //The tail tag is used to indicate the source/destination port
348  port = virtualInterface->port;
349 
350  //Valid port?
351  if(port >= KSZ9563_PORT1 && port <= KSZ9563_PORT2)
352  {
353  //Any link failure condition is latched in the BMSR register... Reading
354  //the register twice will always return the actual link status
357 
358  //Retrieve current link state
359  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
360 
361  //Link up event?
362  if(linkState && !virtualInterface->linkState)
363  {
364  //Adjust MAC configuration parameters for proper operation
365  interface->linkSpeed = NIC_LINK_SPEED_1GBPS;
366  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
367  interface->nicDriver->updateMacConfig(interface);
368 
369  //Read PHY control register
371 
372  //Check current speed
374  {
375  //1000BASE-T
376  virtualInterface->linkSpeed = NIC_LINK_SPEED_1GBPS;
377  }
378  else if(value & PHYCON_SPEED_100BTX)
379  {
380  //100BASE-TX
381  virtualInterface->linkSpeed = NIC_LINK_SPEED_100MBPS;
382  }
383  else if(value & PHYCON_SPEED_10BT)
384  {
385  //10BASE-T
386  virtualInterface->linkSpeed = NIC_LINK_SPEED_10MBPS;
387  }
388  else
389  {
390  //Debug message
391  TRACE_WARNING("Invalid speed!\r\n");
392  }
393 
394  //Check current duplex mode
396  virtualInterface->duplexMode = NIC_FULL_DUPLEX_MODE;
397  else
398  virtualInterface->duplexMode = NIC_HALF_DUPLEX_MODE;
399 
400  //Update link state
401  virtualInterface->linkState = TRUE;
402 
403  //Process link state change event
404  nicNotifyLinkChange(virtualInterface);
405  }
406  //Link down event
407  else if(!linkState && virtualInterface->linkState)
408  {
409  //Update link state
410  virtualInterface->linkState = FALSE;
411 
412  //Process link state change event
413  nicNotifyLinkChange(virtualInterface);
414  }
415  }
416  }
417  }
418  }
419  else
420 #endif
421  {
422  //Initialize link state
423  linkState = FALSE;
424 
425  //Loop through ports
427  {
428  //Any link failure condition is latched in the BMSR register... Reading
429  //the register twice will always return the actual link status
432 
433  //Retrieve current link state
434  if(value & BMSR_LINK_STATUS)
435  linkState = TRUE;
436  }
437 
438  //Link up event?
439  if(linkState)
440  {
441  //Adjust MAC configuration parameters for proper operation
442  interface->linkSpeed = NIC_LINK_SPEED_1GBPS;
443  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
444  interface->nicDriver->updateMacConfig(interface);
445 
446  //Update link state
447  interface->linkState = TRUE;
448  }
449  else
450  {
451  //Update link state
452  interface->linkState = FALSE;
453  }
454 
455  //Process link state change event
456  nicNotifyLinkChange(interface);
457  }
458 }
459 
460 
461 /**
462  * @brief Add tail tag to Ethernet frame
463  * @param[in] interface Underlying network interface
464  * @param[in] buffer Multi-part buffer containing the payload
465  * @param[in,out] offset Offset to the first payload byte
466  * @param[in] port Switch port identifier
467  * @param[in,out] type Ethernet type
468  * @return Error code
469  **/
470 
472  size_t *offset, uint8_t port, uint16_t *type)
473 {
474 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
475  error_t error;
476  size_t length;
477  const uint8_t *tailTag;
478 
479  //Valid port?
480  if(port >= KSZ9563_PORT1 && port <= KSZ9563_PORT2)
481  {
482  //The one byte tail tagging is used to indicate the destination port
483  tailTag = &ksz9563IngressTailTag[port];
484 
485  //Retrieve the length of the frame
486  length = netBufferGetLength(buffer) - *offset;
487 
488  //The host controller should manually add padding to the packet before
489  //inserting the tail tag
490  error = ethPadFrame(buffer, &length);
491 
492  //Check status code
493  if(!error)
494  {
495  //The tail tag is inserted at the end of the packet, just before the CRC
496  error = netBufferAppend(buffer, tailTag, sizeof(uint8_t));
497  }
498  }
499  else
500  {
501  //Invalid port identifier
502  error = ERROR_WRONG_IDENTIFIER;
503  }
504 
505  //Return status code
506  return error;
507 #else
508  //Tail tagging mode is not implemented
509  return NO_ERROR;
510 #endif
511 }
512 
513 
514 /**
515  * @brief Decode tail tag from incoming Ethernet frame
516  * @param[in] interface Underlying network interface
517  * @param[in,out] frame Pointer to the received Ethernet frame
518  * @param[in,out] length Length of the frame, in bytes
519  * @param[out] port Switch port identifier
520  * @return Error code
521  **/
522 
523 error_t ksz9563UntagFrame(NetInterface *interface, uint8_t **frame,
524  size_t *length, uint8_t *port)
525 {
526 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
527  error_t error;
528  uint8_t *tailTag;
529 
530  //Valid Ethernet frame received?
531  if(*length >= (sizeof(EthHeader) + sizeof(uint8_t)))
532  {
533  //The tail tag is inserted at the end of the packet, just before the CRC
534  tailTag = *frame + *length - sizeof(uint8_t);
535 
536  //The one byte tail tagging is used to indicate the source port
537  *port = KSZ9563_TAIL_TAG_DECODE(*tailTag);
538 
539  //Strip tail tag from Ethernet frame
540  *length -= sizeof(uint8_t);
541 
542  //Successful processing
543  error = NO_ERROR;
544  }
545  else
546  {
547  //Drop the received frame
548  error = ERROR_INVALID_LENGTH;
549  }
550 
551  //Return status code
552  return error;
553 #else
554  //Tail tagging mode is not implemented
555  return NO_ERROR;
556 #endif
557 }
558 
559 
560 /**
561  * @brief Write PHY register
562  * @param[in] interface Underlying network interface
563  * @param[in] port Port number
564  * @param[in] address PHY register address
565  * @param[in] data Register value
566  **/
567 
568 void ksz9563WritePhyReg(NetInterface *interface, uint8_t port,
569  uint8_t address, uint16_t data)
570 {
571  uint32_t command;
572 
573  //SPI slave mode?
574  if(interface->spiDriver != NULL)
575  {
576  //Set up a write operation
577  command = KSZ9563_SPI_CMD_WRITE;
578  //Set register address
579  command |= KSZ9563_SW_REG_PORT_ETH_PHY(port, address) << 5;
580 
581  //Pull the CS pin low
582  interface->spiDriver->assertCs();
583 
584  //Write 32-bit command
585  interface->spiDriver->transfer((command >> 24) & 0xFF);
586  interface->spiDriver->transfer((command >> 16) & 0xFF);
587  interface->spiDriver->transfer((command >> 8) & 0xFF);
588  interface->spiDriver->transfer(command & 0xFF);
589 
590  //Write 16-bit data
591  interface->spiDriver->transfer(MSB(data));
592  interface->spiDriver->transfer(LSB(data));
593 
594  //Terminate the operation by raising the CS pin
595  interface->spiDriver->deassertCs();
596  }
597  else
598  {
599  //Write the specified PHY register
600  interface->nicDriver->writePhyReg(port, address, data);
601  }
602 }
603 
604 
605 /**
606  * @brief Read PHY register
607  * @param[in] interface Underlying network interface
608  * @param[in] port Port number
609  * @param[in] address PHY register address
610  * @return Register value
611  **/
612 
613 uint16_t ksz9563ReadPhyReg(NetInterface *interface, uint8_t port,
614  uint8_t address)
615 {
616  uint16_t data;
617  uint32_t command;
618 
619  //SPI slave mode?
620  if(interface->spiDriver != NULL)
621  {
622  //Set up a read operation
623  command = KSZ9563_SPI_CMD_READ;
624  //Set register address
625  command |= KSZ9563_SW_REG_PORT_ETH_PHY(port, address) << 5;
626 
627  //Pull the CS pin low
628  interface->spiDriver->assertCs();
629 
630  //Write 32-bit command
631  interface->spiDriver->transfer((command >> 24) & 0xFF);
632  interface->spiDriver->transfer((command >> 16) & 0xFF);
633  interface->spiDriver->transfer((command >> 8) & 0xFF);
634  interface->spiDriver->transfer(command & 0xFF);
635 
636  //Read 16-bit data
637  data = interface->spiDriver->transfer(0xFF) << 8;
638  data |= interface->spiDriver->transfer(0xFF);
639 
640  //Terminate the operation by raising the CS pin
641  interface->spiDriver->deassertCs();
642  }
643  else
644  {
645  //Read the specified PHY register
646  data = interface->nicDriver->readPhyReg(port, address);
647  }
648 
649  //Return register value
650  return data;
651 }
652 
653 
654 /**
655  * @brief Dump PHY registers for debugging purpose
656  * @param[in] interface Underlying network interface
657  * @param[in] port Port number
658  **/
659 
660 void ksz9563DumpPhyReg(NetInterface *interface, uint8_t port)
661 {
662  uint8_t i;
663 
664  //Loop through PHY registers
665  for(i = 0; i < 32; i++)
666  {
667  //Display current PHY register
668  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
669  ksz9563ReadPhyReg(interface, port, i));
670  }
671 
672  //Terminate with a line feed
673  TRACE_DEBUG("\r\n");
674 }
675 
676 
677 /**
678  * @brief Write switch register
679  * @param[in] interface Underlying network interface
680  * @param[in] address Switch register address
681  * @param[in] data Register value
682  **/
683 
684 void ksz9563WriteSwitchReg(NetInterface *interface, uint16_t address,
685  uint8_t data)
686 {
687  uint32_t command;
688 
689  //SPI slave mode?
690  if(interface->spiDriver != NULL)
691  {
692  //Set up a write operation
693  command = KSZ9563_SPI_CMD_WRITE;
694  //Set register address
695  command |= (address << 5) & KSZ9563_SPI_CMD_ADDR;
696 
697  //Pull the CS pin low
698  interface->spiDriver->assertCs();
699 
700  //Write 32-bit command
701  interface->spiDriver->transfer((command >> 24) & 0xFF);
702  interface->spiDriver->transfer((command >> 16) & 0xFF);
703  interface->spiDriver->transfer((command >> 8) & 0xFF);
704  interface->spiDriver->transfer(command & 0xFF);
705 
706  //Write data
707  interface->spiDriver->transfer(data);
708 
709  //Terminate the operation by raising the CS pin
710  interface->spiDriver->deassertCs();
711  }
712  else
713  {
714  //The MDC/MDIO interface does not have access to all the configuration
715  //registers. It can only access the standard MIIM registers
716  }
717 }
718 
719 
720 /**
721  * @brief Read switch register
722  * @param[in] interface Underlying network interface
723  * @param[in] address Switch register address
724  * @return Register value
725  **/
726 
727 uint8_t ksz9563ReadSwitchReg(NetInterface *interface, uint16_t address)
728 {
729  uint8_t data;
730  uint32_t command;
731 
732  //SPI slave mode?
733  if(interface->spiDriver != NULL)
734  {
735  //Set up a read operation
736  command = KSZ9563_SPI_CMD_READ;
737  //Set register address
738  command |= (address << 5) & KSZ9563_SPI_CMD_ADDR;
739 
740  //Pull the CS pin low
741  interface->spiDriver->assertCs();
742 
743  //Write 32-bit command
744  interface->spiDriver->transfer((command >> 24) & 0xFF);
745  interface->spiDriver->transfer((command >> 16) & 0xFF);
746  interface->spiDriver->transfer((command >> 8) & 0xFF);
747  interface->spiDriver->transfer(command & 0xFF);
748 
749  //Read data
750  data = interface->spiDriver->transfer(0xFF);
751 
752  //Terminate the operation by raising the CS pin
753  interface->spiDriver->deassertCs();
754  }
755  else
756  {
757  //The MDC/MDIO interface does not have access to all the configuration
758  //registers. It can only access the standard MIIM registers
759  data = 0;
760  }
761 
762  //Return register value
763  return data;
764 }
765 
766 
767 /**
768  * @brief Dump switch registers for debugging purpose
769  * @param[in] interface Underlying network interface
770  **/
771 
773 {
774  uint16_t i;
775 
776  //Loop through switch registers
777  for(i = 0; i < 256; i++)
778  {
779  //Display current switch register
780  TRACE_DEBUG("0x%02" PRIX16 " (%02" PRIu16 ") : 0x%02" PRIX8 "\r\n",
781  i, i, ksz9563ReadSwitchReg(interface, i));
782  }
783 
784  //Terminate with a line feed
785  TRACE_DEBUG("\r\n");
786 }
void ksz9563WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
__start_packed struct @114 EthHeader
Ethernet frame header.
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:536
#define MSB(x)
Definition: os_port.h:58
TCP/IP stack core.
Debugging facilities.
void ksz9563Tick(NetInterface *interface)
KSZ9563 timer handler.
void ksz9563DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
size_t netBufferGetLength(const NetBuffer *buffer)
Get the actual length of a multi-part buffer.
Definition: net_mem.c:297
uint16_t ksz9563ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
#define PORT_OP_CTRL0_TAIL_TAG_EN
#define BMSR_LINK_STATUS
Definition: ar8031_driver.h:97
Helper functions for Ethernet.
#define KSZ9563_PORT1
#define PHYCON_SPEED_100BTX
#define KSZ9563_SPI_CMD_ADDR
KSZ9563 Ethernet switch.
char_t type
#define PORT_MSTP_STATE_LEARNING_DIS
#define KSZ9563_TAIL_TAG_DECODE(tag)
#define LSB(x)
Definition: os_port.h:54
error_t ksz9563Init(NetInterface *interface)
KSZ9563 Ethernet switch initialization.
error_t ethPadFrame(NetBuffer *buffer, size_t *length)
Ethernet frame padding.
void ksz9563DisableIrq(NetInterface *interface)
Disable interrupts.
#define TRUE
Definition: os_port.h:50
#define XMII_PORT_CTRL1_RGMII_ID_IG
#define PHYCON_SPEED_1000BT
PHY driver.
Definition: nic.h:199
#define PORT_MSTP_STATE_RECEIVE_EN
#define SWITCH_OP_SOFT_RESET
void ksz9563EnableIrq(NetInterface *interface)
Enable interrupts.
#define XMII_PORT_CTRL1_RGMII_ID_EG
#define KSZ9563_TAIL_TAG_ENCODE(port)
#define NET_INTERFACE_COUNT
Definition: net.h:109
void ksz9563WriteSwitchReg(NetInterface *interface, uint16_t address, uint8_t data)
Write switch register.
void ksz9563EventHandler(NetInterface *interface)
KSZ9563 event handler.
#define KSZ9563_SW_REG_SWITCH_OP
const PhyDriver ksz9563PhyDriver
KSZ9563 Ethernet switch driver.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
#define KSZ9563_SW_REG_PORT_ETH_PHY(n, a)
NetInterface netInterface[NET_INTERFACE_COUNT]
Definition: net.c:78
error_t ksz9563UntagFrame(NetInterface *interface, uint8_t **frame, size_t *length, uint8_t *port)
Decode tail tag from incoming Ethernet frame.
#define KSZ9563_PORT2
#define KSZ9563_PHY_REG_BMSR
#define TRACE_INFO(...)
Definition: debug.h:94
#define PHYCON_SPEED_10BT
Success.
Definition: error.h:44
Ipv6Addr address
OsEvent netEvent
Definition: net.c:76
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
error_t
Error codes.
Definition: error.h:42
#define TRACE_WARNING(...)
Definition: debug.h:84
#define KSZ9563_SW_REG_PORT_MSTP_STATE(n)
#define PHYCON_DUPLEX_STATUS
unsigned int uint_t
Definition: compiler_port.h:45
#define KSZ9563_SW_REG_XMII_PORT_CTRL1(n)
error_t netBufferAppend(NetBuffer *dest, const void *src, size_t length)
Append data a multi-part buffer.
Definition: net_mem.c:586
void osReleaseMutex(OsMutex *mutex)
Release ownership of the specified mutex object.
uint8_t data[]
Definition: dtls_misc.h:169
error_t ksz9563TagFrame(NetInterface *interface, NetBuffer *buffer, size_t *offset, uint8_t port, uint16_t *type)
Add tail tag to Ethernet frame.
void ksz9563DumpSwitchReg(NetInterface *interface)
Dump switch registers for debugging purpose.
#define NetInterface
Definition: net.h:36
uint8_t ksz9563ReadSwitchReg(NetInterface *interface, uint16_t address)
Read switch register.
uint8_t value[]
Definition: dtls_misc.h:143
const uint8_t ksz9563IngressTailTag[3]
Tail tag rules (host to KSZ9563)
#define KSZ9563_SW_REG_PORT_OP_CTRL0(n)
uint16_t port
Definition: dns_common.h:223
#define CHIP_ID1_CHIP_ID_MSB_DEFAULT
OsMutex netMutex
Definition: net.c:74
#define KSZ9563_SW_REG_CHIP_ID1
#define SWITCH_OP_START_SWITCH
#define KSZ9563_SPI_CMD_WRITE
uint8_t length
Definition: dtls_misc.h:142
#define PORT_MSTP_STATE_TRANSMIT_EN
#define FALSE
Definition: os_port.h:46
int bool_t
Definition: compiler_port.h:49
void osAcquireMutex(OsMutex *mutex)
Acquire ownership of the specified mutex object.
#define KSZ9563_PHY_REG_PHYCON
#define KSZ9563_SPI_CMD_READ
#define TRACE_DEBUG(...)
Definition: debug.h:106
bool_t ksz9563GetLinkState(NetInterface *interface, uint8_t port)
Get link state.