lan9303_driver.c
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1 /**
2  * @file lan9303_driver.c
3  * @brief LAN9303 3-port Ethernet switch
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief LAN9303 Ethernet switch driver
42  **/
43 
45 {
53 };
54 
55 
56 /**
57  * @brief LAN9303 Ethernet switch initialization
58  * @param[in] interface Underlying network interface
59  * @return Error code
60  **/
61 
63 {
64  uint_t port;
65  uint32_t value;
66 
67  //Debug message
68  TRACE_INFO("Initializing LAN9303...\r\n");
69 
70  //Chip-level reset/configuration completion can be determined by first
71  //polling the BYTE_TEST register
72  do
73  {
74  //Read BYTE_TEST register
76 
77  //The returned data is invalid until the serial interface reset is
78  //complete
79  } while(value != LAN9303_BYTE_TEST_DEFAULT);
80 
81  //The completion of the entire chip-level reset must then be determined
82  //by polling the READY bit of the HW_CFG register
83  do
84  {
85  //Read HW_CFG register
87 
88  //When set, the READY bit indicates that the reset has completed and
89  //the device is ready to be accessed
90  } while((value & LAN9303_HW_CFG_DEVICE_READY) == 0);
91 
92 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
93  //Special VLAN tagging mode?
94  if(interface->port != 0)
95  {
96  //Enable special VLAN tagging mode
99 
100  //Configure egress VLAN tagging rules
103 
104  //Configure port mirroring
111 
112  //Configure port state
117  }
118  else
119 #endif
120  {
121  //Disable special VLAN tagging mode
123 
124  //Revert to default configuration
128  }
129 
130  //Configure port 0 receive parameters
133 
134  //Configure port 0 transmit parameters
138 
139  //Loop through ports
141  {
142  //Debug message
143  TRACE_DEBUG("Port %u:\r\n", port);
144  //Dump PHY registers for debugging purpose
145  lan9303DumpPhyReg(interface, port);
146  }
147 
148  //Force the TCP/IP stack to poll the link state at startup
149  interface->phyEvent = TRUE;
150  //Notify the TCP/IP stack of the event
152 
153  //Successful initialization
154  return NO_ERROR;
155 }
156 
157 
158 /**
159  * @brief Get link state
160  * @param[in] interface Underlying network interface
161  * @param[in] port Port number
162  * @return Link state
163  **/
164 
166 {
167  uint16_t status;
168  bool_t linkState;
169 
170  //Check port number
171  if(port >= LAN9303_PORT1 && port <= LAN9303_PORT2)
172  {
173  //Get exclusive access
175  //Read status register
176  status = lan9303ReadPhyReg(interface, port, LAN9303_BMSR);
177  //Release exclusive access
179 
180  //Retrieve current link state
181  linkState = (status & LAN9303_BMSR_LINK_STATUS) ? TRUE : FALSE;
182  }
183  else
184  {
185  //The specified port number is not valid
186  linkState = FALSE;
187  }
188 
189  //Return link status
190  return linkState;
191 }
192 
193 
194 /**
195  * @brief LAN9303 timer handler
196  * @param[in] interface Underlying network interface
197  **/
198 
199 void lan9303Tick(NetInterface *interface)
200 {
201  uint_t port;
202  uint16_t status;
203  bool_t linkState;
204 
205 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
206  //Special VLAN tagging mode?
207  if(interface->port != 0)
208  {
209  uint_t i;
210  NetInterface *virtualInterface;
211 
212  //Loop through network interfaces
213  for(i = 0; i < NET_INTERFACE_COUNT; i++)
214  {
215  //Point to the current interface
216  virtualInterface = &netInterface[i];
217 
218  //Check whether the current virtual interface is attached to the
219  //physical interface
220  if(virtualInterface == interface || virtualInterface->parent == interface)
221  {
222  //The VLAN identifier is used to indicate the source/destination port
223  port = virtualInterface->port;
224 
225  //Valid port?
226  if(port >= LAN9303_PORT1 && port <= LAN9303_PORT2)
227  {
228  //Read status register
229  status = lan9303ReadPhyReg(interface, port, LAN9303_BMSR);
230 
231  //Retrieve current link state
232  linkState = (status & LAN9303_BMSR_LINK_STATUS) ? TRUE : FALSE;
233 
234  //Link up or link down event?
235  if(linkState != virtualInterface->linkState)
236  {
237  //Set event flag
238  interface->phyEvent = TRUE;
239  //Notify the TCP/IP stack of the event
241  }
242  }
243  }
244  }
245  }
246  else
247 #endif
248  {
249  //Initialize link state
250  linkState = FALSE;
251 
252  //Loop through ports
254  {
255  //Read status register
256  status = lan9303ReadPhyReg(interface, port, LAN9303_BMSR);
257 
258  //Retrieve current link state
259  if(status & LAN9303_BMSR_LINK_STATUS)
260  linkState = TRUE;
261  }
262 
263  //Link up or link down event?
264  if(linkState != interface->linkState)
265  {
266  //Set event flag
267  interface->phyEvent = TRUE;
268  //Notify the TCP/IP stack of the event
270  }
271  }
272 }
273 
274 
275 /**
276  * @brief Enable interrupts
277  * @param[in] interface Underlying network interface
278  **/
279 
281 {
282 }
283 
284 
285 /**
286  * @brief Disable interrupts
287  * @param[in] interface Underlying network interface
288  **/
289 
291 {
292 }
293 
294 
295 /**
296  * @brief LAN9303 event handler
297  * @param[in] interface Underlying network interface
298  **/
299 
301 {
302  uint_t port;
303  uint16_t status;
304  bool_t linkState;
305 
306 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
307  //Special VLAN tagging mode?
308  if(interface->port != 0)
309  {
310  uint_t i;
311  NetInterface *virtualInterface;
312 
313  //Loop through network interfaces
314  for(i = 0; i < NET_INTERFACE_COUNT; i++)
315  {
316  //Point to the current interface
317  virtualInterface = &netInterface[i];
318 
319  //Check whether the current virtual interface is attached to the
320  //physical interface
321  if(virtualInterface == interface || virtualInterface->parent == interface)
322  {
323  //The VLAN identifier is used to indicate the source/destination port
324  port = virtualInterface->port;
325 
326  //Valid port?
327  if(port >= LAN9303_PORT1 && port <= LAN9303_PORT2)
328  {
329  //Read status register
330  status = lan9303ReadPhyReg(interface, port, LAN9303_BMSR);
331 
332  //Retrieve current link state
333  linkState = (status & LAN9303_BMSR_LINK_STATUS) ? TRUE : FALSE;
334 
335  //Link up event?
336  if(linkState && !virtualInterface->linkState)
337  {
338  //Adjust MAC configuration parameters for proper operation
339  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
340  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
341  interface->nicDriver->updateMacConfig(interface);
342 
343  //Read PHY special control/status register
344  status = lan9303ReadPhyReg(interface, port, LAN9303_PSCSR);
345 
346  //Check current operation mode
347  switch(status & LAN9303_PSCSR_SPEED)
348  {
349  //10BASE-T half-duplex
351  virtualInterface->linkSpeed = NIC_LINK_SPEED_10MBPS;
352  virtualInterface->duplexMode = NIC_HALF_DUPLEX_MODE;
353  break;
354  //10BASE-T full-duplex
356  virtualInterface->linkSpeed = NIC_LINK_SPEED_10MBPS;
357  virtualInterface->duplexMode = NIC_FULL_DUPLEX_MODE;
358  break;
359  //100BASE-TX half-duplex
361  virtualInterface->linkSpeed = NIC_LINK_SPEED_100MBPS;
362  virtualInterface->duplexMode = NIC_HALF_DUPLEX_MODE;
363  break;
364  //100BASE-TX full-duplex
366  virtualInterface->linkSpeed = NIC_LINK_SPEED_100MBPS;
367  virtualInterface->duplexMode = NIC_FULL_DUPLEX_MODE;
368  break;
369  //Unknown operation mode
370  default:
371  //Debug message
372  TRACE_WARNING("Invalid operation mode!\r\n");
373  break;
374  }
375 
376  //Update link state
377  virtualInterface->linkState = TRUE;
378 
379  //Process link state change event
380  nicNotifyLinkChange(virtualInterface);
381  }
382  //Link down event
383  else if(!linkState && virtualInterface->linkState)
384  {
385  //Update link state
386  virtualInterface->linkState = FALSE;
387 
388  //Process link state change event
389  nicNotifyLinkChange(virtualInterface);
390  }
391  }
392  }
393  }
394  }
395  else
396 #endif
397  {
398  //Initialize link state
399  linkState = FALSE;
400 
401  //Loop through ports
403  {
404  //Read status register
405  status = lan9303ReadPhyReg(interface, port, LAN9303_BMSR);
406 
407  //Retrieve current link state
408  if(status & LAN9303_BMSR_LINK_STATUS)
409  linkState = TRUE;
410  }
411 
412  //Link up event?
413  if(linkState)
414  {
415  //Adjust MAC configuration parameters for proper operation
416  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
417  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
418  interface->nicDriver->updateMacConfig(interface);
419 
420  //Update link state
421  interface->linkState = TRUE;
422  }
423  else
424  {
425  //Update link state
426  interface->linkState = FALSE;
427  }
428 
429  //Process link state change event
430  nicNotifyLinkChange(interface);
431  }
432 }
433 
434 
435 /**
436  * @brief Add special VLAN tag to Ethernet frame
437  * @param[in] interface Underlying network interface
438  * @param[in] buffer Multi-part buffer containing the payload
439  * @param[in,out] offset Offset to the first payload byte
440  * @param[in] port Switch port identifier
441  * @param[in,out] type Ethernet type
442  * @return Error code
443  **/
444 
446  size_t *offset, uint8_t port, uint16_t *type)
447 {
448 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
449  error_t error;
450  VlanTag *vlanTag;
451 
452  //Valid port?
453  if(port >= LAN9303_PORT1 && port <= LAN9303_PORT2)
454  {
455  //Is there enough space for the VLAN tag?
456  if(*offset >= sizeof(VlanTag))
457  {
458  //Make room for the VLAN tag
459  *offset -= sizeof(VlanTag);
460  //Point to the special VLAN tag
461  vlanTag = netBufferAt(buffer, *offset);
462 
463  //Bits 0 and 1 of the VID field specify the destination port
464  vlanTag->tci = LAN9303_VLAN_ID_ENCODE(port);
465  //The EtherType field indicates which protocol is encapsulated in the payload
466  vlanTag->type = htons(*type);
467 
468  //A distinct Ethertype has been allocated for use in the TPID field
469  *type = ETH_TYPE_VLAN;
470 
471  //Successful processing
472  error = NO_ERROR;
473  }
474  else
475  {
476  //Report an error
477  error = ERROR_INVALID_PARAMETER;
478  }
479  }
480  else
481  {
482  //Invalid port
483  error = ERROR_WRONG_IDENTIFIER;
484  }
485 
486  //Return status code
487  return error;
488 #else
489  //VLAN tagging mode is not implemented
490  return NO_ERROR;
491 #endif
492 }
493 
494 
495 /**
496  * @brief Decode special VLAN tag from incoming Ethernet frame
497  * @param[in] interface Underlying network interface
498  * @param[in,out] frame Pointer to the received Ethernet frame
499  * @param[in,out] length Length of the frame, in bytes
500  * @param[out] port Switch port identifier
501  * @return Error code
502  **/
503 
504 error_t lan9303UntagFrame(NetInterface *interface, uint8_t **frame,
505  size_t *length, uint8_t *port)
506 {
507 #if (ETH_PORT_TAGGING_SUPPORT == ENABLED)
508  error_t error;
509  EthHeader *header;
510  VlanTag *vlanTag;
511 
512  //Point to the Ethernet frame header
513  header = (EthHeader *) *frame;
514 
515  //Check whether VLAN tagging is used
516  if(ntohs(header->type) == ETH_TYPE_VLAN)
517  {
518  //Valid Ethernet frame received?
519  if(*length >= (sizeof(EthHeader) + sizeof(VlanTag)))
520  {
521  //Point to the special VLAN tag
522  vlanTag = (VlanTag *) header->data;
523 
524  //Bits 0 and 1 of the VID field specify the source port
525  *port = LAN9303_VLAN_ID_DECODE(vlanTag->tci);
526 
527  //Fix the value of the EtherType field
528  header->type = vlanTag->type;
529  //Strip VLAN tag from Ethernet frame
530  memmove(*frame + sizeof(VlanTag), *frame, sizeof(EthHeader));
531 
532  //Point to the Ethernet frame header
533  *frame += sizeof(VlanTag);
534  //Adjust the length of the frame
535  *length -= sizeof(VlanTag);
536 
537  //Successful processing
538  error = NO_ERROR;
539  }
540  else
541  {
542  //Drop the received frame
543  error = ERROR_INVALID_LENGTH;
544  }
545  }
546  else
547  {
548  //If the interface is configured to accept VLAN-tagged frames, then
549  //drop the incoming Ethernet frame
550  error = ERROR_WRONG_IDENTIFIER;
551  }
552 
553  //Return status code
554  return error;
555 #else
556  //VLAN tagging mode is not implemented
557  return NO_ERROR;
558 #endif
559 }
560 
561 
562 /**
563  * @brief Write PHY register
564  * @param[in] interface Underlying network interface
565  * @param[in] port Port number
566  * @param[in] address PHY register address
567  * @param[in] data Register value
568  **/
569 
570 void lan9303WritePhyReg(NetInterface *interface, uint8_t port,
571  uint8_t address, uint16_t data)
572 {
573  //Write the specified PHY register
574  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE, port, address, data);
575 }
576 
577 
578 /**
579  * @brief Read PHY register
580  * @param[in] interface Underlying network interface
581  * @param[in] port Port number
582  * @param[in] address PHY register address
583  * @return Register value
584  **/
585 
586 uint16_t lan9303ReadPhyReg(NetInterface *interface, uint8_t port,
587  uint8_t address)
588 {
589  //Read the specified PHY register
590  return interface->nicDriver->readPhyReg(SMI_OPCODE_READ, port, address);
591 }
592 
593 
594 /**
595  * @brief Dump PHY registers for debugging purpose
596  * @param[in] interface Underlying network interface
597  * @param[in] port Port number
598  **/
599 
600 void lan9303DumpPhyReg(NetInterface *interface, uint8_t port)
601 {
602  uint8_t i;
603 
604  //Loop through PHY registers
605  for(i = 0; i < 32; i++)
606  {
607  //Display current PHY register
608  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
609  lan9303ReadPhyReg(interface, port, i));
610  }
611 
612  //Terminate with a line feed
613  TRACE_DEBUG("\r\n");
614 }
615 
616 
617 /**
618  * @brief Write system CSR register
619  * @param[in] interface Underlying network interface
620  * @param[in] address System register address
621  * @param[in] data Register value
622  **/
623 
624 void lan9303WriteSysReg(NetInterface *interface, uint16_t address,
625  uint32_t data)
626 {
627  uint8_t phyAddr;
628  uint8_t regAddr;
629 
630  //PHY address bit 4 is 1 for SMI commands. PHY address 3:0 form system
631  //register address bits 9:6
632  phyAddr = 0x10 | ((address >> 6) & 0x0F);
633 
634  //Register address field forms register address bits 5:1
635  regAddr = (address >> 1) & 0x1F;
636 
637  //Write the low word of the SMI register
638  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE, phyAddr, regAddr,
639  data & 0xFFFF);
640 
641  //Write the high word of the SMI register
642  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE, phyAddr, regAddr + 1,
643  (data >> 16) & 0xFFFF);
644 }
645 
646 
647 /**
648  * @brief Read system CSR register
649  * @param[in] interface Underlying network interface
650  * @param[in] address System register address
651  * @return Register value
652  **/
653 
654 uint32_t lan9303ReadSysReg(NetInterface *interface, uint16_t address)
655 {
656  uint8_t phyAddr;
657  uint8_t regAddr;
658  uint32_t data;
659 
660  //PHY address bit 4 is 1 for SMI commands. PHY address 3:0 form system
661  //register address bits 9:6
662  phyAddr = 0x10 | ((address >> 6) & 0x0F);
663 
664  //Register address field forms register address bits 5:1
665  regAddr = (address >> 1) & 0x1F;
666 
667  //Read the low word of the SMI register
668  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ, phyAddr, regAddr);
669 
670  //Read the high word of the SMI register
671  data |= interface->nicDriver->readPhyReg(SMI_OPCODE_READ, phyAddr,
672  regAddr + 1) << 16;
673 
674  //Return register value
675  return data;
676 }
677 
678 
679 /**
680  * @brief Dump system CSR registers for debugging purpose
681  * @param[in] interface Underlying network interface
682  **/
683 
685 {
686  uint16_t i;
687 
688  //Loop through system registers
689  for(i = 80; i < 512; i += 4)
690  {
691  //Display current system register
692  TRACE_DEBUG("0x%03" PRIX16 ": 0x%08" PRIX32 "\r\n", i,
693  lan9303ReadSysReg(interface, i));
694  }
695 
696  //Terminate with a line feed
697  TRACE_DEBUG("\r\n");
698 }
699 
700 
701 /**
702  * @brief Write switch fabric CSR register
703  * @param[in] interface Underlying network interface
704  * @param[in] address Switch fabric register address
705  * @param[in] data Register value
706  **/
707 
708 void lan9303WriteSwitchReg(NetInterface *interface, uint16_t address,
709  uint32_t data)
710 {
711  uint32_t value;
712 
713  //To perform a write to an individual switch fabric register, the desired
714  //data must first be written into the SWITCH_CSR_DATA register
716 
717  //Set up a write operation
719  //Set register address
721 
722  //The write cycle is initiated by performing a single write to the
723  //SWITCH_CSR_CMD register
725 
726  //The completion of the write cycle is indicated by the clearing of the
727  //CSR_BUSY bit
728  do
729  {
730  //Read SWITCH_CSR_CMD register
732 
733  //Poll CSR_BUSY bit
735 }
736 
737 
738 /**
739  * @brief Read switch fabric CSR register
740  * @param[in] interface Underlying network interface
741  * @param[in] address Switch fabric register address
742  * @return Register value
743  **/
744 
745 uint32_t lan9303ReadSwitchReg(NetInterface *interface, uint16_t address)
746 {
747  uint32_t value;
748 
749  //Set up a read operation
752 
753  //Set register address
755 
756  //To perform a read of an individual switch fabric register, the read cycle
757  //must be initiated by performing a single write to the SWITCH_CSR_CMD
758  //register
760 
761  //Valid data is available for reading when the CSR_BUSY bit is cleared
762  do
763  {
764  //Read SWITCH_CSR_CMD register
766 
767  //Poll CSR_BUSY bit
769 
770  //Read data from the SWITCH_CSR_DATA register
771  return lan9303ReadSysReg(interface, LAN9303_SWITCH_CSR_DATA);
772 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:525
#define htons(value)
Definition: cpu_endian.h:392
void lan9303Tick(NetInterface *interface)
LAN9303 timer handler.
#define LAN9303_BYTE_TEST
uint8_t length
Definition: dtls_misc.h:149
int bool_t
Definition: compiler_port.h:49
#define LAN9303_VLAN_ID_DECODE(tag)
#define LAN9303_PSCSR_SPEED_100BTX_FD
void lan9303EventHandler(NetInterface *interface)
LAN9303 event handler.
#define LAN9303_BM_EGRSS_PORT_TYPE_PORT0_CPU
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:119
#define LAN9303_SWE_PORT_STATE_PORT0_FORWARDING
#define LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT2
#define LAN9303_BYTE_TEST_DEFAULT
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
error_t lan9303Init(NetInterface *interface)
LAN9303 Ethernet switch initialization.
#define LAN9303_VLAN_ID_ENCODE(port)
#define TRUE
Definition: os_port.h:50
PHY driver.
Definition: nic.h:214
#define NET_INTERFACE_COUNT
Definition: net.h:109
#define LAN9303_MAC_TX_CFG_IFG_CONFIG_DEFAULT
#define LAN9303_PSCSR_SPEED_100BTX_HD
bool_t lan9303GetLinkState(NetInterface *interface, uint8_t port)
Get link state.
#define LAN9303_SWITCH_CSR_CMD_READ
void lan9303DisableIrq(NetInterface *interface)
Disable interrupts.
#define LAN9303_PSCSR_SPEED_10BT_HD
#define LAN9303_SWE_PORT_MIRROR_SNIFFER_PORT0
#define SMI_OPCODE_WRITE
Definition: nic.h:62
void lan9303WriteSysReg(NetInterface *interface, uint16_t address, uint32_t data)
Write system CSR register.
#define LAN9303_SWITCH_CSR_CMD
#define LAN9303_SWE_INGRSS_PORT_TYP
#define LAN9303_SWE_PORT_MIRROR_RX_MIRRORING_EN
#define LAN9303_HW_CFG_DEVICE_READY
#define FALSE
Definition: os_port.h:46
NetInterface netInterface[NET_INTERFACE_COUNT]
Definition: net.c:79
@ ERROR_INVALID_PARAMETER
Invalid parameter.
Definition: error.h:47
char_t type
error_t
Error codes.
Definition: error.h:42
uint16_t lan9303ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
void * netBufferAt(const NetBuffer *buffer, size_t offset)
Returns a pointer to the data at the specified position.
Definition: net_mem.c:413
void lan9303WriteSwitchReg(NetInterface *interface, uint16_t address, uint32_t data)
Write switch fabric CSR register.
#define LAN9303_PSCSR
#define NetInterface
Definition: net.h:36
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:105
#define LAN9303_MAC_RX_CFG_REJECT_MAC_TYPES
@ ERROR_INVALID_LENGTH
Definition: error.h:109
#define LAN9303_BMSR
#define LAN9303_SWE_PORT_STATE_PORT1_LISTENING
#define LAN9303_MAC_TX_CFG_TX_EN
OsMutex netMutex
Definition: net.c:75
#define LAN9303_SWITCH_CSR_CMD_ADDR
void lan9303DumpSysReg(NetInterface *interface)
Dump system CSR registers for debugging purpose.
#define LAN9303_PSCSR_SPEED
#define LAN9303_HW_CFG
OsEvent netEvent
Definition: net.c:77
#define SMI_OPCODE_READ
Definition: nic.h:63
#define TRACE_INFO(...)
Definition: debug.h:94
#define LAN9303_BMSR_LINK_STATUS
LAN9303 3-port Ethernet switch.
uint32_t lan9303ReadSwitchReg(NetInterface *interface, uint16_t address)
Read switch fabric CSR register.
#define LAN9303_SWE_INGRSS_PORT_TYP_PORT0
uint16_t port
Definition: dns_common.h:223
#define ntohs(value)
Definition: cpu_endian.h:398
#define TRACE_WARNING(...)
Definition: debug.h:84
@ ETH_TYPE_VLAN
Definition: ethernet.h:144
#define TRACE_DEBUG(...)
Definition: debug.h:106
#define LAN9303_SWITCH_CSR_CMD_BE
#define LAN9303_MAC_TX_CFG_TX_PAD_EN
uint16_t regAddr
#define LAN9303_MAC_RX_CFG_RX_EN
error_t lan9303TagFrame(NetInterface *interface, NetBuffer *buffer, size_t *offset, uint8_t port, uint16_t *type)
Add special VLAN tag to Ethernet frame.
__start_packed struct @111 VlanTag
VLAN tag.
void lan9303WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
void osAcquireMutex(OsMutex *mutex)
Acquire ownership of the specified mutex object.
void osReleaseMutex(OsMutex *mutex)
Release ownership of the specified mutex object.
#define LAN9303_BM_EGRSS_PORT_TYPE
const PhyDriver lan9303PhyDriver
LAN9303 Ethernet switch driver.
#define LAN9303_PORT2
#define LAN9303_SWITCH_CSR_CMD_BUSY
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:118
#define LAN9303_PORT1
uint32_t lan9303ReadSysReg(NetInterface *interface, uint16_t address)
Read system CSR register.
@ ERROR_WRONG_IDENTIFIER
Definition: error.h:88
void lan9303EnableIrq(NetInterface *interface)
Enable interrupts.
#define LAN9303_MAC_RX_CFG(port)
void lan9303DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
#define LAN9303_SWE_PORT_MIRROR_RX_MIRRORING_FILT_EN
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define LAN9303_SWE_PORT_MIRROR
#define LAN9303_MAC_TX_CFG(port)
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:106
#define LAN9303_PSCSR_SPEED_10BT_FD
#define LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT1
uint8_t value[]
Definition: dtls_misc.h:150
error_t lan9303UntagFrame(NetInterface *interface, uint8_t **frame, size_t *length, uint8_t *port)
Decode special VLAN tag from incoming Ethernet frame.
#define LAN9303_SWE_PORT_STATE
unsigned int uint_t
Definition: compiler_port.h:45
__start_packed struct @110 EthHeader
Ethernet frame header.
TCP/IP stack core.
uint8_t data[]
Definition: dtls_misc.h:176
#define LAN9303_SWITCH_CSR_DATA
@ NO_ERROR
Success.
Definition: error.h:44
Debugging facilities.
#define LAN9303_SWE_PORT_STATE_PORT2_LISTENING