LPC1800 Ethernet MAC driver. More...

#include "core/nic.h"

Data Structures
struct	Lpc18xxTxDmaDesc
	Enhanced TX DMA descriptor. More...

struct	Lpc18xxRxDmaDesc
	Enhanced RX DMA descriptor. More...

Macros
#define	LPC18XX_ETH_TX_BUFFER_COUNT 3

#define	LPC18XX_ETH_TX_BUFFER_SIZE 1536

#define	LPC18XX_ETH_RX_BUFFER_COUNT 6

#define	LPC18XX_ETH_RX_BUFFER_SIZE 1536

#define	LPC18XX_ETH_IRQ_PRIORITY_GROUPING 4

#define	LPC18XX_ETH_IRQ_GROUP_PRIORITY 6

#define	LPC18XX_ETH_IRQ_SUB_PRIORITY 0

#define	CREG6_ETHMODE_MII (0 << CREG_CREG6_ETHMODE_Pos)

#define	CREG6_ETHMODE_RMII (4 << CREG_CREG6_ETHMODE_Pos)

#define	ETHERNET_MAC_MII_ADDR_CR_DIV42 (0 << ETHERNET_MAC_MII_ADDR_CR_Pos)

#define	ETHERNET_MAC_MII_ADDR_CR_DIV62 (1 << ETHERNET_MAC_MII_ADDR_CR_Pos)

#define	ETHERNET_MAC_MII_ADDR_CR_DIV16 (2 << ETHERNET_MAC_MII_ADDR_CR_Pos)

#define	ETHERNET_MAC_MII_ADDR_CR_DIV26 (3 << ETHERNET_MAC_MII_ADDR_CR_Pos)

#define	ETHERNET_MAC_MII_ADDR_CR_DIV102 (4 << ETHERNET_MAC_MII_ADDR_CR_Pos)

#define	ETHERNET_MAC_MII_ADDR_CR_DIV124 (5 << ETHERNET_MAC_MII_ADDR_CR_Pos)

#define	ETHERNET_DMA_BUS_MODE_RPBL_1 (1 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_RPBL_2 (2 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_RPBL_4 (4 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_RPBL_8 (8 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_RPBL_16 (16 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_RPBL_32 (32 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_PR_1_1 (0 << ETHERNET_DMA_BUS_MODE_PR_Pos)

#define	ETHERNET_DMA_BUS_MODE_PR_2_1 (1 << ETHERNET_DMA_BUS_MODE_PR_Pos)

#define	ETHERNET_DMA_BUS_MODE_PR_3_1 (2 << ETHERNET_DMA_BUS_MODE_PR_Pos)

#define	ETHERNET_DMA_BUS_MODE_PR_4_1 (3 << ETHERNET_DMA_BUS_MODE_PR_Pos)

#define	ETHERNET_DMA_BUS_MODE_PBL_1 (1 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_PBL_2 (2 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_PBL_4 (4 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_PBL_8 (8 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_PBL_16 (16 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

#define	ETHERNET_DMA_BUS_MODE_PBL_32 (32 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

#define	ETHERNET_DMA_OP_MODE_TTC_64 (0 << ETHERNET_DMA_OP_MODE_TTC_Pos)

#define	ETHERNET_DMA_OP_MODE_TTC_128 (1 << ETHERNET_DMA_OP_MODE_TTC_Pos)

#define	ETHERNET_DMA_OP_MODE_TTC_192 (2 << ETHERNET_DMA_OP_MODE_TTC_Pos)

#define	ETHERNET_DMA_OP_MODE_TTC_256 (3 << ETHERNET_DMA_OP_MODE_TTC_Pos)

#define	ETHERNET_DMA_OP_MODE_TTC_40 (4 << ETHERNET_DMA_OP_MODE_TTC_Pos)

#define	ETHERNET_DMA_OP_MODE_TTC_32 (5 << ETHERNET_DMA_OP_MODE_TTC_Pos)

#define	ETHERNET_DMA_OP_MODE_TTC_24 (6 << ETHERNET_DMA_OP_MODE_TTC_Pos)

#define	ETHERNET_DMA_OP_MODE_TTC_16 (7 << ETHERNET_DMA_OP_MODE_TTC_Pos)

#define	ETHERNET_DMA_OP_MODE_RTC_64 (0 << ETHERNET_DMA_OP_MODE_RTC_Pos)

#define	ETHERNET_DMA_OP_MODE_RTC_32 (1 << ETHERNET_DMA_OP_MODE_RTC_Pos)

#define	ETHERNET_DMA_OP_MODE_RTC_96 (2 << ETHERNET_DMA_OP_MODE_RTC_Pos)

#define	ETHERNET_DMA_OP_MODE_RTC_128 (3 << ETHERNET_DMA_OP_MODE_RTC_Pos)

#define	ETH_TDES0_OWN 0x80000000

#define	ETH_TDES0_IC 0x40000000

#define	ETH_TDES0_LS 0x20000000

#define	ETH_TDES0_FS 0x10000000

#define	ETH_TDES0_DC 0x08000000

#define	ETH_TDES0_DP 0x04000000

#define	ETH_TDES0_TTSE 0x02000000

#define	ETH_TDES0_TER 0x00200000

#define	ETH_TDES0_TCH 0x00100000

#define	ETH_TDES0_TTSS 0x00020000

#define	ETH_TDES0_IHE 0x00010000

#define	ETH_TDES0_ES 0x00008000

#define	ETH_TDES0_JT 0x00004000

#define	ETH_TDES0_FF 0x00002000

#define	ETH_TDES0_IPE 0x00001000

#define	ETH_TDES0_LCA 0x00000800

#define	ETH_TDES0_NC 0x00000400

#define	ETH_TDES0_LCO 0x00000200

#define	ETH_TDES0_EC 0x00000100

#define	ETH_TDES0_VF 0x00000080

#define	ETH_TDES0_CC 0x00000078

#define	ETH_TDES0_ED 0x00000004

#define	ETH_TDES0_UF 0x00000002

#define	ETH_TDES0_DB 0x00000001

#define	ETH_TDES1_TBS2 0x1FFF0000

#define	ETH_TDES1_TBS1 0x00001FFF

#define	ETH_TDES2_B1ADD 0xFFFFFFFF

#define	ETH_TDES3_B2ADD 0xFFFFFFFF

#define	ETH_TDES6_TTSL 0xFFFFFFFF

#define	ETH_TDES7_TTSH 0xFFFFFFFF

#define	ETH_RDES0_OWN 0x80000000

#define	ETH_RDES0_AFM 0x40000000

#define	ETH_RDES0_FL 0x3FFF0000

#define	ETH_RDES0_ES 0x00008000

#define	ETH_RDES0_DE 0x00004000

#define	ETH_RDES0_SAF 0x00002000

#define	ETH_RDES0_LE 0x00001000

#define	ETH_RDES0_OE 0x00000800

#define	ETH_RDES0_VLAN 0x00000400

#define	ETH_RDES0_FS 0x00000200

#define	ETH_RDES0_LS 0x00000100

#define	ETH_RDES0_TSA 0x00000080

#define	ETH_RDES0_LCO 0x00000040

#define	ETH_RDES0_FT 0x00000020

#define	ETH_RDES0_RWT 0x00000010

#define	ETH_RDES0_RE 0x00000008

#define	ETH_RDES0_DBE 0x00000004

#define	ETH_RDES0_CE 0x00000002

#define	ETH_RDES0_ESA 0x00000001

#define	ETH_RDES1_RBS2 0x1FFF0000

#define	ETH_RDES1_RER 0x00008000

#define	ETH_RDES1_RCH 0x00004000

#define	ETH_RDES1_RBS1 0x00001FFF

#define	ETH_RDES2_B1ADD 0xFFFFFFFF

#define	ETH_RDES3_B2ADD 0xFFFFFFFF

#define	ETH_RDES4_PTPVERSION 0x00002000

#define	ETH_RDES4_PTPTYPE 0x00001000

#define	ETH_RDES4_MT 0x00000F00

#define	ETH_RDES4_IPV6 0x00000080

#define	ETH_RDES4_IPV4 0x00000040

#define	ETH_RDES6_RTSL 0xFFFFFFFF

#define	ETH_RDES7_RTSH 0xFFFFFFFF

Functions
error_t	lpc18xxEthInit (NetInterface *interface)
	LPC18xx Ethernet MAC initialization. More...

void	lpc18xxEthInitGpio (NetInterface *interface)
	GPIO configuration. More...

void	lpc18xxEthInitDmaDesc (NetInterface *interface)
	Initialize DMA descriptor lists. More...

void	lpc18xxEthTick (NetInterface *interface)
	LPC18xx Ethernet MAC timer handler. More...

void	lpc18xxEthEnableIrq (NetInterface *interface)
	Enable interrupts. More...

void	lpc18xxEthDisableIrq (NetInterface *interface)
	Disable interrupts. More...

void	lpc18xxEthEventHandler (NetInterface *interface)
	LPC18xx Ethernet MAC event handler. More...

error_t	lpc18xxEthSendPacket (NetInterface interface, const NetBuffer buffer, size_t offset, NetTxAncillary *ancillary)
	Send a packet. More...

error_t	lpc18xxEthReceivePacket (NetInterface *interface)
	Receive a packet. More...

error_t	lpc18xxEthUpdateMacAddrFilter (NetInterface *interface)
	Configure MAC address filtering. More...

error_t	lpc18xxEthUpdateMacConfig (NetInterface *interface)
	Adjust MAC configuration parameters for proper operation. More...

void	lpc18xxEthWritePhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
	Write PHY register. More...

uint16_t	lpc18xxEthReadPhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
	Read PHY register. More...

uint32_t	lpc18xxEthCalcCrc (const void *data, size_t length)
	CRC calculation. More...

Variables
const NicDriver	lpc18xxEthDriver
	LPC18xx Ethernet MAC driver. More...

Detailed Description

LPC1800 Ethernet MAC driver.

License

SPDX-License-Identifier: GPL-2.0-or-later

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author: Oryx Embedded SARL (www.oryx-embedded.com)

Version: 2.4.4

Definition in file lpc18xx_eth_driver.h.

Macro Definition Documentation

◆ CREG6_ETHMODE_MII

#define CREG6_ETHMODE_MII (0 << CREG_CREG6_ETHMODE_Pos)

Definition at line 87 of file lpc18xx_eth_driver.h.

◆ CREG6_ETHMODE_RMII

#define CREG6_ETHMODE_RMII (4 << CREG_CREG6_ETHMODE_Pos)

Definition at line 88 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_AFM

#define ETH_RDES0_AFM 0x40000000

Definition at line 167 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_CE

#define ETH_RDES0_CE 0x00000002

Definition at line 183 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_DBE

#define ETH_RDES0_DBE 0x00000004

Definition at line 182 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_DE

#define ETH_RDES0_DE 0x00004000

Definition at line 170 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_ES

#define ETH_RDES0_ES 0x00008000

Definition at line 169 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_ESA

#define ETH_RDES0_ESA 0x00000001

Definition at line 184 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_FL

#define ETH_RDES0_FL 0x3FFF0000

Definition at line 168 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_FS

#define ETH_RDES0_FS 0x00000200

Definition at line 175 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_FT

#define ETH_RDES0_FT 0x00000020

Definition at line 179 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_LCO

#define ETH_RDES0_LCO 0x00000040

Definition at line 178 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_LE

#define ETH_RDES0_LE 0x00001000

Definition at line 172 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_LS

#define ETH_RDES0_LS 0x00000100

Definition at line 176 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_OE

#define ETH_RDES0_OE 0x00000800

Definition at line 173 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_OWN

#define ETH_RDES0_OWN 0x80000000

Definition at line 166 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_RE

#define ETH_RDES0_RE 0x00000008

Definition at line 181 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_RWT

#define ETH_RDES0_RWT 0x00000010

Definition at line 180 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_SAF

#define ETH_RDES0_SAF 0x00002000

Definition at line 171 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_TSA

#define ETH_RDES0_TSA 0x00000080

Definition at line 177 of file lpc18xx_eth_driver.h.

◆ ETH_RDES0_VLAN

#define ETH_RDES0_VLAN 0x00000400

Definition at line 174 of file lpc18xx_eth_driver.h.

◆ ETH_RDES1_RBS1

#define ETH_RDES1_RBS1 0x00001FFF

Definition at line 188 of file lpc18xx_eth_driver.h.

◆ ETH_RDES1_RBS2

#define ETH_RDES1_RBS2 0x1FFF0000

Definition at line 185 of file lpc18xx_eth_driver.h.

◆ ETH_RDES1_RCH

#define ETH_RDES1_RCH 0x00004000

Definition at line 187 of file lpc18xx_eth_driver.h.

◆ ETH_RDES1_RER

#define ETH_RDES1_RER 0x00008000

Definition at line 186 of file lpc18xx_eth_driver.h.

◆ ETH_RDES2_B1ADD

#define ETH_RDES2_B1ADD 0xFFFFFFFF

Definition at line 189 of file lpc18xx_eth_driver.h.

◆ ETH_RDES3_B2ADD

#define ETH_RDES3_B2ADD 0xFFFFFFFF

Definition at line 190 of file lpc18xx_eth_driver.h.

◆ ETH_RDES4_IPV4

#define ETH_RDES4_IPV4 0x00000040

Definition at line 195 of file lpc18xx_eth_driver.h.

◆ ETH_RDES4_IPV6

#define ETH_RDES4_IPV6 0x00000080

Definition at line 194 of file lpc18xx_eth_driver.h.

◆ ETH_RDES4_MT

#define ETH_RDES4_MT 0x00000F00

Definition at line 193 of file lpc18xx_eth_driver.h.

◆ ETH_RDES4_PTPTYPE

#define ETH_RDES4_PTPTYPE 0x00001000

Definition at line 192 of file lpc18xx_eth_driver.h.

◆ ETH_RDES4_PTPVERSION

#define ETH_RDES4_PTPVERSION 0x00002000

Definition at line 191 of file lpc18xx_eth_driver.h.

◆ ETH_RDES6_RTSL

#define ETH_RDES6_RTSL 0xFFFFFFFF

Definition at line 196 of file lpc18xx_eth_driver.h.

◆ ETH_RDES7_RTSH

#define ETH_RDES7_RTSH 0xFFFFFFFF

Definition at line 197 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_CC

#define ETH_TDES0_CC 0x00000078

Definition at line 154 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_DB

#define ETH_TDES0_DB 0x00000001

Definition at line 157 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_DC

#define ETH_TDES0_DC 0x08000000

Definition at line 138 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_DP

#define ETH_TDES0_DP 0x04000000

Definition at line 139 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_EC

#define ETH_TDES0_EC 0x00000100

Definition at line 152 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_ED

#define ETH_TDES0_ED 0x00000004

Definition at line 155 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_ES

#define ETH_TDES0_ES 0x00008000

Definition at line 145 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_FF

#define ETH_TDES0_FF 0x00002000

Definition at line 147 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_FS

#define ETH_TDES0_FS 0x10000000

Definition at line 137 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_IC

#define ETH_TDES0_IC 0x40000000

Definition at line 135 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_IHE

#define ETH_TDES0_IHE 0x00010000

Definition at line 144 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_IPE

#define ETH_TDES0_IPE 0x00001000

Definition at line 148 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_JT

#define ETH_TDES0_JT 0x00004000

Definition at line 146 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_LCA

#define ETH_TDES0_LCA 0x00000800

Definition at line 149 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_LCO

#define ETH_TDES0_LCO 0x00000200

Definition at line 151 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_LS

#define ETH_TDES0_LS 0x20000000

Definition at line 136 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_NC

#define ETH_TDES0_NC 0x00000400

Definition at line 150 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_OWN

#define ETH_TDES0_OWN 0x80000000

Definition at line 134 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_TCH

#define ETH_TDES0_TCH 0x00100000

Definition at line 142 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_TER

#define ETH_TDES0_TER 0x00200000

Definition at line 141 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_TTSE

#define ETH_TDES0_TTSE 0x02000000

Definition at line 140 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_TTSS

#define ETH_TDES0_TTSS 0x00020000

Definition at line 143 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_UF

#define ETH_TDES0_UF 0x00000002

Definition at line 156 of file lpc18xx_eth_driver.h.

◆ ETH_TDES0_VF

#define ETH_TDES0_VF 0x00000080

Definition at line 153 of file lpc18xx_eth_driver.h.

◆ ETH_TDES1_TBS1

#define ETH_TDES1_TBS1 0x00001FFF

Definition at line 159 of file lpc18xx_eth_driver.h.

◆ ETH_TDES1_TBS2

#define ETH_TDES1_TBS2 0x1FFF0000

Definition at line 158 of file lpc18xx_eth_driver.h.

◆ ETH_TDES2_B1ADD

#define ETH_TDES2_B1ADD 0xFFFFFFFF

Definition at line 160 of file lpc18xx_eth_driver.h.

◆ ETH_TDES3_B2ADD

#define ETH_TDES3_B2ADD 0xFFFFFFFF

Definition at line 161 of file lpc18xx_eth_driver.h.

◆ ETH_TDES6_TTSL

#define ETH_TDES6_TTSL 0xFFFFFFFF

Definition at line 162 of file lpc18xx_eth_driver.h.

◆ ETH_TDES7_TTSH

#define ETH_TDES7_TTSH 0xFFFFFFFF

Definition at line 163 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PBL_1

#define ETHERNET_DMA_BUS_MODE_PBL_1 (1 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

Definition at line 111 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PBL_16

#define ETHERNET_DMA_BUS_MODE_PBL_16 (16 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

Definition at line 115 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PBL_2

#define ETHERNET_DMA_BUS_MODE_PBL_2 (2 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

Definition at line 112 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PBL_32

#define ETHERNET_DMA_BUS_MODE_PBL_32 (32 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

Definition at line 116 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PBL_4

#define ETHERNET_DMA_BUS_MODE_PBL_4 (4 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

Definition at line 113 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PBL_8

#define ETHERNET_DMA_BUS_MODE_PBL_8 (8 << ETHERNET_DMA_BUS_MODE_PBL_Pos)

Definition at line 114 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PR_1_1

#define ETHERNET_DMA_BUS_MODE_PR_1_1 (0 << ETHERNET_DMA_BUS_MODE_PR_Pos)

Definition at line 106 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PR_2_1

#define ETHERNET_DMA_BUS_MODE_PR_2_1 (1 << ETHERNET_DMA_BUS_MODE_PR_Pos)

Definition at line 107 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PR_3_1

#define ETHERNET_DMA_BUS_MODE_PR_3_1 (2 << ETHERNET_DMA_BUS_MODE_PR_Pos)

Definition at line 108 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_PR_4_1

#define ETHERNET_DMA_BUS_MODE_PR_4_1 (3 << ETHERNET_DMA_BUS_MODE_PR_Pos)

Definition at line 109 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_RPBL_1

#define ETHERNET_DMA_BUS_MODE_RPBL_1 (1 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

Definition at line 99 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_RPBL_16

#define ETHERNET_DMA_BUS_MODE_RPBL_16 (16 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

Definition at line 103 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_RPBL_2

#define ETHERNET_DMA_BUS_MODE_RPBL_2 (2 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

Definition at line 100 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_RPBL_32

#define ETHERNET_DMA_BUS_MODE_RPBL_32 (32 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

Definition at line 104 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_RPBL_4

#define ETHERNET_DMA_BUS_MODE_RPBL_4 (4 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

Definition at line 101 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_BUS_MODE_RPBL_8

#define ETHERNET_DMA_BUS_MODE_RPBL_8 (8 << ETHERNET_DMA_BUS_MODE_RPBL_Pos)

Definition at line 102 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_RTC_128

#define ETHERNET_DMA_OP_MODE_RTC_128 (3 << ETHERNET_DMA_OP_MODE_RTC_Pos)

Definition at line 131 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_RTC_32

#define ETHERNET_DMA_OP_MODE_RTC_32 (1 << ETHERNET_DMA_OP_MODE_RTC_Pos)

Definition at line 129 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_RTC_64

#define ETHERNET_DMA_OP_MODE_RTC_64 (0 << ETHERNET_DMA_OP_MODE_RTC_Pos)

Definition at line 128 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_RTC_96

#define ETHERNET_DMA_OP_MODE_RTC_96 (2 << ETHERNET_DMA_OP_MODE_RTC_Pos)

Definition at line 130 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_TTC_128

#define ETHERNET_DMA_OP_MODE_TTC_128 (1 << ETHERNET_DMA_OP_MODE_TTC_Pos)

Definition at line 120 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_TTC_16

#define ETHERNET_DMA_OP_MODE_TTC_16 (7 << ETHERNET_DMA_OP_MODE_TTC_Pos)

Definition at line 126 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_TTC_192

#define ETHERNET_DMA_OP_MODE_TTC_192 (2 << ETHERNET_DMA_OP_MODE_TTC_Pos)

Definition at line 121 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_TTC_24

#define ETHERNET_DMA_OP_MODE_TTC_24 (6 << ETHERNET_DMA_OP_MODE_TTC_Pos)

Definition at line 125 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_TTC_256

#define ETHERNET_DMA_OP_MODE_TTC_256 (3 << ETHERNET_DMA_OP_MODE_TTC_Pos)

Definition at line 122 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_TTC_32

#define ETHERNET_DMA_OP_MODE_TTC_32 (5 << ETHERNET_DMA_OP_MODE_TTC_Pos)

Definition at line 124 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_TTC_40

#define ETHERNET_DMA_OP_MODE_TTC_40 (4 << ETHERNET_DMA_OP_MODE_TTC_Pos)

Definition at line 123 of file lpc18xx_eth_driver.h.

◆ ETHERNET_DMA_OP_MODE_TTC_64

#define ETHERNET_DMA_OP_MODE_TTC_64 (0 << ETHERNET_DMA_OP_MODE_TTC_Pos)

Definition at line 119 of file lpc18xx_eth_driver.h.

◆ ETHERNET_MAC_MII_ADDR_CR_DIV102

#define ETHERNET_MAC_MII_ADDR_CR_DIV102 (4 << ETHERNET_MAC_MII_ADDR_CR_Pos)

Definition at line 95 of file lpc18xx_eth_driver.h.

◆ ETHERNET_MAC_MII_ADDR_CR_DIV124

#define ETHERNET_MAC_MII_ADDR_CR_DIV124 (5 << ETHERNET_MAC_MII_ADDR_CR_Pos)

Definition at line 96 of file lpc18xx_eth_driver.h.

◆ ETHERNET_MAC_MII_ADDR_CR_DIV16

#define ETHERNET_MAC_MII_ADDR_CR_DIV16 (2 << ETHERNET_MAC_MII_ADDR_CR_Pos)

Definition at line 93 of file lpc18xx_eth_driver.h.

◆ ETHERNET_MAC_MII_ADDR_CR_DIV26

#define ETHERNET_MAC_MII_ADDR_CR_DIV26 (3 << ETHERNET_MAC_MII_ADDR_CR_Pos)

Definition at line 94 of file lpc18xx_eth_driver.h.

◆ ETHERNET_MAC_MII_ADDR_CR_DIV42

#define ETHERNET_MAC_MII_ADDR_CR_DIV42 (0 << ETHERNET_MAC_MII_ADDR_CR_Pos)

Definition at line 91 of file lpc18xx_eth_driver.h.

◆ ETHERNET_MAC_MII_ADDR_CR_DIV62

#define ETHERNET_MAC_MII_ADDR_CR_DIV62 (1 << ETHERNET_MAC_MII_ADDR_CR_Pos)

Definition at line 92 of file lpc18xx_eth_driver.h.

◆ LPC18XX_ETH_IRQ_GROUP_PRIORITY

#define LPC18XX_ETH_IRQ_GROUP_PRIORITY 6

Definition at line 74 of file lpc18xx_eth_driver.h.

◆ LPC18XX_ETH_IRQ_PRIORITY_GROUPING

#define LPC18XX_ETH_IRQ_PRIORITY_GROUPING 4

Definition at line 67 of file lpc18xx_eth_driver.h.

◆ LPC18XX_ETH_IRQ_SUB_PRIORITY

#define LPC18XX_ETH_IRQ_SUB_PRIORITY 0

Definition at line 81 of file lpc18xx_eth_driver.h.

◆ LPC18XX_ETH_RX_BUFFER_COUNT

#define LPC18XX_ETH_RX_BUFFER_COUNT 6

Definition at line 53 of file lpc18xx_eth_driver.h.

◆ LPC18XX_ETH_RX_BUFFER_SIZE

#define LPC18XX_ETH_RX_BUFFER_SIZE 1536

Definition at line 60 of file lpc18xx_eth_driver.h.

◆ LPC18XX_ETH_TX_BUFFER_COUNT

#define LPC18XX_ETH_TX_BUFFER_COUNT 3

Definition at line 39 of file lpc18xx_eth_driver.h.

◆ LPC18XX_ETH_TX_BUFFER_SIZE

#define LPC18XX_ETH_TX_BUFFER_SIZE 1536

Definition at line 46 of file lpc18xx_eth_driver.h.

Function Documentation

◆ lpc18xxEthCalcCrc()

uint32_t lpc18xxEthCalcCrc	(	const void *	data,
		size_t	length
	)

CRC calculation.

Parameters

[in]	data	Pointer to the data over which to calculate the CRC
[in]	length	Number of bytes to process

Returns: Resulting CRC value

Definition at line 850 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthDisableIrq()

void lpc18xxEthDisableIrq ( NetInterface * interface )

Disable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 411 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthEnableIrq()

void lpc18xxEthEnableIrq ( NetInterface * interface )

Enable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 383 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthEventHandler()

void lpc18xxEthEventHandler ( NetInterface * interface )

LPC18xx Ethernet MAC event handler.

Parameters

[in] interface Underlying network interface

Definition at line 492 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthInit()

error_t lpc18xxEthInit ( NetInterface * interface )

LPC18xx Ethernet MAC initialization.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 114 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthInitDmaDesc()

void lpc18xxEthInitDmaDesc ( NetInterface * interface )

Initialize DMA descriptor lists.

Parameters

[in] interface Underlying network interface

Definition at line 289 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthInitGpio()

void lpc18xxEthInitGpio ( NetInterface * interface )

GPIO configuration.

Parameters

[in] interface Underlying network interface

Definition at line 245 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthReadPhyReg()

uint16_t lpc18xxEthReadPhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr
	)

Read PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)

Returns: Register value

Definition at line 804 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthReceivePacket()

error_t lpc18xxEthReceivePacket ( NetInterface * interface )

Receive a packet.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 589 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthSendPacket()

error_t lpc18xxEthSendPacket	(	NetInterface *	interface,
		const NetBuffer *	buffer,
		size_t	offset,
		NetTxAncillary *	ancillary
	)

Send a packet.

Parameters

[in]	interface	Underlying network interface
[in]	buffer	Multi-part buffer containing the data to send
[in]	offset	Offset to the first data byte
[in]	ancillary	Additional options passed to the stack along with the packet

Returns: Error code

Definition at line 530 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthTick()

void lpc18xxEthTick ( NetInterface * interface )

LPC18xx Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters

[in] interface Underlying network interface

Definition at line 358 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthUpdateMacAddrFilter()

error_t lpc18xxEthUpdateMacAddrFilter ( NetInterface * interface )

Configure MAC address filtering.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 659 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthUpdateMacConfig()

error_t lpc18xxEthUpdateMacConfig ( NetInterface * interface )

Adjust MAC configuration parameters for proper operation.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 719 of file lpc18xx_eth_driver.c.

◆ lpc18xxEthWritePhyReg()

void lpc18xxEthWritePhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr,
		uint16_t	data
	)

Write PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)
[in]	data	Register value

Definition at line 762 of file lpc18xx_eth_driver.c.

Variable Documentation

◆ lpc18xxEthDriver

const NicDriver lpc18xxEthDriver

extern

LPC18xx Ethernet MAC driver.

Definition at line 87 of file lpc18xx_eth_driver.c.

Data Structures

Macros

Functions

Variables

Detailed Description

License

Macro Definition Documentation

◆ CREG6_ETHMODE_MII

◆ CREG6_ETHMODE_RMII

◆ ETH_RDES0_AFM

◆ ETH_RDES0_CE

◆ ETH_RDES0_DBE

◆ ETH_RDES0_DE

◆ ETH_RDES0_ES

◆ ETH_RDES0_ESA

◆ ETH_RDES0_FL

◆ ETH_RDES0_FS

◆ ETH_RDES0_FT

◆ ETH_RDES0_LCO

◆ ETH_RDES0_LE

◆ ETH_RDES0_LS

◆ ETH_RDES0_OE

◆ ETH_RDES0_OWN

◆ ETH_RDES0_RE

◆ ETH_RDES0_RWT

◆ ETH_RDES0_SAF

◆ ETH_RDES0_TSA

◆ ETH_RDES0_VLAN

◆ ETH_RDES1_RBS1

◆ ETH_RDES1_RBS2

◆ ETH_RDES1_RCH

◆ ETH_RDES1_RER

◆ ETH_RDES2_B1ADD

◆ ETH_RDES3_B2ADD

◆ ETH_RDES4_IPV4

◆ ETH_RDES4_IPV6

◆ ETH_RDES4_MT

◆ ETH_RDES4_PTPTYPE

◆ ETH_RDES4_PTPVERSION

◆ ETH_RDES6_RTSL

◆ ETH_RDES7_RTSH

◆ ETH_TDES0_CC

◆ ETH_TDES0_DB

◆ ETH_TDES0_DC

◆ ETH_TDES0_DP

◆ ETH_TDES0_EC

◆ ETH_TDES0_ED

◆ ETH_TDES0_ES

◆ ETH_TDES0_FF

◆ ETH_TDES0_FS

◆ ETH_TDES0_IC

◆ ETH_TDES0_IHE

◆ ETH_TDES0_IPE

◆ ETH_TDES0_JT

◆ ETH_TDES0_LCA

◆ ETH_TDES0_LCO

◆ ETH_TDES0_LS

◆ ETH_TDES0_NC

◆ ETH_TDES0_OWN

◆ ETH_TDES0_TCH

◆ ETH_TDES0_TER

◆ ETH_TDES0_TTSE

◆ ETH_TDES0_TTSS

◆ ETH_TDES0_UF

◆ ETH_TDES0_VF

◆ ETH_TDES1_TBS1

◆ ETH_TDES1_TBS2

◆ ETH_TDES2_B1ADD

◆ ETH_TDES3_B2ADD

◆ ETH_TDES6_TTSL

◆ ETH_TDES7_TTSH

◆ ETHERNET_DMA_BUS_MODE_PBL_1

◆ ETHERNET_DMA_BUS_MODE_PBL_16

◆ ETHERNET_DMA_BUS_MODE_PBL_2

◆ ETHERNET_DMA_BUS_MODE_PBL_32

◆ ETHERNET_DMA_BUS_MODE_PBL_4

◆ ETHERNET_DMA_BUS_MODE_PBL_8

◆ ETHERNET_DMA_BUS_MODE_PR_1_1

◆ ETHERNET_DMA_BUS_MODE_PR_2_1

◆ ETHERNET_DMA_BUS_MODE_PR_3_1