nuc472_eth_driver.h
Go to the documentation of this file.
1 /**
2  * @file nuc472_eth_driver.h
3  * @brief Nuvoton NUC472 Ethernet MAC controller
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _NUC472_ETH_DRIVER_H
30 #define _NUC472_ETH_DRIVER_H
31 
32 //Dependencies
33 #include "core/nic.h"
34 
35 //Number of TX buffers
36 #ifndef NUC472_ETH_TX_BUFFER_COUNT
37  #define NUC472_ETH_TX_BUFFER_COUNT 2
38 #elif (NUC472_ETH_TX_BUFFER_COUNT < 1)
39  #error NUC472_ETH_TX_BUFFER_COUNT parameter is not valid
40 #endif
41 
42 //TX buffer size
43 #ifndef NUC472_ETH_TX_BUFFER_SIZE
44  #define NUC472_ETH_TX_BUFFER_SIZE 1536
45 #elif (NUC472_ETH_TX_BUFFER_SIZE != 1536)
46  #error NUC472_ETH_TX_BUFFER_SIZE parameter is not valid
47 #endif
48 
49 //Number of RX buffers
50 #ifndef NUC472_ETH_RX_BUFFER_COUNT
51  #define NUC472_ETH_RX_BUFFER_COUNT 4
52 #elif (NUC472_ETH_RX_BUFFER_COUNT < 1)
53  #error NUC472_ETH_RX_BUFFER_COUNT parameter is not valid
54 #endif
55 
56 //RX buffer size
57 #ifndef NUC472_ETH_RX_BUFFER_SIZE
58  #define NUC472_ETH_RX_BUFFER_SIZE 1536
59 #elif (NUC472_ETH_RX_BUFFER_SIZE != 1536)
60  #error NUC472_ETH_RX_BUFFER_SIZE parameter is not valid
61 #endif
62 
63 //Interrupt priority grouping
64 #ifndef NUC472_ETH_IRQ_PRIORITY_GROUPING
65  #define NUC472_ETH_IRQ_PRIORITY_GROUPING 3
66 #elif (NUC472_ETH_IRQ_PRIORITY_GROUPING < 0)
67  #error NUC472_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
68 #endif
69 
70 //Ethernet interrupt group priority
71 #ifndef NUC472_ETH_IRQ_GROUP_PRIORITY
72  #define NUC472_ETH_IRQ_GROUP_PRIORITY 12
73 #elif (NUC472_ETH_IRQ_GROUP_PRIORITY < 0)
74  #error NUC472_ETH_IRQ_GROUP_PRIORITY parameter is not valid
75 #endif
76 
77 //Ethernet interrupt subpriority
78 #ifndef NUC472_ETH_IRQ_SUB_PRIORITY
79  #define NUC472_ETH_IRQ_SUB_PRIORITY 0
80 #elif (NUC472_ETH_IRQ_SUB_PRIORITY < 0)
81  #error NUC472_ETH_IRQ_SUB_PRIORITY parameter is not valid
82 #endif
83 
84 //Transmit DMA descriptor flags
85 #define EMAC_TXDES0_OWNER 0x80000000
86 #define EMAC_TXDES0_TTSEN 0x00000008
87 #define EMAC_TXDES0_INTEN 0x00000004
88 #define EMAC_TXDES0_CRCAPP 0x00000002
89 #define EMAC_TXDES0_PADEN 0x00000001
90 #define EMAC_TXDES1_TXBSA 0xFFFFFFFF
91 #define EMAC_TXDES2_COLCNT 0xF0000000
92 #define EMAC_TXDES2_TTSAS 0x08000000
93 #define EMAC_TXDES2_SQE 0x04000000
94 #define EMAC_TXDES2_TXPAUSED 0x02000000
95 #define EMAC_TXDES2_TXHALT 0x01000000
96 #define EMAC_TXDES2_LCIF 0x00800000
97 #define EMAC_TXDES2_TXABTIF 0x00400000
98 #define EMAC_TXDES2_NCSIF 0x00200000
99 #define EMAC_TXDES2_EXDEFIF 0x00100000
100 #define EMAC_TXDES2_TXCPIF 0x00080000
101 #define EMAC_TXDES2_DEF 0x00020000
102 #define EMAC_TXDES2_TXIF 0x00010000
103 #define EMAC_TXDES2_TBC 0x0000FFFF
104 #define EMAC_TXDES2_NTXDSA 0xFFFFFFFF
105 
106 //Receive DMA descriptor flags
107 #define EMAC_RXDES0_OWNER 0x80000000
108 #define EMAC_RXDES0_RTSAS 0x00800000
109 #define EMAC_RXDES0_RPIF 0x00400000
110 #define EMAC_RXDES0_ALIEIF 0x00200000
111 #define EMAC_RXDES0_RXGDIF 0x00100000
112 #define EMAC_RXDES0_LPIF 0x00080000
113 #define EMAC_RXDES0_CRCEIF 0x00020000
114 #define EMAC_RXDES0_RXIF 0x00010000
115 #define EMAC_RXDES0_RBC 0x0000FFFF
116 #define EMAC_RXDES1_RXBSA 0xFFFFFFFF
117 #define EMAC_RXDES3_NRXDSA 0xFFFFFFFF
118 
119 //C++ guard
120 #ifdef __cplusplus
121  extern "C" {
122 #endif
123 
124 
125 /**
126  * @brief TX DMA descriptor
127  **/
128 
129 typedef struct
130 {
131  uint32_t txdes0;
132  uint32_t txdes1;
133  uint32_t txdes2;
134  uint32_t txdes3;
136 
137 
138 /**
139  * @brief RX DMA descriptor
140  **/
141 
142 typedef struct
143 {
144  uint32_t rxdes0;
145  uint32_t rxdes1;
146  uint32_t rxdes2;
147  uint32_t rxdes3;
149 
150 
151 //NUC472 Ethernet MAC driver
152 extern const NicDriver nuc472EthDriver;
153 
154 //NUC472 Ethernet MAC related functions
156 void nuc472EthInitGpio(NetInterface *interface);
157 void nuc472EthInitDmaDesc(NetInterface *interface);
158 
159 void nuc472EthTick(NetInterface *interface);
160 
161 void nuc472EthEnableIrq(NetInterface *interface);
162 void nuc472EthDisableIrq(NetInterface *interface);
163 void nuc472EthEventHandler(NetInterface *interface);
164 
166  const NetBuffer *buffer, size_t offset);
167 
169 
172 
173 void nuc472EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
174 uint16_t nuc472EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
175 
176 //C++ guard
177 #ifdef __cplusplus
178  }
179 #endif
180 
181 #endif
uint16_t nuc472EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
error_t nuc472EthReceivePacket(NetInterface *interface)
Receive a packet.
error_t nuc472EthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
TX DMA descriptor.
void nuc472EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
error_t nuc472EthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
error_t nuc472EthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
void nuc472EthInitDmaDesc(NetInterface *interface)
Initialize DMA descriptor lists.
RX DMA descriptor.
void nuc472EthInitGpio(NetInterface *interface)
NIC driver.
Definition: nic.h:161
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:86
void nuc472EthDisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t regAddr
error_t nuc472EthInit(NetInterface *interface)
NUC472 Ethernet MAC initialization.
error_t
Error codes.
Definition: error.h:40
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
void nuc472EthTick(NetInterface *interface)
NUC472 Ethernet MAC timer handler.
const NicDriver nuc472EthDriver
NUC472 Ethernet MAC driver.
void nuc472EthEnableIrq(NetInterface *interface)
Enable interrupts.
void nuc472EthEventHandler(NetInterface *interface)
NUC472 Ethernet MAC event handler.
Network interface controller abstraction layer.