sam3x_eth_driver.h
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1 /**
2  * @file sam3x_eth_driver.h
3  * @brief SAM3X Ethernet MAC controller
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 #ifndef _SAM3X_ETH_DRIVER_H
32 #define _SAM3X_ETH_DRIVER_H
33 
34 //Number of TX buffers
35 #ifndef SAM3X_ETH_TX_BUFFER_COUNT
36  #define SAM3X_ETH_TX_BUFFER_COUNT 2
37 #elif (SAM3X_ETH_TX_BUFFER_COUNT < 1)
38  #error SAM3X_ETH_TX_BUFFER_COUNT parameter is not valid
39 #endif
40 
41 //TX buffer size
42 #ifndef SAM3X_ETH_TX_BUFFER_SIZE
43  #define SAM3X_ETH_TX_BUFFER_SIZE 1536
44 #elif (SAM3X_ETH_TX_BUFFER_SIZE != 1536)
45  #error SAM3X_ETH_TX_BUFFER_SIZE parameter is not valid
46 #endif
47 
48 //Number of RX buffers
49 #ifndef SAM3X_ETH_RX_BUFFER_COUNT
50  #define SAM3X_ETH_RX_BUFFER_COUNT 48
51 #elif (SAM3X_ETH_RX_BUFFER_COUNT < 12)
52  #error SAM3X_ETH_RX_BUFFER_COUNT parameter is not valid
53 #endif
54 
55 //RX buffer size
56 #ifndef SAM3X_ETH_RX_BUFFER_SIZE
57  #define SAM3X_ETH_RX_BUFFER_SIZE 128
58 #elif (SAM3X_ETH_RX_BUFFER_SIZE != 128)
59  #error SAM3X_ETH_RX_BUFFER_SIZE parameter is not valid
60 #endif
61 
62 //Interrupt priority grouping
63 #ifndef SAM3X_ETH_IRQ_PRIORITY_GROUPING
64  #define SAM3X_ETH_IRQ_PRIORITY_GROUPING 3
65 #elif (SAM3X_ETH_IRQ_PRIORITY_GROUPING < 0)
66  #error SAM3X_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
67 #endif
68 
69 //Ethernet interrupt group priority
70 #ifndef SAM3X_ETH_IRQ_GROUP_PRIORITY
71  #define SAM3X_ETH_IRQ_GROUP_PRIORITY 12
72 #elif (SAM3X_ETH_IRQ_GROUP_PRIORITY < 0)
73  #error SAM3X_ETH_IRQ_GROUP_PRIORITY parameter is not valid
74 #endif
75 
76 //Ethernet interrupt subpriority
77 #ifndef SAM3X_ETH_IRQ_SUB_PRIORITY
78  #define SAM3X_ETH_IRQ_SUB_PRIORITY 0
79 #elif (SAM3X_ETH_IRQ_SUB_PRIORITY < 0)
80  #error SAM3X_ETH_IRQ_SUB_PRIORITY parameter is not valid
81 #endif
82 
83 //RMII signals
84 #define EMAC_RMII_MASK (PIO_PB9A_EMDIO | PIO_PB8A_EMDC | \
85  PIO_PB7A_ERXER | PIO_PB6A_ERX1 | PIO_PB5A_ERX0 | PIO_PB4A_ERXDV | \
86  PIO_PB3A_ETX1 | PIO_PB2A_ETX0 | PIO_PB1A_ETXEN | PIO_PB0A_ETXCK)
87 
88 //TX buffer descriptor flags
89 #define EMAC_TX_USED 0x80000000
90 #define EMAC_TX_WRAP 0x40000000
91 #define EMAC_TX_ERROR 0x20000000
92 #define EMAC_TX_UNDERRUN 0x10000000
93 #define EMAC_TX_EXHAUSTED 0x08000000
94 #define EMAC_TX_NO_CRC 0x00010000
95 #define EMAC_TX_LAST 0x00008000
96 #define EMAC_TX_LENGTH 0x000007FF
97 
98 //RX buffer descriptor flags
99 #define EMAC_RX_ADDRESS 0xFFFFFFFC
100 #define EMAC_RX_WRAP 0x00000002
101 #define EMAC_RX_OWNERSHIP 0x00000001
102 #define EMAC_RX_BROADCAST 0x80000000
103 #define EMAC_RX_MULTICAST_HASH 0x40000000
104 #define EMAC_RX_UNICAST_HASH 0x20000000
105 #define EMAC_RX_EXT_ADDR 0x10000000
106 #define EMAC_RX_SAR1 0x04000000
107 #define EMAC_RX_SAR2 0x02000000
108 #define EMAC_RX_SAR3 0x01000000
109 #define EMAC_RX_SAR4 0x00800000
110 #define EMAC_RX_TYPE_ID 0x00400000
111 #define EMAC_RX_VLAN_TAG 0x00200000
112 #define EMAC_RX_PRIORITY_TAG 0x00100000
113 #define EMAC_RX_VLAN_PRIORITY 0x000E0000
114 #define EMAC_RX_CFI 0x00010000
115 #define EMAC_RX_EOF 0x00008000
116 #define EMAC_RX_SOF 0x00004000
117 #define EMAC_RX_OFFSET 0x00003000
118 #define EMAC_RX_LENGTH 0x00000FFF
119 
120 //C++ guard
121 #ifdef __cplusplus
122 extern "C" {
123 #endif
124 
125 
126 /**
127  * @brief Transmit buffer descriptor
128  **/
129 
130 typedef struct
131 {
132  uint32_t address;
133  uint32_t status;
135 
136 
137 /**
138  * @brief Receive buffer descriptor
139  **/
140 
141 typedef struct
142 {
143  uint32_t address;
144  uint32_t status;
146 
147 
148 //SAM3X Ethernet MAC driver
149 extern const NicDriver sam3xEthDriver;
150 
151 //SAM3X Ethernet MAC related functions
152 error_t sam3xEthInit(NetInterface *interface);
153 void sam3xEthInitGpio(NetInterface *interface);
154 void sam3xEthInitBufferDesc(NetInterface *interface);
155 
156 void sam3xEthTick(NetInterface *interface);
157 
158 void sam3xEthEnableIrq(NetInterface *interface);
159 void sam3xEthDisableIrq(NetInterface *interface);
160 void sam3xEthEventHandler(NetInterface *interface);
161 
163  const NetBuffer *buffer, size_t offset);
164 
166 
169 
170 void sam3xEthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
171  uint8_t regAddr, uint16_t data);
172 
173 uint16_t sam3xEthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
174  uint8_t regAddr);
175 
176 //C++ guard
177 #ifdef __cplusplus
178 }
179 #endif
180 
181 #endif
void sam3xEthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
uint8_t opcode
Definition: dns_common.h:172
Transmit buffer descriptor.
uint16_t sam3xEthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
Receive buffer descriptor.
error_t
Error codes.
Definition: error.h:42
#define NetInterface
Definition: net.h:36
void sam3xEthEnableIrq(NetInterface *interface)
Enable interrupts.
void sam3xEthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
void sam3xEthEventHandler(NetInterface *interface)
SAM3X Ethernet MAC event handler.
error_t sam3xEthInit(NetInterface *interface)
SAM3X Ethernet MAC initialization.
void sam3xEthDisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t regAddr
error_t sam3xEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
const NicDriver sam3xEthDriver
SAM3X Ethernet MAC driver.
error_t sam3xEthReceivePacket(NetInterface *interface)
Receive a packet.
error_t sam3xEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
void sam3xEthInitGpio(NetInterface *interface)
uint8_t data[]
Definition: dtls_misc.h:176
NIC driver.
Definition: nic.h:179
void sam3xEthTick(NetInterface *interface)
SAM3X Ethernet MAC timer handler.
error_t sam3xEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.